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    • 4. 发明专利
    • MODEM
    • JPH04104537A
    • 1992-04-07
    • JP22007090
    • 1990-08-23
    • OKI ELECTRIC IND CO LTD
    • SATO TAKUROKATO TOSHIOKAWABE MANABU
    • H04L5/16H04J3/04H04L5/14H04L5/24H04M11/00
    • PURPOSE:To make the reception frequency characteristic flat on the reception side of a high channel signal of a land mobile radio telephone line or the like to keep stable demodulation by switching a switch to insert a line equalizer which corrects the degradation in characteristic of a signal due to attenuation on the high band side of the line. CONSTITUTION:A modulator 100 and a demodulator 116 are switched to a wire line or a land mobile radio telephone line by switches 107 and 113. When they are switched to the land mobile radio telephone line and the response mode is set, a high channel signal of the modulator 100 is transmitted after the degradation of the frequency characteristic due to line attenuation is corrected by a first line equalizer 104 for high band inserted by a switch 105. When the call originating mode is set, the high channel signal subjected to line attenuation from the land mobile radio telephone line is inputted to the demodulator 116 after the degradation of the frequency characteristic is corrected by a second line equalizer 112 for high band inserted by a switch 111. Thus stable demodulation is always kept in demodulators of the local station and the other-party station.
    • 5. 发明专利
    • SELECTION RETRANSMISSION SYSTEM FOR HOLD
    • JPH0496534A
    • 1992-03-27
    • JP21377090
    • 1990-08-14
    • OKI ELECTRIC IND CO LTD
    • SATO TAKUROKATO TOSHIOKAWABE MANABU
    • H04L1/16H04L1/18H04L29/08
    • PURPOSE:To attain retransmission of all information frames relating to identification information included in a retransmission request frame through the reception of the retransmission request frame by incorporating error frame information with respect to plural information frames into the retransmission request frame. CONSTITUTION:A data C1 representing a new retransmission request frame MREJ and a number C2 representing a last frame in consecutive frames having no transmission error in received information frames are included in a control field D of a retransmission request frame MREJ. Moreover, an error frame bit pattern EF is inserted in an information field of the retransmission request frame MREJ. Each bit of an error frame bit pattern EF represents the reception state of the information frame after the last frame without an error. When a bit pattern EF of error frame information of a received NREJ frame differs from the bit pattern EF of an error frame information buffer 206 and an information frame on retransmission request is in existence in a transmission frame buffer 202, the information frame on retransmission request is informed to a retransmission request section 207.
    • 7. 发明专利
    • DATA COMMUNICATION EQUIPMENT
    • JPH0262145A
    • 1990-03-02
    • JP21159888
    • 1988-08-27
    • OKI ELECTRIC IND CO LTD
    • KATO TOSHIOSATO TAKUROKAWABE MANABUTOKUYAMA KATSUMI
    • H04L29/08
    • PURPOSE:To execute stable data communication by providing a line delay measuring means, a data frame length selecting means and a variable reception wait timer setting means. CONSTITUTION:Data sent from terminal equipment 60 are received by a buffer 20, and a data frame length selecting part 22 decides it into a prescribed lengths. An encoder selecting part 24 encodes the data, and sends them as the transmission data. In a line delay measuring part 50, a delay correcting part 54 corrects the counting outputs of a transmission data counting part 52 and a reception data counting part 58 with the help of a line delay timer, and sets a line delay time. When a set value is applied to a variable reception wait timer setting part 40, a timer correcting part 42 corrects the value by a transmission data frame length L and encoder information F, drives a reception wait timer 44, and forecasts the time until the reception of a responding signal from the other station. Consequently, even when the transmission data are made into errors, the case can be immediately coped with, and since the data frame length and the encoder are selected by the line delay and line condition, the data communication can be stably executed regardless of communication methods.
    • 8. 发明专利
    • DATA TRANSMISSION SYSTEM
    • JPS62147828A
    • 1987-07-01
    • JP28792885
    • 1985-12-23
    • OKI ELECTRIC IND CO LTD
    • FUKAZAWA ATSUSHISATO TAKUROKAWABE MANABU
    • H04B14/04H04L1/00
    • PURPOSE:To reproduce surely a data and to attain the data communication with high transmission efficiency without error by sending a data to be sent while switching low/high speed modulations via forming coding by an error detection code and blocking by plural frames. CONSTITUTION:After an input data from a transmission terminal equipment 1 is subject to error detection coding by a coder 2, the result is coded by using an error correction code. The coded data is modulated by a high speed modulator 3 and sent to the reception side, while a control signal from a control signal transmission 4 is modulated by a low speed modulator 5 by the instruction of a controller 8 and sent to the reception side. A low speed demodulator 12 at the reception side demodulates the control signal, which is received by a control signal receiver 13. When a data succeeding to the control signal exists, the demodulator is switched into a high speed demodulator 9 by the instruction of a controller 14 then the data is received. The received data is inputted to a decoder 10, where the data is decoded by using the error correction code, then the result is sent to a reception terminal equipment 11.
    • 9. 发明专利
    • ERROR CONTROL CODING SYSTEM
    • JPS61232737A
    • 1986-10-17
    • JP7353785
    • 1985-04-09
    • OKI ELECTRIC IND CO LTD
    • FUKAZAWA ATSUSHISATO TAKUROAKIYAMA HARUHIKOKAWABE MANABU
    • H04L1/16H03M13/03H04L1/00H04L1/12H04L1/18
    • PURPOSE:To reproduce data at the receiving side and to execute the data communication with a high transmission efficiency at the transmission line to generate the burst characteristic error even when the receiving input level is low by selecting the frame length by an NAK signal or an ACK signal with a frame length selecting means. CONSTITUTION:When an error is detected by a decoding device 106, a control information sending means 108 sends the frame number with an error to a coding device 109 together with an NAK signal, provides a cyclic code and an error correcting code, modulates by a modulator 110, sends to a communication channel 111, demodulates by a demodulator 112 and decodes by a decoder 113. Next, the error frame number is resent from a receiving side to a transmitting side together with the NAK signal, the NAK signal is decided by a frame length selecting part 1141 of a frame length selecting means 114 at the transmitting side, either of frame lengths L1-L4 of a frame length memory device 1142 is selected by the condition, and the input data are sent to a coder 102 by the frame length. Thus, the data are reproduced at the receiving side, the error of the burst characteristic is generated, and the data communication with a high transmission efficiency is executed.
    • 10. 发明专利
    • SYNCHRONOUS COMMUNICATION EQUIPMENT
    • JPS61179623A
    • 1986-08-12
    • JP1928485
    • 1985-02-05
    • OKI ELECTRIC IND CO LTD
    • FUKAZAWA ATSUSHISATO TAKUROAKIYAMA HARUHIKOKAWABE MANABU
    • H03M13/00H03M13/23
    • PURPOSE:To minimize the number of required synchronous control characters SYNC for synchronization by applying error correction coding to the synchronous characters so as to attain transmission/reception immune to the deterioration in a transmission line. CONSTITUTION:A filter 1-24 waveform-shapes a demodulated signal and gives an output to a region decision circuit 1-26 via an equalizer 1-25. The region decision circuit 1-26 decides the quadrant of the inputted signal, a digit corresponding to each quadrant is obtained by a level converting circuit 1-27 through the decision of the quadrant and a (K+i)-bit expressed in a binary code is outputted in parallel. Through the demodulation above, an output corresponding to a block comprising a k-bit of information bit and an i-bit of check bit constituted by a coder of a transmitter is obtained. Further, a syndrome arithmetic circuit 1-28 of a decoder detects an error bit from the output and an error bit bit correction circuit 1-29 corrects the error and only the information bit coverted into a serial signal by a parallel/serial converter 1-30 is outputted from an output terminal 1-4.