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1. 发明专利

JP2013166193A Method for cutting hard brittle ingot 有权
标题翻译：切割硬质玻璃的方法
公开(公告)号：JP2013166193A
公开(公告)日：2013-08-29
申请号：JP2012030119
申请日：2012-02-15
申请人： Nippon Steel & Sumitomo Metal Corp , 新日鐵住金株式会社
发明人： YASHIRO HIROKATSU , FUJIMOTO TATSUO , HIRANO YOSHIO , TSUGE HIROSHI , KATSUNO MASAKAZU , SATO SHINYA , ITO WATARU , AIGO TAKASHI , MORITA MITSURU , OHASHI WATARU
IPC分类号： B23H5/04 , B23H5/10 , B23H7/02 , B23H7/08 , B24B27/06 , B28D5/04 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To provide a method for cutting a hard brittle ingot by which the hard brittle ingot can be accurately and efficiently cut even though the ingot to be cut has electrical conductivity or insulation properties and is a high hardness silicon carbide monocrystalline ingot, and furthermore, even if the ingot has a large diameter.SOLUTION: In a method for cutting a hard brittle ingot 1, an electroconductively fixed abrasive grain wire 2 obtained by fixing abrasive grains to a wire body by an electroconductive fixing means is used, and cutting is performed by electric discharge machining when performing the cutting work of the hard brittle ingot. Furthermore, in the method of cutting the hard brittle ingot 1, when the cutting work cannot be performed at the cutting speed of ≥1 mm/h in the electric discharge machining, the application of a voltage to the wire 2 is stopped, the wire 2 is traveled at the speed of ≥100 m/minute and working can be switched to cutting work by machining.
摘要翻译：要解决的问题：为了提供一种用于切割硬脆锭的方法，即使要切割的锭具有导电性或绝缘性，并且是高硬度的碳化硅单晶锭，硬脆锭可以被精确和有效地切割，此外，即使锭具有大的直径。另外，在硬质脆性铸锭1的切断方法中，使用通过导电性固定装置将磨粒固定在线体上而得到的导电固定磨粒线2，进行硬质脆性坯料的切削加工时，通过放电加工进行切断。此外，在切削硬脆钢锭1的方法中，当在放电加工中切割速度≥1mm/ h的切削加工不能进行切削加工时，停止向线材2施加电压， 2以≥100米/分钟的速度行驶，通过加工可切换到切割加工。

2. 发明专利

JP2013121898A Method of producing epitaxial silicon carbide wafer 有权
标题翻译：生产外延硅碳化硅的方法
公开(公告)号：JP2013121898A
公开(公告)日：2013-06-20
申请号：JP2011271272
申请日：2011-12-12
申请人： Nippon Steel & Sumitomo Metal Corp , 新日鐵住金株式会社
发明人： AIGO TAKASHI , ITO WATARU , FUJIMOTO TATSUO
IPC分类号： C30B29/36 , C23C16/42 , C30B23/08 , H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a method of producing an epitaxial silicon carbide wafer that has a high-quality silicon carbide single crystal thin film with less surface defects and the like, even on a silicon carbide single crystal substrate with small off-angle.SOLUTION: In a method of producing an epitaxial silicon carbide wafer, after a buffer layer is grown on a silicon carbide single crystal substrate and when one device operation layer is grown to have its thickness of 5 to 10 μm, a defect-reducing layer is grown for a predetermined period by lowering an atomic number ratio (C/Si ratio) of carbon to silicon, both contained in a material gas, from a value obtained when the one device operation layer is grown. Thereafter, the other device operation layer is grown while returning the C/Si ratio to the value obtained when the one device operation layer is grown.
摘要翻译：要解决的问题：为了提供具有较少表面缺陷等的高质量碳化硅单晶薄膜的外延碳化硅晶片的制造方法，即使在具有小的关闭的碳化硅单晶衬底上 -角度。解决方案：在制造外延碳化硅晶片的方法中，在碳化硅单晶衬底上生长缓冲层之后，当生长一个器件操作层以使其厚度为5至10μm时，通过从一个器件操作层生长时获得的值降低材料气体中所含的碳与硅的原子数比（C / Si比）（C / Si比），生长预定时间。此后，使另一个器件操作层生长，同时将C / Si比率返回到当一个器件操作层生长时获得的值。版权所有（C）2013，JPO＆INPIT

3. 发明专利

JP2013170104A Method for producing epitaxial silicon carbide wafer 有权
标题翻译：生产外延硅碳化硅的方法
公开(公告)号：JP2013170104A
公开(公告)日：2013-09-02
申请号：JP2012035361
申请日：2012-02-21
申请人： Nippon Steel & Sumitomo Metal Corp , 新日鐵住金株式会社
发明人： AIGO TAKASHI , ITO WATARU , FUJIMOTO TATSUO
IPC分类号： C30B29/36 , C23C16/42 , C30B25/20 , H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a method capable of producing an epitaxial silicon carbide wafer having a high-quality silicon carbide single crystal thin film with few surface defects or the like even on a silicon carbide single crystal substrate having a small off-angle.SOLUTION: In a method for producing an epitaxial silicon carbide wafer including a device operation layer by epitaxially growing silicon carbide by a CVD method on a silicon carbide single crystal substrate, silicon carbide is once epitaxially grown on the silicon carbide single crystal substrate to form an initial epitaxially-grown layer, and then epitaxial growth is discontinued, and at least the initial epitaxially-grown layer is etched and removed, and silicon carbide is epitaxially grown again, to thereby form the device operation layer.
摘要翻译：要解决的问题：提供一种即使在具有小偏角的碳化硅单晶衬底上也能够制造具有几乎没有表面缺陷等的高品质碳化硅单晶薄膜的外延碳化硅晶片的方法。解决方案：在碳化硅单晶衬底上通过CVD方法通过CVD方法外延生长碳化硅来制造包括器件操作层的外延碳化硅晶片的方法中，一旦在碳化硅单晶衬底上外延生长，形成碳化硅初始外延生长层，然后外延生长停止，并且至少蚀刻和去除初始外延生长层，并再次外延生长碳化硅，从而形成器件操作层。

4. 发明专利

JP2013216554A Apparatus for producing silicon carbide epitaxial wafer and method for producing silicon carbide epitaxial wafer 有权
标题翻译：用于生产碳化硅外延层的装置及其生产碳化硅外延层的方法
公开(公告)号：JP2013216554A
公开(公告)日：2013-10-24
申请号：JP2012090732
申请日：2012-04-12
申请人： Nippon Steel & Sumitomo Metal Corp , 新日鐵住金株式会社 , Nippon Steel & Sumikin Materials Co Ltd , 新日鉄住金マテリアルズ株式会社
发明人： ITO WATARU , AIGO TAKASHI , TACHIKAWA AKIYOSHI , HOSHINO TAIZO
IPC分类号： C30B29/36 , C23C16/42 , C30B25/20 , C30B30/02 , H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide: an apparatus for producing a silicon carbide epitaxial wafer in which step bunching is prevented from occurring even when an epitaxial film is grown on a silicon carbide single crystal substrate of a low off angle; and a method for producing the silicon carbide epitaxial wafer.SOLUTION: In an apparatus for producing a silicon carbide epitaxial wafer by epitaxially growing a silicon carbide single crystal on a silicon carbide single crystal substrate by means of a CVD technique, a power source is connected to a platform to place the silicon carbide single crystal substrate thereon, such that a voltage is applied to the placed silicon carbide single crystal substrate. Furthermore, according to a method for producing the silicon carbide epitaxial wafer, the silicon carbide single crystal is grown epitaxially while applying a voltage of 100V or lower to the silicon carbide monocrystal substrate.
摘要翻译：要解决的问题：提供：即使在低偏角的碳化硅单晶基板上生长外延膜也能防止发生阶梯聚集的碳化硅外延晶片的制造装置; 以及碳化硅外延片的制造方法。在通过CVD技术在碳化硅单晶衬底上外延生长碳化硅单晶的碳化硅外延片的制造装置中，连接电源到将碳化硅单晶衬底放置在其上的平台，使得向所放置的碳化硅单晶衬底施加电压。此外，根据碳化硅外延晶片的制造方法，向碳化硅单晶衬底施加100V以下的电压，外延生长碳化硅单晶。

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