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    • 5. 发明专利
    • POWER SEMICONDUCTOR DEVICE
    • JPS6431447A
    • 1989-02-01
    • JP18816387
    • 1987-07-27
    • NEC CORP
    • HORIE YOSHIHIRO
    • H01L23/34H01L23/373H01L23/40H01L23/495H01L29/06
    • PURPOSE:To improve heat dissipation and to eliminate the crack of a semiconductor element by opening a trapezoidal recess on an element substrate, so burying reinforcing metal of metal having high thermal conductivity that the rear side of the element becomes flat, and soldering the rear face to a heat sink tab. CONSTITUTION:A trapezoidal recess 8 inclined at 45 deg. with respect to a vertical direction on the tapered wall of a converted shape from the end of a part directly under a heated part 2 provided at the surface 1a of a semiconductor element 1 is opened, metal having high thermal conductivity, such as silver or gold is so buried in the recess 8 that the rear face 1b of the element 1 becomes flat by plating, as a reinforcing metal 9. The thus reinforced element 1 is die bonded by solder to a heat sink tab 4 at the rear side 1b by lead solder 5. Further, fine metal wirings 7 are connected to external leads 6 to be electrically connected. Accordingly, heat dissipation is remarkably improved, and even if the thickness of the element is reduced, it is not cracked.
    • 6. 发明专利
    • POWER SEMICONDUCTOR DEVICE
    • JPS61260647A
    • 1986-11-18
    • JP10290485
    • 1985-05-15
    • NEC CORP
    • HORIE YOSHIHIRO
    • H01L23/34H01L21/60
    • PURPOSE:To ensure excellent mounting and bonding by a method wherein the end of an outer lead is held in an insulating member positioned between a junction tab and a heat-radiating tab. CONSTITUTION:A power semiconductor element 1 is installed on the upper surface of a junction tab 2. On the lower surface of the junction tab 2, a heat- radiating tab 3 is placed with the intermediary on an insulating member 4. The end of an outer lead 6 is pushed into between the junction tab 2 and heat- radiating tab 3, where the end of the outer lead 6 is held in the insulating member 4, thus insulated from its environments. The outer lead 6 and an electrode of the power semiconductor element 1 is connected to a fine metal wire 5. Sealing with resin is accomplished for the power semiconductor element 1, while the lower surface of the heat-radiating tab 3 is left exposed for unimpeded radiation of heat. By using this technique, workability is improved during the processes of mounting and bonding, and the number is reduced of troubles attributable to short-circuiting.
    • 8. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPS6387754A
    • 1988-04-19
    • JP23362186
    • 1986-09-30
    • NEC CORP
    • HORIE YOSHIHIRO
    • H01L23/50H01L21/60
    • PURPOSE:To prevent occurrences of positional shift and bending failure in outer leads, by holding top end parts of the outer leads into an insulating member disposed on a rear surface of a connection tab. CONSTITUTION:A semiconductor element 1 is mounted on upper surface of a connection tab 2, and an insulating member 3 is disposed on a rear surface of the connection tab2, and top ends parts of outer leads 5 are buried into the insulating member 3. The connection tab 2 is separated from all outer leads 5 and held in its insulating state by the outer leads 5 through the insulating member 3. Metallic thin wires 4 are connected between the outer leads 5 and electrodes of the semiconductor element 1 and next sealed with resin for sealing. The insulating member 3 is molded by pouring resin into an iron mold in which the outer lead 2 is interposed between the upper and lower molding parts. Shift of a mutual position between the outer lead 5 and the connection tab 2, and deviation in parallelism are prevented from occurring.
    • 9. 发明专利
    • SEMICONDUCTOR INTEGRATED CIRCUIT
    • JPH01160031A
    • 1989-06-22
    • JP31987387
    • 1987-12-16
    • NEC CORP
    • HORIE YOSHIHIRO
    • H01L21/66H01L21/60
    • PURPOSE:To obtain an integrated circuit capable of measuring a performance characteristic of an element by a state of a chip, by providing an opening in an insulating film covering a surface of an element above an electrode and a measuring electrode connected to the pole through the opening. CONSTITUTION:An emitter region 2, a collector region 3, a base region 4 and a resistance region 3 are formed on a substrate 1. An emitter electrode 6, a collector electrode 7, a base electrode 8 and a resistance electrode 9 are formed of gold or metal of aluminum group and an element such as a transistor and a diode is formed in accordance with a circuit construction to form an integrated circuit chip. The upper part of the emitter electrode 6, the collector electrode 7 and the base electrode 8 of the insulating film 11 covering the whole surface of the integrated circuit chip is removed by photolithography to form an opening. Through this opening, the emitter electrode 6, the collector electrode 7 and the base electrode 8 are connected to form measuring electrodes 12E, 12C and 12B of metal such as gold or aluminum on the insulating film 11. As a result, it is possible to measure a performance characteristic of an element by a state of a chip.