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1. 发明专利

JP2004007197A MOBILE QoS COMMUNICATION SYSTEM 审中-公开
公开(公告)号：JP2004007197A
公开(公告)日：2004-01-08
申请号：JP2002159584
申请日：2002-05-31
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： YASUKAWA MASANAGA , NISHIKIDO ATSUSHI , KAWAMURA NORIYUKI
IPC分类号： H04W40/34 , H04L12/46 , H04L12/801 , H04L12/901 , H04L12/911 , H04L12/913 , H04W8/26 , H04W28/02 , H04W36/12 , H04W36/14 , H04W36/36 , H04W80/04 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To easily realize a large-scale mobile network environment wherein the number of mobile communications requiring QoS warrant is increased. SOLUTION: When a communication path from a communication opposite terminal to a mobile terminal is changed attendant on the movement of the mobile terminal, an anchor point to perform a path change for a new in-zone destination of the mobile terminal is set to any node in a setting path of a QoS path set to an old in-zone destination of the mobile terminal. This anchor point is selected to be an anchor point capable of sharing a QoS path setting path from the communication opposite terminal to the anchor point as a transfer path for QoS warrant for the same mobile communication session before and after the movement of the mobile terminal when the transfer path of the QoS path having already been selected is changed attendant on the movement of the mobile terminal. COPYRIGHT: (C)2004,JPO

2. 发明专利

JP2002009798A ROUTE CONTROL SYSTEM 失效
公开(公告)号：JP2002009798A
公开(公告)日：2002-01-11
申请号：JP2000193038
申请日：2000-06-27
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： MIYAMURA TAKASHI , KURIMOTO TAKASHI , YAMANAKA NAOAKI , AOKI MICHIHIRO , NISHIKIDO ATSUSHI
IPC分类号： H04L12/707 , H04L12/24 , H04L12/26 , H04L12/28 , H04L12/70 , H04L12/717 , H04L12/803
摘要： PROBLEM TO BE SOLVED: To provide a route control system that can enhance the throughput of an ATM network and efficiently operate network resources of the entire ATM network. SOLUTION: When a present route reaches an overload state, a route with a lighter load than that of the present route is selected as an object of a bypass route, and a load state is estimated on the basis of the frequency of occurrence of congestion in the past in this case. Comparing the consumed quantity of network resources of the present route with the consumed quantity of network resources of the bypass route executes switching from the present route to the bypass route when the difference is within a permissible range.

3. 发明专利

JPH10224829A WAVELENGTH MULTIPLEXER/DEMULTIPLEXER 失效
公开(公告)号：JPH10224829A
公开(公告)日：1998-08-21
申请号：JP2557997
申请日：1997-02-07
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： OGAWARA SHIGETETSU , NISHIKIDO ATSUSHI
IPC分类号： H04J14/00 , H04B10/07 , H04B10/27 , H04B10/29 , H04J14/02 , H04Q3/52 , H04B10/02
摘要： PROBLEM TO BE SOLVED: To provide the wavelength multiplexer/demultiplexer by applying synchronization control to wavelength bands of laser beams individually stimulated so as to decrease the wavelength band thereby improving a frequency utilizing efficiency. SOLUTION: A photo diode 6 is provided to wavelength control ports 4,5 whose transmission wavelength is f0 and a wavelength of an array waveguide grading filter AWGF2 is controlled so that an output difference is eliminated through electric conversion. The transmission wavelength characteristics are relatively arranged by conducting the similar operation for all nodes. On the other hand, the light stimulated from a node is outputted to a wavelength separate port 9 of the AWGF2. A photo diode 12 is placed to wavelength control ports 10, 11, and a wavelength of a laser diode 15 is controlled so that an output difference is eliminated through electric conversion. Thus, the wavelength of a laser diode 15 is in matching with the transmission wavelength of the wavelength separate port 9. Other lights (wavelength band f1-fn) are separated by each wavelength at the AWGF2.

4. 发明专利

JP2003249951A MOBILE COMMUNICATION SYSTEM AND NETWORK EDGE, AND COMMUNICATION DESTINATION TERMINAL AND PROGRAM 审中-公开
公开(公告)号：JP2003249951A
公开(公告)日：2003-09-05
申请号：JP2002048278
申请日：2002-02-25
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： YASUKAWA MASANAGA , NISHIKIDO ATSUSHI , KAWAMURA NORIYUKI
IPC分类号： H04L12/913 , H04L12/749 , H04L12/763 , H04W8/04 , H04W8/12 , H04W28/12 , H04W40/36 , H04W80/04 , H04L12/56 , H04Q7/34 , H04Q7/36
摘要： PROBLEM TO BE SOLVED: To perform mobile communication ensuring QoS (quality of service) between a communication destination terminal and a mobile terminal in a mobile IP (Internet protocol) communication environment and to optimize a route for packet transfer to the mobile terminal. SOLUTION: A network edge storing the communication destination terminal acquires location information of the mobile terminal by inquiring a home agent or referring to its own binding table and directly sets a QoS ensuring path to the mobile terminal on the basis of the acquired location information of the mobile terminal. COPYRIGHT: (C)2003,JPO

5. 发明专利

JPH07321843A OPTICAL PACKET SWITCH 失效
公开(公告)号：JPH07321843A
公开(公告)日：1995-12-08
申请号：JP11276994
申请日：1994-05-26
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： TSUKADA MASAHITO , MISAWA AKIRA , SHIMAZU YOSHIHIRO , NISHIKIDO ATSUSHI
IPC分类号： H04Q3/52 , H04L12/931 , H04L12/933 , H04L12/935 , H04Q11/04 , H04L12/56
摘要： PURPOSE:To switch an optical packet signal large in capacity and to adjust output by the use of an output feasibility signal from a switch at the next stage by performing routing and buffering in the form of optical packet signal as it is. CONSTITUTION:Packet interface modules 12-1 to 12-N input packet signals from input lines 10-1 to 10-N, and detect destination addresses, and output by converting to the optical packet signals of wavelength lambda1-lambdaN different at every input line. NXM optical star couplers 13 perform the multiplex/ demultiplex of the optical packet signal of every kind of wavelength. Optical packet selection optical buffers 14-1 to 14-N perform the routing and the buffering addressed to corresponding output lines 11-1 to 11-N from wavelength- multiplexed optical packet signals.

6. 发明专利

JPH05336099A 失效
公开(公告)号：JPH05336099A
公开(公告)日：1993-12-17
申请号：JP14081092
申请日：1992-06-01
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： HINO SHIGEKI , NISHIKIDO ATSUSHI , YAMAZAKI KIMIYOSHI
IPC分类号： H04J3/06 , H04L7/08 , H04L12/48
摘要： PURPOSE:To synchronize the head of a cell by defining a code, which violates the nBIC rule, as the head of the cell at the time of detecting this code on the reception side. CONSTITUTION:n-bit parallel data from data input lines 111 to 11n, a cell head synchronizing signal from a cell head synchronizing signal input line 12, and a clock from a clock input line 13 are inputted to a transmission circuit 10. A multiplexer 14 takes in n-bit parallel data and the inverted output signal of an exclusive OR circuit 15 which operates exclusive OR between one bit of this data and the cell head synchronizing signal. The multiplexing processing is performed there with respect to the nBIC code where two prescribed bits have inversion relations. A demultiplexer 23 of a reception circuit 20 expands the reception signal to n+1 bits in parallel synchronously with the clock and outputs n-bit parallel data to data output lines 241 to 24n and sends two prescribed bits to be used for check of the nBIC code rule to an exclusive OR circuit 25. The circuit 25 sends the synchronous detection signal to a first protecting circuit 26. The circuit 26 sends a synchronizing signal in the high level to an AND circuit 22.

7. 发明专利

JPH04163532A LIGHT CLOCK EXTRACTION CIRCUIT 失效
公开(公告)号：JPH04163532A
公开(公告)日：1992-06-09
申请号：JP28842890
申请日：1990-10-29
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： HIMENO AKIRA , TAKAYAMA KOJI , NISHIKIDO ATSUSHI
IPC分类号： G02F2/00 , H04B10/00 , H04B10/556 , H04L7/00
摘要： PURPOSE:To make high speed operation performable and a high frequency light clock extractably by utilizing the injection synchronous phenomenon of a semiconductor laser and extracting a light clock with two semiconductor lasers, a light branch circuit and a light wave circuit. CONSTITUTION:Input light 6 injected into both first and second semiconductor lasers 8, 9 via a light bran circuit 7 draws output light of the first semiconductor laser 8 in its carrier frequency f1 by means of each injection synchronous phe nomenon of these semiconductor lasers 8, 9, and also it draws output light of the first semiconductor laser 8 in the side band frequency of the input light 6, namely, frequency distant as far as clock frequency Df from the carrier frequency f1. These two output light waves are joined together by a light wave circuit 10, but at this time, they interfere with each other, and a difference in the frequencies, that is, a light signal, where light power alternately varies in synchronization with the clock frequency f of the input light 6, namely, a light clock is outputted. With this constitution, high speed operation is made performable, thus the high frequency light clock is extractable.

8. 发明专利

JP2003250138A VIDEO ON DEMAND COMMUNICATION SYSTEM AND METHOD 审中-公开
公开(公告)号：JP2003250138A
公开(公告)日：2003-09-05
申请号：JP2002048253
申请日：2002-02-25
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： SHIMIZU MASAFUMI , YASUKAWA MASANAGA , NISHIKIDO ATSUSHI , KAWAMURA NORIYUKI
IPC分类号： H04L12/70 , H04L12/761 , H04L12/953 , H04N7/173 , H04N21/2389 , H04N21/4385 , H04N21/6405 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To provide a video on demand (VoD) communication system capable of reducing a required band of a network when using an IP multicast protocol to execute VoD distribution and relieving a load on reception processing and transfer processing. SOLUTION: In dividing contents, a server divides the contents so that a relationship between an n-th division file time and an (n-1)th division file time is expressed in a geometrical progression Sn=α×Sn-1, and a client receives the contents by one multicast group each and uses a band of a multiple of α in comparison with a stream reproduction band to receive and reproduce the contents. COPYRIGHT: (C)2003,JPO

9. 发明专利

JPH06125356A SYNCHRONIZATION CIRCUIT 失效
公开(公告)号：JPH06125356A
公开(公告)日：1994-05-06
申请号：JP27583492
申请日：1992-10-14
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： HINO SHIGEKI , NISHIKIDO ATSUSHI , NAGASE AKIRA , YAMAZAKI KIMIYOSHI
IPC分类号： H04L7/10 , H04Q11/04 , H04L12/48
摘要： PURPOSE:To provide a synchronization circuit able to take bit synchronization and cell frame synchronization newly for each cell. CONSTITUTION:A 1st pattern generating means 101 adds a bit synchronization pattern to each data cell and a 2nd pattern generating means 102 adds a frame synchronization pattern to each data cell. A bit phase synchronization means 103 at a receiver side starts bit phase detection operation after the reception of a cell and outputs the purport that the bit synchronization pattern of a succeeding reception cell is detected after detecting it, and a cell frame phase synchronization means 104 starts frame phase detection operation of a reception cell when the bit phase synchronization means 103 detects the bit synchronization pattern and outputs a signal representing the start of a data cell when the frame synchronization pattern is detected.

10. 发明专利

JPH05219000A FRAME SYNCHRONIZATION TYPE DEMULTIPLEXER CIRCUIT 失效
公开(公告)号：JPH05219000A
公开(公告)日：1993-08-27
申请号：JP1685592
申请日：1992-01-31
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： HINO SHIGEKI , NISHIKIDO ATSUSHI
IPC分类号： H04J3/04 , H04J3/06 , H04L7/08 , H04Q11/04
摘要： PURPOSE:To realize simple and small sized configuration by monitoring signals inverted to each other at frame synchronization and detecting out of frame synchronism when the signals are coincident so as to implement frame synchronization control. CONSTITUTION:A serial parallel conversion circuit 11 outputs signals of each channel by one frame separately at an optional phase. An output coincidence monitor circuit 12 is connected to output terminals from which signals X, X' inverted to each other at all times at the frame synchronization establishment and monitors the signals at the two output terminals. In the case of out of frame synchronism, since the signals at the two output terminals are independent signals, they are coincident with a probability. Thus, the monitor circuit 12 confirms out of frame synchronism when the signals at the two output terminals are coincident, and the circuit 12 outputs a prescribed control signal to the conversion circuit 11, which implement frame synchronization control for phase adjustment.

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