会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明专利
    • Oscillation circuit
    • 振荡电路
    • JPS59175212A
    • 1984-10-04
    • JP5086283
    • 1983-03-24
    • Mitsubishi Electric Corp
    • KANOU KENJI
    • H03K3/0231B60Q11/00G08B3/10G08B5/36G08B29/18H03K3/023
    • G08B29/26B60Q11/00G08B3/10G08B5/36H03K3/023
    • PURPOSE: To prevent the output of a reference voltage generating circuit from varying against a noise with small pulse width by utilizing the response delay time of a relay for a circuit which uses the relay.
      CONSTITUTION: The input of the reference voltage generating circuit 7 is connected to an output terminal to which one terminal of the relay contact 2a of the relay 2, i.e. a lamp 5 as a load is connected. Then the circuit outputs the 1st reference voltage V
      th1 when the output of the relay 2 is at a high level or the 2nd reference voltage V
      th2 when at a low level. When a noise is applied, the potential at a point (a) varies from V
      th1 to V
      th2 momentarily and the voltage to the uninverted input terminal of a comparator 1 rises above the voltage at the inverted input terminal, so the voltage at a point (c) goes up to the high level, but the potential at a point (d) does not drop to the low level because of the response delay of the relay 2. The pulse width of the noise is shorter than the response time of the relay 2, so the output point (a) of the circuit 7 returns to V
      th1 and the potential at the point (c) also reduced to low.
      COPYRIGHT: (C)1984,JPO&Japio
    • 目的:通过利用继电器对使用继电器的电路的响应延迟时间,防止参考电压产生电路的输出与具有小脉冲宽度的噪声相对应。 构成:参考电压产生电路7的输入连接到输出端子,继电器2的继电器触点2a的一个端子,即作为负载的灯5连接到该输出端子。 然后,当继电器2的输出处于高电平时,电路输出第一基准电压Vth1,或在低电平时输出第二基准电压Vth2。 当施加噪声时,(a)点处的电位瞬间从Vth1到Vth2变化,并且比较器1的未反相输入端的电压上升到反相输入端的电压以上,因此在(c )上升到高电平,但是由于继电器2的响应延迟,(d)点的电位不下降到低电平。噪声的脉冲宽度比继电器2的响应时间短 ,因此电路7的输出点(a)返回到Vth1,并且(c)点的电位也降低到低电平。
    • 2. 发明专利
    • Base current correcting circuit
    • 基极电流校正电路
    • JPS5917712A
    • 1984-01-30
    • JP12870182
    • 1982-07-21
    • Mitsubishi Electric Corp
    • KANOU KENJI
    • H03F3/45H03F1/56H03F3/34H03F3/343
    • H03F1/56
    • PURPOSE:To suppress the input bias current without degrading characteristics, by flowing a current to an NPN transistor (TR) by the collector of a lateral PNP TR in a base current correcting circuit incorporated in an operational amplifier. CONSTITUTION:Collectors 24a and 24b of a multi-collector lateral PNP TR 24 which has the emitter connected to a constant current source 22 are connected to respective bases of the first and the second NPN TRs 21 and 23. When the first and the second NPN TRs 21 and 23 have the integrated circuit structure, respective grounded emitter current amplification factors are matched well, and therefore, a current I of the constant current source 22 which is set to the same value as the collector current I of the TR21 becomes the collector current of the second NPN TR 23 approximately if each of said current amplification factor is high sufficiently. Consequently, a current is not flowed to an input terminal T1.
    • 目的:通过在运算放大器中并入的基极电流校正电路中的横向PNP TR的集电极将电流流向NPN晶体管(TR)来抑制输入偏置电流而不降低特性。 构成:具有连接到恒流源22的发射极的多集电极横向PNP TR 24的集电极24a和24b连接到第一和第二NPN TR 21和23的相应基极。当第一和第二NPN TR 21和23具有集成电路结构,相应的接地发射极电流放大因子匹配良好,因此恒定电流源22的电流I被设置为与TR21的集电极电流I相同的值成为集电极 如果每个所述电流放大系数都足够高,则近似第二NPN TR23的电流。 因此,电流不流入输入端子T1。
    • 3. 发明专利
    • Oscillating circuit
    • 振荡电路
    • JPS58187019A
    • 1983-11-01
    • JP7240882
    • 1982-04-26
    • Mitsubishi Electric Corp
    • KANOU KENJI
    • H03K3/66H03K3/0231
    • H03K3/0231
    • PURPOSE:To prevent malfunction due to noise from a load, by providing the 2nd Schmitt circuit having two threshold values between two threshold values of the 1st Schmitt circuit and driving the load with the output. CONSTITUTION:CR oscillation is performed by the 1st Schmitt circuit 1 having two threshold values and a resistor 2 and a capacitor 3, the input is connected in common to the 1st Schmitt circuit 1, and the 2nd Schmitt circuit 7 which has the two threshold values between the two threshold values of the 1st Schmitt circuit 1, is provided and a load such as a relay 4 is driven with the output of the circuit 7. As a result, malfunction due to noise from the load is prevented.
    • 目的:为了防止由负载噪声引起的故障,通过提供第二施密特电路在第一施密特电路的两个阈值之间具有两个阈值并用输出驱动负载。 构成:由具有两个阈值的第一施密特电路1和电阻器2和电容器3执行CR振荡,该输入共同连接到第一施密特电路1,第二施密特电路7具有两个阈值 提供第一施密特电路1的两个阈值之间,并且由电路7的输出驱动诸如继电器4的负载。结果,防止了由于来自负载的噪声导致的故障。
    • 5. 发明专利
    • OPERATIONAL AMPLIFIER CIRCUIT
    • JPS58127417A
    • 1983-07-29
    • JP1050282
    • 1982-01-25
    • MITSUBISHI ELECTRIC CORP
    • KANOU KENJI
    • H03F3/34H03F3/347
    • PURPOSE:To attain a small phase correcting capacity by reducing the number of sections of phase inversion in using a common emitter connection for an output circuit and to increase the output amplitude by making an output TR operationable to the saturating state. CONSTITUTION:Bases of two TRs Q1, Q2 are connected to two input terminals 11, 12 and a differential output of the TRs Q1, Q2 is outputted at a preamplifier 1, to the output of which an intermediate amplifier 2a obtaining the current gain only consisting of a constant current source I2 providing a bias current and a PNP TRQ15 of emitter follower constitution is connected. The output terminals are led from the connecting point of both collectors of TRs Q6, Q7 of a post- stage amplifier 3a consisting of the output TRs Q6, Q7 and diodes D1, D2 setting an NPN TRQ8 and a PNP TRQ9 (the output of the amplifier 2a is connected to the emitters in common and the connection is common-base connection) to the class AB operation.
    • 9. 发明专利
    • FREQUENCY COMPARING DEVICE
    • JPS60236072A
    • 1985-11-22
    • JP9491084
    • 1984-05-09
    • MITSUBISHI ELECTRIC CORP
    • MORI SHINTAROUKANOU KENJI
    • G01R23/15G01P3/489H03K5/19H03K5/26
    • PURPOSE:To simplify the processing of the next stage, and to execute easily other control by using a comparing output by providing a gate and a flip-flop, and denoting the comparing output of an input frequency and a set frequency by two values of ''H'' and ''L''. CONSTITUTION:An AC input signal is inputted to a trigger signal generating circuit 2, and a monostable circuit 3 generates a pulse having pulse width of a set time by a trigger signal of a time interval being proportional to an input frequency. In case the input frequency is below a set frequency, when a trigger pulse is supplied to a set input terminal S of an FF circuit through an OR gate 5, the output Q remains at ''L'' state because the output from the monostable circuit 3 is supplied to a reset input R. On the other hand, in case the input frequency is above the set frequency, the output of the monostable circuit 3 always goes to ''H'', and when the trigger pulse is supplied, the output Q of the FF circuit 6 goes to ''H'', and the output Q is held in ''H'' until ''L'' is applied to the reset input R.
    • 10. 发明专利
    • GENERATING CIRCUIT OF INFLOW/OUTFLOW CURRENT
    • JPS60119108A
    • 1985-06-26
    • JP22800283
    • 1983-11-30
    • MITSUBISHI ELECTRIC CORP
    • KANOU KENJIMORI SHINTAROU
    • H03F3/343G05F1/56H03F3/34
    • PURPOSE:To fix the current ratio of inflow current to outflow currnt by connecting a buffer circuit having extremely high input impedance so that the input current becomes ''0'' and having no voltage gain to the collector of the 2nd transistor (TR) connected to an output terminal, shifting the output potential of the buffer circuit by a prescribed voltage and then impressing the shifted potential to the 3rd and 4th TRs. CONSTITUTION:The titled current generating circuit is constituted by the 1st and 2nd TRs Q1, Q2 of which bases and emitters are connected in common and the 3rd and 4th TRs Q3, Q4 of which respective bases and collectors are connected in common with each other and respective collectors are connected to the collectors of the 1st and 2nd TRs Q1, Q2 respectively. The buffer circuit 11 having extremely high input impedance and having no voltage gain is connected to the collector of the TR Q2 connected to an output terminal and the output potential of the circuit 11 is shifted by the prescribed voltage and the shifted potential is impressed to the emitters of the TRs Q3, Q4. Thus, the ratio of inflow current to outflow current obtained from an output terminal can be set up independently of the value of the output voltage.