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1. 发明专利

JP2004032920A Protective relay system 有权
公开(公告)号：JP2004032920A
公开(公告)日：2004-01-29
申请号：JP2002186730
申请日：2002-06-26
申请人： Kansai Electric Power Co Inc:The , Mitsubishi Electric Corp , 三菱電機株式会社 , 関西電力株式会社
发明人： TANAKA YASUYUKI , ITO KENJI , NAKAYAMA HIDEO , YOSHIMI MASASHI , KOIZUMI HIROSHI
IPC分类号： H02H3/28
摘要： PROBLEM TO BE SOLVED: To obtain a synchronous control algorithm which efficiently controls the synchronization between terminals in a protective relay system with LAN used for computer/transmission line. SOLUTION: The protective relay system is so constituted that the current at both the ends of a section to be protected in a power transmission line is periodically sampled and subjected to A-D conversion. The converted current is transmitted between general-purpose computers 10 and 11 provided with a protecting function at both the ends through a LAN line 12. Then, differential computation is carried out on the current at the both ends. Control is exercised to synchronize the sampling timing of the general-purpose computers 10 and 11 so that the difference between a previously computed transmission delay time (Ta+Tb) between the general-purpose computers 10 and 11 and an actual time (Tx) actually measured online will be eliminated. COPYRIGHT: (C)2004,JPO

2. 发明专利

JP2001069661A PROTECTION RELAY SYSTEM 失效
公开(公告)号：JP2001069661A
公开(公告)日：2001-03-16
申请号：JP24548899
申请日：1999-08-31
申请人： MITSUBISHI ELECTRIC CORP , KANSAI ELECTRIC POWER CO
发明人： TOTSU YURI , ITO KENJI , NAKAYAMA HIDEO , INOUE KAZUSHIGE , SHIMANO SHINJI
IPC分类号： H02H3/02 , H02H3/00
摘要： PROBLEM TO BE SOLVED: To reduce development costs by connecting general-purpose computers together via LAN, and synchronizing the times at which processings are made by a computer for input/output processing with times processed by a computer for protection relay calculation. SOLUTION: When a computer 30 for input/output processing as an input/ output processing terminal for transmission line protection outputs system information to LAN 50, a general-purpose computer 40 for protection relay calculation is fed with the system information from the LAN 50 and performs relay operation. If an circuit breaker in the power system needs to be opened, the computer for protection relay calculation outputs a trip signal to the LAN 50. At this time, since the timing for sampling the respective amounts of information on the power system needs to be the same, a time-of-day synchronizing means is constituted, using the transfer control parts 64 and 69 of the computers, and the time-of-day synchronization control between the computers 30 and 40 is carried out by software processing.

3. 发明专利

JP2001069660A PROTECTION RELAY SYSTEM 失效
公开(公告)号：JP2001069660A
公开(公告)日：2001-03-16
申请号：JP24546499
申请日：1999-08-31
申请人： MITSUBISHI ELECTRIC CORP , KANSAI ELECTRIC POWER CO
发明人： TOTSU YURI , ITO KENJI , NAKAYAMA HIDEO , INOUE KAZUSHIGE , SHIMANO SHINJI
IPC分类号： H02H3/02 , G06F15/16
摘要： PROBLEM TO BE SOLVED: To reduce development cost by synchronizing the times processed by a computer for input and output processing with the times of day processed by a computer for protection relay calculation, and adopting as a scheme for data communication between the computers a transmission right scheme where data communication is performed on rotating basis. SOLUTION: When a computer 30 for input/output processing as an input/ output processing terminal for transmission line protection outputs system information to LAN 50, a computer 40 for protective relay calculation is fed with the system information from the LAN 50 and performs relay operation. If an circuit breaker in the power system needs to be opened, the computer for protective relay calculation outputs a trip signal to the LAN 50. The transmission control unit of the LAN 50 performs transmission right communication control process to perform transmission in rotation, so that the data will not collide with each other. Since the protective relay system is constituted using general- purpose computers as mentioned and the general-purpose computers are connected with each other via LAN 50, development cost can be reduced by applying innovated general-purpose technologies.

4. 发明专利

JP2001045647A PROTECTIVE RELAY SYSTEM 失效
公开(公告)号：JP2001045647A
公开(公告)日：2001-02-16
申请号：JP21429699
申请日：1999-07-28
申请人： MITSUBISHI ELECTRIC CORP , KANSAI ELECTRIC POWER CO
发明人： TOTSU YURI , ITO KENJI , NAKAYAMA HIDEO , INOUE KAZUSHIGE , SHIMANO SHINJI
IPC分类号： H02H3/02
摘要： PROBLEM TO BE SOLVED: To reduce development cost by forming a device which performs inputting of system information and outputting of a trip signal using a general- purpose computer and a device which performs relay computation using a general-purpose computer, and performing the connection between general-purpose computer through LAN. SOLUTION: System information indicating the state of an electric power system are inputted into general-purpose input/output processing computers 31-35, and outputted to LAN 50, and a trip signal is inputted from the LAN 50 and outputted to a trip circuit in a breaker. The input/output terminal 31 which is an input/output processing computer for protecting a transmission line is a processing terminal for protecting the transmission line, the input/output terminals 32, 33 for protecting transformer is a processing terminal for protecting a transformer, the input/output terminal 34 for protecting a bus is a processing terminal for protecting the bus, and the input/output terminal 35 for protecting a distribution line is a processing terminal for protecting the distribution line. It is thus possible to reduce development cost.

5. 发明专利

JP2006014416A Fault point locating method and fault point locating system 有权
标题翻译：故障点定位方法和故障点定位系统
公开(公告)号：JP2006014416A
公开(公告)日：2006-01-12
申请号：JP2004184564
申请日：2004-06-23
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： NISHIMURA TATSUFUMI , ITO KENJI
IPC分类号： H02H3/28 , G01R31/08 , H02H3/00
CPC分类号： Y04S10/522
摘要： PROBLEM TO BE SOLVED: To secure sufficient precision in locating of a fault point even in case that a system fault such as that bus voltage becomes approximately zero occurs. SOLUTION: Sampling data in each of PCM current differential relay devices 2A and 2C provided for each of transmission lines 1L and 2L consisting of at least two circuits are preserved, and also the drop of bus voltage is detected, and when the above bus voltage drops to a specified value or under, the fault point is located based on the data reaching the above specified value during fault occurrence out of the above preserved sampling data. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：即使在发生系统故障（例如总线电压变为近似零）的情况下，为了确保故障点的定位的足够的精度。解决方案：保存为由至少两个电路组成的传输线1L和2L中的每一个提供的每个PCM电流差动继电器装置2A和2C中的采样数据，并且还检测总线电压的下降，并且当上述总线电压下降到指定值或以下时，故障点位于上述保存的采样数据发生故障时，基于达到上述指定值的数据。版权所有（C）2006，JPO＆NCIPI

6. 发明专利

JP2002198847A COMMUNICATION DEVICE, FREQUENCY SYNTHESIZER, COMMUNICATION SYSTEM AND SYNTHESIZING METHOD 审中-公开
公开(公告)号：JP2002198847A
公开(公告)日：2002-07-12
申请号：JP2001336945
申请日：2001-11-01
申请人： MITSUBISHI ELECTRIC CORP
发明人： ITO KENJI , TAJIMA KENICHI , NISHIMURA SHUJI , IIDA AKIO
IPC分类号： H03B28/00 , H04B1/26 , H04B1/3822 , H04B1/40
摘要： PROBLEM TO BE SOLVED: To obtain a transmitter/receiver which can control frequencies with high accuracy at low cost, and obtain a low-spurious frequency synthesizer at low noises for use therein. SOLUTION: In a transmitter/receiver, frequencies of a direct digital synthesizer provided in a local oscillation circuit so as to reduce an error are controlled in accordance with information of a frequency error detection circuit.

7. 发明专利

JP2001320170A MULTILAYER SUBSTRATE MODULE 失效
公开(公告)号：JP2001320170A
公开(公告)日：2001-11-16
申请号：JP2000137599
申请日：2000-05-10
申请人： MITSUBISHI ELECTRIC CORP
发明人： MAEDA KENICHI , ONO MASAYOSHI , SUEMATSU KENJI , TAKAGI SUNAO , ITO KENJI , KATSURA TAKATOSHI
IPC分类号： H05K1/11 , H01P3/08 , H03F3/60 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To solve the problem of a conventional multilayer substrate module such that there is a possibility of a circuit oscillating due to the occurrence of an inductance component between an earth and a common ground layer to which the through holes for ground of an amplifier and a matching circuit are connected in common. SOLUTION: A multilayer substrate module is equipped with a multilayer substrate 1, a semiconductor substrate 4 equipped with an amplifier and matching circuits 5 and 6 provided at the surface of the multilayer substrate 1, an earth 11, a through hole 13 for ground for connecting a lead wire for ground of the amplifier with the earth 11, and through holes 12 and 14 for ground for connecting the lead wires for ground of those matching circuits with the earth 11 severally made separately in every matching circuit.

8. 发明专利

JP2000252753A EVEN NUMBER HARMONIC MIXER, ORTHOGONAL MIXER AND IMAGE REJECTION MIXER 失效
公开(公告)号：JP2000252753A
公开(公告)日：2000-09-14
申请号：JP5174699
申请日：1999-02-26
申请人： MITSUBISHI ELECTRIC CORP
发明人： SHIMOZAWA MITSUHIRO , ITO KENJI
IPC分类号： H03D7/02 , H03D9/06
摘要： PROBLEM TO BE SOLVED: To obtain an even number harmonic mixer, an orthogonal mixer and an image rejection mixer that can be miniaturized without incurring increase in current consumption. SOLUTION: In the mixer, there is provided an RF/LO block circuit 21 which blocks passing of RF and LO signals that permits passing of an IF signal outputted from a connecting point 14 of mixer diodes 12, 13 and with an RF/LO block circuit 23 that blocks passing of the RF and LO signals that permits passing of an IF signal outputted from a connecting point 15 of the mixer diodes 12, 13.

9. 发明专利

JPH11330865A MIXER, BALUN, AND TRANSMITTER AND RECEIVING DEVICE 失效
公开(公告)号：JPH11330865A
公开(公告)日：1999-11-30
申请号：JP13576298
申请日：1998-05-18
申请人： MITSUBISHI ELECTRIC CORP
发明人： SHIMOZAWA MITSUHIRO , ITO KENJI , KAWAKAMI KENJI , IKEMATSU HIROSHI , ISODA YOJI
IPC分类号： H03D7/12 , H03D7/14 , H04B1/04 , H04B1/26
摘要： PROBLEM TO BE SOLVED: To realize a miniaturized mixer with which an IF band can be made wide, and to obtain a balun to be used for this, and a transmitting/receiving device using this. SOLUTION: One of RF signals outputted from an RF balun 2a with an anti-phase is impressed to drain terminals 6a and 6b of first and second FET 5a and 5b, the other is impressed to drain terminals 6c and 6d of third and fourth FET 5c and 5d, one of LO waves outputted from an LO balun 4a with an anti-phase is impressed to gate terminals 7a and 7b of first and second FET 5a and 5b, and the other is impressed to gate terminals 7c and 7d of third and fourth FET 5c and 5d. Then, IF signals outputted to source terminals 8a and 8d of the first and fourth FET 5a and 5d and source terminals 8b and 8c of the second and third FET 5b and 5c are combined by an IF signal co- phase combiner 30a, and outputted to the outside part.

10. 发明专利

JPH11191717A ORTHOGONAL MIXER, AND TRANSMITTER AND RECEIVER USING THE SAME 失效
公开(公告)号：JPH11191717A
公开(公告)日：1999-07-13
申请号：JP35850297
申请日：1997-12-25
申请人： MITSUBISHI ELECTRIC CORP
发明人： SHIMOZAWA MITSUHIRO , ITO KENJI , KAWAKAMI KENJI , ISODA YOJI
IPC分类号： H03D7/00 , H03D7/14 , H04L27/20 , H04L27/22
摘要： PROBLEM TO BE SOLVED: To obtain the transmitter with high orthogonal modulation accuracy and the receiver with high orthogonal demodulation accuracy. SOLUTION: High frequency signal terminals of 1st and 2nd unit mixers 58a, 58b are set to the balanced mode, one input/output terminal of a 1st phase shift circuit 52, where the input/output terminal is set to the balanced mode, connects with a high frequency signal terminal of the 1st unit mixer 58a, and one input/output terminal of a 2nd phase shift circuit 53 where the input/output terminal is set to the balanced mode, connects with a high frequency signal terminal of the 2nd unit mixer 58b. Thus, a level of a high frequency signal in the middle of the balanced mode of each phase shift circuit is set to zero, thereby obtaining a ground level equivalently without physical connection to a ground connector.

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