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1. 发明专利

JP2006134320A Internet connection terminal 审中-公开
标题翻译：互联网连接终端
公开(公告)号：JP2006134320A
公开(公告)日：2006-05-25
申请号：JP2005305752
申请日：2005-10-20
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： ISHII YOSHINORI , ADACHI TOSHIYA , ARAKAWA YASUHIRO
IPC分类号： G06F13/00 , H04N5/44 , H04N7/173
摘要： PROBLEM TO BE SOLVED: To dissolve distress of a user in waiting time of communication at Internet connection and to dissolve the occurrence of beat in simultaneously displaying a computer image such as the Internet and a television image on two screens. SOLUTION: An Internet television receiver has: a two screen signal generation device 19 with a function for receiving or displaying a television signal and simultaneously displaying two signals, a television signal and an internet browser signal on two screens; and a TV microcomputer 16 which detects that an internet signal processor 18 is under communication via a modem 10, instructs a communication state and controls a function to switch a one screen mode and a two screen mode. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了在互联网连接时解决用户等待通信时间的困扰，并且在两个屏幕上同时显示诸如因特网和电视图像的计算机图像的同时解决节拍的发生。互联网电视接收机具有：具有接收或显示电视信号并同时在两个屏幕上显示两个信号，电视信号和因特网浏览器信号的功能的双屏幕信号产生设备19; 以及检测到互联网信号处理器18经由调制解调器10进行通信的TV微计算机16，指示通信状态并控制切换一屏模式和双屏模式的功能。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JPH07312702A TELEVISION RECEIVER 失效
公开(公告)号：JPH07312702A
公开(公告)日：1995-11-28
申请号：JP10415894
申请日：1994-05-18
申请人： MITSUBISHI ELECTRIC CORP
发明人： ISHII YOSHINORI , SHIMA JUICHI
IPC分类号： H04N5/16 , H04N3/16 , H04N3/27
摘要： PURPOSE:To obtain a television receiver in which the difference of the optical output between the middle part of the screen and a peripheral part even when a video software whose aspect ratio is 4:3 is displayed on the entire screen of a CRT whose aspect ratio is 16:9. CONSTITUTION:The television receiver is provided with a horizontal deflection circuit 21 that deflects a signal so as to extend the linearity of horizontal deflection in the middle part of the screen up to left and right peripheral parts in order to display a video software whose aspect ratio is 4:3 is displayed on the entire screen of a CRT whose aspect ratio is 16:9, with a correction waveform generating means 20 generating a parabolic wave of a horizontal period, with a modulation means 18 modulating the amplitude of a video signal with the output signal of the correction waveform generating means 20 and with a switching means 3 arranged between the correction waveform generating means 20 and the modulation means 18. Then the switching means 23 is closed when the linearity is switched to be extended up to the peripheral parts.

3. 发明专利

JPH07298159A TELEVISION RECEIVER 失效
公开(公告)号：JPH07298159A
公开(公告)日：1995-11-10
申请号：JP8333794
申请日：1994-04-21
申请人： MITSUBISHI ELECTRIC CORP
发明人： KURACHI AKIHITO , ISHII YOSHINORI
IPC分类号： H04N5/46 , H04N3/32 , H04N7/01
摘要： PURPOSE:To prevent a back level of a video image from being clamped to a black level of a non-image part by allowing a controller to activate a black level expansion circuit, a vertical contour correction circuit or an electron beam speed modulator for a video image period depending on a detection signal detecting a signal to identify a TV signal. CONSTITUTION:When a detection signal is received from an identification signal detection circuit 21, a vertical blanking pulse representing a period of a video image part and a non-image part corresponding to a letter box size is generated. A switch circuit 23 gives the vertical blanking pulse to a black level expansion circuit 4, a vertical contour correction circuit 5 and an SVM circuit 7. The circuits 4,5,7 receiving the vertical blanking pulse are activated only for a period of th video image part of the vertical blanking signal and inactivated for other periods. Since the black level expansion circuit 4, the vertical contour correction circuit 5 and the SVM circuit 7 are not activated for the other periods, the black level of the video image is not clamped to the black level of the non- image part.

4. 发明专利

JPH06303451A SCANNING SPEED MODULATING CIRCUIT 失效
公开(公告)号：JPH06303451A
公开(公告)日：1994-10-28
申请号：JP8976093
申请日：1993-04-16
申请人： MITSUBISHI ELECTRIC CORP
发明人： ISHII YOSHINORI
IPC分类号： H04N3/32
摘要： PURPOSE:To display the rising and falling transient parts as the sharp edges by supplying selectively the primary differential signal acquired by applying the primary differentiation to a video signal and the signal acquired by delaying the primary differential signal to a modulating coil. CONSTITUTION:A video signal is supplied to a primary differentiating circuit 14 and a primary differential signal is acquired. A delay signal is acquired through a delay line 15 which delays the primary differential signal. These differential and delay signals are supplied to the sides (a) and (b) of an SW 16 respectively. The undelayed primary differential signal is supplied to a controller 17. Then the controller 17 integrates the primary differential signal to switch the SW 16 to the side (a) only when the level of integration output is equal to the positive output (excluding 0) and otherwise switches the SW 16 to the side (b). Then integrated differential signal is amplified by an amplifier 18, and a current is supplied to a speed modulating coil 11 through a drive circuit 19. Thus it is possible to delay the scanning speed in the periods of both rising and falling transient parts of the video signal.

5. 发明专利

JPH06138833A VIDEO DISPLAY DEVICE 失效
公开(公告)号：JPH06138833A
公开(公告)日：1994-05-20
申请号：JP28598592
申请日：1992-10-23
申请人： MITSUBISHI ELECTRIC CORP
发明人： ISHII YOSHINORI , NIINO SUSUMU
IPC分类号： G09G1/00 , G09G1/04 , G09G1/16 , H04N3/185
摘要： PURPOSE:To improve the regulation of a high voltage and reduce the size and price by driving the drive transistor(TR) and high-voltage output TR of a high- voltage generating circuit by using a 2nd horizontal drive pulse of specific frequency. CONSTITUTION:When a 2nd video input signal is inputted to the video display device, the 2nd horizontal drive pulse (generated by multiplying a 1st horizontal drive pulse by a multiplier 15 and a waveform shaper 16 in this case) which is inputted to an input terminal (a) of a switch 17 is outputted from the output terminal (c) of the switch 17 and this output is inputted to the drive TR 9 similarly. Assuming that the horizontal frequencies of the 1st and 2nd video input signals are 33.7 and 15.75kHz and the multiplication value of the multiplier 15 is 2, the frequency of the signal of the drive TR 9 from the output terminal (c) of the switch 17 becomes 33.7 and 31.5kHz when the 1st and 2nd video input signals are received eventually.

6. 发明专利

JPS63279673A DYNAMIC FOCUS CIRCUIT FOR CATHODE RAY TUBE 失效
公开(公告)号：JPS63279673A
公开(公告)日：1988-11-16
申请号：JP11380887
申请日：1987-05-11
申请人： MITSUBISHI ELECTRIC CORP
发明人： TOSHIYASU MASAYUKI , ISHII YOSHINORI
IPC分类号： H04N3/26
摘要： PURPOSE:To realize a focusing performance with a good symmetry by compensating beforehand the phase of the waveform of a parabolic dynamic focus output voltage, by advancing it before the middle of a horizontal scanning period in a horizontal period, and delaying it after the middle of a vertical scanning period in a vertical period. CONSTITUTION:A means to advance and delay the phase of an input parabolic voltages eH, eV, which come to be the lowest voltage at the middle of a scanning period, in the horizontal period and the vertical period respectively, is provided in addition to the inverting and amplifying function of a horizontal and a vertical waveform generation circuits 4,5, and the input voltages of a synthesis circuit 3, obtained as the result, come to be as shown in a figure (a) and the figure (b), and they are made into a reference voltage, by synthesizing these by the synthesis circuit 3, and the same shaped waveform appears as the emitter output of a transistor Q4, as being amplified. Therefore, since the change of the phase, caused by the restriction of a capacitor capacity, etc., due to the difference of the capacities or the functions of two focusing electrodes, can be compensated beforehand in a dynamic focus voltage drive circuit, shown in the figure, the focusing characteristic, extending all over a picture frame, can be made to have the symmetry.

7. 发明专利

JPS63203063A DYNAMIC FOCUSING CIRCUIT FOR CATHODE RAY TUBE 失效
公开(公告)号：JPS63203063A
公开(公告)日：1988-08-22
申请号：JP3627187
申请日：1987-02-18
申请人： MITSUBISHI ELECTRIC CORP
发明人： TOSHIYASU MASAYUKI , KIMURA KENJI , ISHIHATA TAKAHARU , ISHII YOSHINORI
IPC分类号： H04N3/26
摘要： PURPOSE:To obtain focusing performance with high accuracy for the entire screen by arranging focus voltage adjusting variable resistors in parallel, applying a DC focusing voltage from each slider and applying a parabolic voltage between both focusing electrodes via a capacitor. CONSTITUTION:A parallel resistor circuit 2A is so constituted that the focusing voltage adjusting variable resistors VR-1, VR-2 are arranged in parallel, resistors R3, R4 are connected to the cold and the hot side to compensate the deviation of the resistors VR-1, VR-2. Thus, the resistors VR-1, VR-2 are adjusted independently to apply an optional quantity of DC focusing voltage to focusing electrodes G3-1, G3-2. Moreover, the parabolic voltage synchronously with the deflection voltage period between the electrodes G3-1, G3-2 via the capacitors C1, C2 to apply a parabolic voltage efficiently. Thus, the optimum focusing state of electron beam is obtained on the entire screen.

8. 发明专利

JPS62182A VIDEO PROCESSING DEVICE 失效
公开(公告)号：JPS62182A
公开(公告)日：1987-01-06
申请号：JP13949185
申请日：1985-06-26
申请人： MITSUBISHI ELECTRIC CORP
发明人： ISHII YOSHINORI , WADA RYUKICHI
IPC分类号： H04N5/907 , H04N5/265
摘要： PURPOSE:To execute time-lapse reproduction of picture and to enjoy animation picture also by storing picture equivalent to one frame in each area excepting specified areas of a video memory and then adapting writing of picture equivalent to one frame in the specified area, and reading all stored content of a video memory and displaying in a display unit. CONSTITUTION:A memory controller 14 time divides read signals from write signals, generates in a video memory 14 and reads out while writing in real time. The read picture signals F are converted to analogized picture signals G by a D/A converter 15 and led to a selecting means 4. As a contact 7 is conducting when H of a flip-flop 19 is high level, video signals G from the image memory 14 are led to a video output circuit 8, and a strobe multi picture is displayed in a cathode ray tube 10. When an operation button 18 is depressed, the flip-flop 19 is inverted, and a switching signal H becomes low level, and the selecting means 4 is switched to display normal television image.

9. 发明专利

JPS62180A METHOD AND DEVICE FOR VIDEO PROCESSING 失效
公开(公告)号：JPS62180A
公开(公告)日：1987-01-06
申请号：JP13948985
申请日：1985-06-26
申请人： MITSUBISHI ELECTRIC CORP
发明人： WADA RYUKICHI , ISHII YOSHINORI
IPC分类号： H04N5/907 , G09G5/00 , H04N5/265 , H04N5/45
摘要： PURPOSE:To display animation picture after a still picture succeedingly, by writing video signals sampled to the number of picture elements corresponding to the number of addresses in a specific area of a video memory successively in the specific area in the course of reading all addresses of the video memory. CONSTITUTION:A memory 8 becomes R mode when output of a flip-flop 28 became high level after writing. If an address bus switching device 24 is kept at 1 side, reading of the memory 8 is made by a main address counter 22, and a still picture of the picture element is obtained by returning the output F to an analog signal C by a D/A converter 9. However, after writing in the memory 8, the memory is made to W mode periodically by a signal N, and at the same time, output of a sub-address counter 23 is supplied to the memory 8 by address switching, and reading and writing are made simultaneously. Output G is supplied to a cathode ray tube 13, and an animation picture is displayed in 1/9 size together with a still picture. As the value of the sub-address counter 23 is set to 160 both for horizontal and vertical counters, the animation picture is inserted in lower right corner of the picture.

10. 发明专利

JPS61258579A TELEVISION RECEIVER 失效
公开(公告)号：JPS61258579A
公开(公告)日：1986-11-15
申请号：JP9999285
申请日：1985-05-10
申请人： MITSUBISHI ELECTRIC CORP
发明人： TANAKA MITSUKO , ISHII YOSHINORI
IPC分类号： H04N5/265 , H04N5/45
摘要： PURPOSE:To obtain continuous still picture depending on movements of picture contents by selecting writing speeds of each picture after hanging, through a key switch approach, writing time intervals to write in real times optional still picture of video memory. CONSTITUTION:Digital video signal E is written in real times into a determined memory area among the areas divided into several pieces of a video memory 8 with each constant period on the basis of a synchronous signal D and obtain a strobo multi-picture after generating simultaneously a reading signal F. Then if respective bit outputs QA-QD of a counter 30 counting a synchronous signal pulse D are ANDed by AND circuits 31-33, a signal having each period of vertical synchronous signal period is obtained. If the signal is selected by a switch 40 and the signal and a demodulated video signal A are ANDed by an AND circuit 34, a writing digital video signal E with each period are obtained. This switch approach permits writing period (writing time interval) to be selected freely.

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