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1. 发明专利

JP2015057850A 電力用半導体装置有权
标题翻译：功率半导体器件
公开(公告)号：JP2015057850A
公开(公告)日：2015-03-26
申请号：JP2014233404
申请日：2014-11-18
申请人：三菱電機株式会社 , Mitsubishi Electric Corp
发明人： HINO SHIRO , MIURA NARIHISA , NAKADA SHUHEI , OTSUKA KENICHI , WATANABE AKIHIRO , FURUKAWA AKIHIKO , NAKAO YUKIYASU , IMAIZUMI MASAYUKI
IPC分类号： H01L29/78 , H01L29/06 , H01L29/12
CPC分类号： H01L29/66068 , H01L21/046 , H01L29/4238 , H01L29/7827
摘要：【課題】高速にスイッチングする電力用半導体装置において、スイッチング時に変位電流が流れることによってゲート絶縁膜のような薄い絶縁膜が絶縁破壊し、半導体装置が破壊する場合があった。【解決手段】この発明に係る半導体装置は、炭化珪素半導体基板20の第1の主面に形成された第1導電型の炭化珪素材料を用いたドリフト層21と、ドリフト層21の第1ウェル領域41とは別の領域に形成された第2導電型の第2ウェル領域42と、第2ウェル領域42上の第1ウェル領域41側とは反対側に形成されたフィールド絶縁膜31と、第2ウェル領域42上の第1ウェル領域41側に形成されたゲート絶縁膜30を貫通して設けられたウェルコンタクトホール62を介して第2ウェル領域とソース領域とを電気的に接続するソースパッド10とを備え、ウェルコンタクトホール62からゲート絶縁膜30とフィールド絶縁膜31との境界までの距離を所定の値以下にする。【選択図】図3
摘要翻译：要解决的问题为了解决在高速切换的功率半导体装置中，在切换时存在位移电流流动的一些情况，使得诸如栅极绝缘的薄绝缘膜薄膜，被破坏，半导体器件破裂。解决方案：根据本发明的半导体器件包括：漂移层21，形成在碳化硅半导体衬底20的第一主表面上，并使用第一导电型; 形成在与漂移层21的第一阱区域41不同的区域中的第二导电类型的第二阱区域42; 形成在与第一阱区域41侧相反的一侧的第二阱区域42上的场绝缘膜31; 以及源极焊盘10，其经由穿过形成在第一阱区域41侧的第二阱区域42上的栅极绝缘膜30的阱接触孔62将第二阱区域和源极区域电连接在一起。阱接触孔62与栅极绝缘膜30和场绝缘膜31之间的边界之间的距离被设定在预定值以下。

2. 发明专利

JP2004023262A Automatic interpreting apparatus and automatic interpreting system 审中-公开
公开(公告)号：JP2004023262A
公开(公告)日：2004-01-22
申请号：JP2002172877
申请日：2002-06-13
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： SUGAHARA KAZUYUKI , OONAKAMICHI TAKAHIRO , FURUKAWA AKIHIKO , NISHIKAWA KAZUYASU , HASHIZUME YASUYUKI , MURAKAMI TAKAAKI , YAMAKAWA SATOSHI , OMORI TATSUO
IPC分类号： G06F17/28 , H04M3/42
摘要： PROBLEM TO BE SOLVED: To provide an automatic interpreting system for enabling an interpreting service to be utilized easily any time and anywhere. SOLUTION: The automatic interpreting system has a portable terminal and an automatic interpreting apparatus for transmitting/receiving the speech signal of the portable terminal. The automatic interpreting apparatus comprises a voice recognition means for converting the speech signal transmitted from the portable terminal to language information, a language converting means for converting the language information to a desired language by using an accompanied dictionary, and an amount-of-information calculating means for measuring time required for the language converting means to convert the language information to a desired language. The automatic interpreting apparatus is constituted so that it calculates the usage charge of the apparatus based on time required for interpretation being measured by the amount-of-information calculating means for reporting to a cellular phone. COPYRIGHT: (C)2004,JPO

3. 发明专利

JP2003133434A SEMICONDUCTOR INTEGRATED CIRCUIT 审中-公开
公开(公告)号：JP2003133434A
公开(公告)日：2003-05-09
申请号：JP2001324779
申请日：2001-10-23
申请人： MITSUBISHI ELECTRIC CORP
发明人： OONAKAMICHI TAKAHIRO , FURUKAWA AKIHIKO
IPC分类号： H01L21/761 , H01L21/822 , H01L21/8238 , H01L27/04 , H01L27/06 , H01L27/08 , H01L27/092 , H03K17/08 , H03K17/693
摘要： PROBLEM TO BE SOLVED: To provide a highly functional and reliable semiconductor integrated circuit having various high frequency circuits by SOP processing on a silicon substrate. SOLUTION: The circuit has a silicon substrate 1 having a first substrate region and a second substrate region which is the same conductivity type as the first substrate region and has impurity concentration lower than that of the first substrate region, a first MOS transistor 10 which is formed on a main surface of the first substrate region and constitutes a first high frequency circuit, and a second MOS transistor 30 which is formed on a main surface of a second substrate region and constitutes a second high frequency circuit which is different from the first high frequency circuit.

4. 发明专利

JP2001291863A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2001291863A
公开(公告)日：2001-10-19
申请号：JP2000106369
申请日：2000-04-07
申请人： MITSUBISHI ELECTRIC CORP
发明人： FURUKAWA AKIHIKO , SUGAHARA KAZUYUKI
IPC分类号： H01L21/76 , H01L21/8234 , H01L27/08 , H01L27/088 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a compact MOSFET for high frequencies whose thermal noise can be reduced by using silicon. SOLUTION: This MOSFET is provided with an element isolation region 3 formed on the main surface of a first conductivity type silicon substrate, a gate electrode 5 arranged on the element isolation region, a first conductivity type impurity region 11 including first conductivity type impurity whose concentration is higher than that of the silicon substrate to which a substrate potential is applied, and a second conductivity type impurity region 6 including the first conductivity type impurity whose concentration is higher than that of the silicon substrate formed in a region ranging from the substrate under the element isolation region to the first conductivity type impurity region.

5. 发明专利

JP2001274261A SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR 失效
公开(公告)号：JP2001274261A
公开(公告)日：2001-10-05
申请号：JP2000086310
申请日：2000-03-27
申请人： MITSUBISHI ELECTRIC CORP
发明人： FURUKAWA AKIHIKO , YAMAKAWA SATOSHI , HASHIZUME YASUYUKI
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/822 , H01L21/8234 , H01L27/04 , H01L27/088 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having structure of preventing floating capacitance so that high frequency characteristics do not deteriorate and to provide a manufacturing method. SOLUTION: AMOS transistor formed on a silicon substrate 1 is included. An impurity diffusion layer 9 for giving potential to a well in such a way that the MOS transistor is surrounded is connected to a third metal wiring layer 14 at an upper layer through plug electrodes 11a, 11b and 11c arranged into an array form. A third metal wiring layer 14 is fixed to the ground potential (ground).

6. 发明专利

JPH08298319A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08298319A
公开(公告)日：1996-11-12
申请号：JP10211995
申请日：1995-04-26
申请人： MITSUBISHI ELECTRIC CORP
发明人： FURUKAWA AKIHIKO , ABE YUJI
IPC分类号： H01L29/78 , H01L21/265 , H01L29/10
摘要： PURPOSE: To achieve stronger punch-through resistance and a lower threshold voltage by providing a nitrogen implanted region near the surface of a channel region of a MOS field effect transistor. CONSTITUTION: A device isolation region is formed on a silicon substrate 1 by using a prior art MOS-type device fabricating process. Then, a sacrificial oxide film is formed in an active region, and a well and a channel-cut-region are formed by ion implantation. Then, after boron (B), i.e., a channel impurity, is ion-implanted to form a channel doped region 8, a nitrogen implanting region 9 is formed by carrying out ion-implantation of nitrogen atoms to a projected range distance nearly equal to or not more than that of the B atoms. Finally, after the sacrificial oxide film is removed, a gate oxide film 4 and a gate electrode 5 are formed, and source-drain implantation, heat treatment, and aluminum wiring are carried out to fabricate the device. Thus, a device structure with a lower threshold voltage and stronger punch-through resistance can easily and economically be obtained by ion-implanting technique.

7. 发明专利

JPH06329500A METHOD FOR FORMING BORON NITRIDE THIN FILM AND SEMICONDUCTOR ELEMENT, DEVICE FOR MOLDING THE SAME THIN FILM AND SEMICONDUCTOR ELEMENT USING THE SAME THIN FILM AND DEVICE 失效
公开(公告)号：JPH06329500A
公开(公告)日：1994-11-29
申请号：JP13984093
申请日：1993-05-20
申请人： MITSUBISHI ELECTRIC CORP
发明人： OISHI TOSHIYUKI , FURUKAWA AKIHIKO , KOJIMA KAZUYOSHI
IPC分类号： C23C14/06 , C30B23/08 , C30B29/38 , H01L21/203 , H01L21/31 , H01L21/318 , H01L21/768 , H01L23/522 , H01L21/90
摘要： PURPOSE:To form a thin film of boron nitride having a stoichiometric amount ratio free from defects in forming the thin film of boron nitride by using a laser thin film forming device. CONSTITUTION:Nitrogen having high energy is used by making a nitrogen gas 10 in a laser thin film forming device into a radical and introducing to a chamber 5 to form a thin film of boron nitride. Boron nitride prepared by this method is a thin film having a stoichiometric amount ratio free from defects. Consequently, a multi-layer structure of boron nitride and copper can be formed and the multi-layer structure is used to prepare an ultraviolet light luminescent element, transistor, etc.

8. 发明专利

JPH06268271A METHOD FOR ETCHING SUPRCONDUCTOR SAMPLE 失效
公开(公告)号：JPH06268271A
公开(公告)日：1994-09-22
申请号：JP5380393
申请日：1993-03-15
申请人： MITSUBISHI ELECTRIC CORP
发明人： FURUKAWA AKIHIKO , OISHI TOSHIYUKI , WADA YUKIHIKO , TAKAMI TETSUYA , KOJIMA KAZUYOSHI , KURODA KENICHI
IPC分类号： H01B13/00 , H01L21/302 , H01L21/3065 , H01L39/24
摘要： PURPOSE:To etch a superconductive thin film and an insulation film selectively by etching a sample containing a superconductor to materials other than the superconductor selectively using at least one organic gas and at least one of oxygen. hydrogen, nitrogen, and rare gas. CONSTITUTION:A mixed gas 17 of ethane and oxygen enters a vacuum chamber 3 via a gas introduction pipe 2. Then, plasma 18 is created by an ion gun which is constituted of a coil 9, a cathode 11, an anode 12, an acceleration collimater electrode, etc., a mixed gas ion beam 19 of ethane and oxygen is generated, and then the gas hits against a superconducting thin film 4 and a resist 5. The mixed gas ion beam 19 of ethane oxygen in contact with the superconducting thin film 4 is subjected to chemical reaction and physical reaction, thus etching the superconducting thin film 4. The superconducting thin film 4 can be selectively etched to a sample containing a high-temperature superconductor, for example a sample in a structure where the superconducting thin film 4 exists on a substrate (insulation film) 6 with an improved controllability.

9. 发明专利

JP2013201357A Silicon carbide semiconductor device and manufacturing method of the same 审中-公开
标题翻译：硅碳化硅半导体器件及其制造方法
公开(公告)号：JP2013201357A
公开(公告)日：2013-10-03
申请号：JP2012069768
申请日：2012-03-26
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： KAGAWA YASUHIRO , FURUKAWA AKIHIKO , IMAIZUMI MASAYUKI
IPC分类号： H01L27/04 , H01L21/336 , H01L29/12 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a silicon carbide semiconductor device including a temperature monitor element for ensuring a detection current, and provide a manufacturing method of the silicon carbide semiconductor device.SOLUTION: A silicon carbide semiconductor device of a present embodiment comprises a MOSFET part 4 formed on a silicon carbide epitaxial substrate 3 and a temperature monitor element 5 formed on the silicon carbide epitaxial substrate 3 via an isolation insulation film 6. The temperature monitor element 5 includes: an n-type polycrystalline silicon layer 12 formed on the isolation insulation film 6; a p-type polycrystalline silicon layer 14 formed on the isolation insulation film 6 next to the n-type polycrystalline silicon layer 12; an n-type polycrystalline silicon layer 13 formed on the isolation insulation film 6 next to the n-type polycrystalline silicon layer 12 to form a bipolar transistor by sandwiching the p-type polycrystalline silicon layer 14 with the n-type polycrystalline silicon layer 12 in pairs; an anode electrode 18 which electrically contacts the p-type polycrystalline silicon layer 14 and the n-type polycrystalline silicon layer 13; and a second electrode 19 which electrically contacts the n-type polycrystalline silicon layer 13.
摘要翻译：要解决的问题：提供一种包括用于确保检测电流的温度监测元件的碳化硅半导体器件，并且提供碳化硅半导体器件的制造方法。解决方案：本实施例的碳化硅半导体器件包括MOSFET部分 4形成在碳化硅外延基板3上，温度监测元件5通过隔离绝缘膜6形成在碳化硅外延基板3上。温度监测元件5包括：形成在隔离绝缘层上的n型多晶硅层12 电影6 形成在隔离绝缘膜6上的与n型多晶硅层12相邻的p型多晶硅层14; 在n型多晶硅层12的隔壁绝缘膜6上形成的n型多晶硅层13，通过将p型多晶硅层14与n型多晶硅层12夹在中间而形成双极晶体管对与p型多晶硅层14和n型多晶硅层13电接触的阳极电极18; 以及与n型多晶硅层13电接触的第二电极19。

10. 发明专利

JP2011253929A Manufacturing method of semiconductor device and semiconductor device 有权
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：JP2011253929A
公开(公告)日：2011-12-15
申请号：JP2010126614
申请日：2010-06-02
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： KAGAWA YASUHIRO , FURUKAWA AKIHIKO , MIURA NARIHISA , SAKAI KEIKO , WATANABE HIROSHI , OTSUKA KENICHI
IPC分类号： H01L29/78 , H01L21/336 , H01L29/12
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device and a semiconductor device for decreasing resistance at a channel portion and lowering a threshold voltage without an epitaxial growth process, limitation on a taper angle of a trench and limitation of a substrate.SOLUTION: A MOSFET as a semiconductor device is manufactured by the steps of forming a channel layer 14 by performing ion implantation of an n type impurity using a silicon oxide layer 25 as an implantation mask opening in such a way as to expose a predetermined portion of a source region 14 where a trench is to be formed, forming a trench penetrating the source region 14 and a base region 13 by etching the source region 14 and the base region 13 using the silicon oxide layer 25 as an etching mask, sequentially forming a gate insulation film and a gate electrode in the trench, forming a source electrode electrically connecting the source region 14 and the base region 13 after coating the gate electrode with an interlayer insulation film, and forming a drain electrode on an n type silicon carbide substrate 11.
摘要翻译：解决的问题：为了提供半导体器件和半导体器件的制造方法，用于降低沟道部分的电阻并降低阈值电压而不需外延生长工艺，限制沟槽的锥角和限制底物。解决方案：作为半导体器件的MOSFET通过以下步骤制造：通过使用氧化硅层25作为注入掩模开口进行n型杂质的离子注入来形成沟道层14，以暴露通过使用氧化硅层25作为蚀刻掩模蚀刻源极区域14和基极区域13，形成沟槽的源区域14的预定部分，形成穿透源极区域14的沟槽和基极区域13，在沟槽中依次形成栅绝缘膜和栅电极，在层间绝缘膜上涂覆栅电极之后形成电源连接源区14和基区13的源电极，在n型硅上形成漏电极碳化物基板11.版权所有（C）2012，JPO＆INPIT

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