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1. 发明专利

JPH0628306A SCSI SYSTM AND COMMAND SUPPORT CONFIRMING METHOD 失效
公开(公告)号：JPH0628306A
公开(公告)日：1994-02-04
申请号：JP1452692
申请日：1992-01-30
申请人： MATSUSHITA GRAPHIC COMMUNIC
发明人： ONO MOTOYASU
IPC分类号： G06F13/36
摘要： PURPOSE:To confirm the command supported by a target at the side of an initiator without deteriorating the bus availability and the system throughput in an SCSI system. CONSTITUTION:An initiator 2 issues a specific command to a target 4 and receives the data on a list of option commands from the target 4 to store the data in an internal memory 12a as it is or after processing it. The command processing parts 10a and 10c process this specific commands. Then, the initiator 2 refers to the data stored in the memory 12a and confirm the option command supported by the target 4.

2. 发明专利

JPS6417112A INTERFACE DEVICE 失效
公开(公告)号：JPS6417112A
公开(公告)日：1989-01-20
申请号：JP17327787
申请日：1987-07-10
申请人： MATSUSHITA GRAPHIC COMMUNIC
发明人： ONO MOTOYASU
IPC分类号： G06F3/00
摘要： PURPOSE:To surely transmit the data produced asynchronously with each other to a CPU just with a single reading action by holding the state of the data signal synchronized by a synchronizing circuit via a monitor circuit in the activating timing of a read signal and then delivering the held signal state in the form of data. CONSTITUTION:For instance, a data signal DT is activated in the timing as shown in a diagram and therefore a JKFF 7 is set at the rise of a system clock SCK. Then a chip selection signal CS1 and a read signal RD are produced. Thus an FF 8 is set and the holding state of an FF 7 is held by the FF 8. This holding state is transmitted to a CPU as a signal STD via a 3-state buffer 10 during an active period of the signal RD. Hereafter the buffer 10 is set under a high impedance state when the signal RD is inactivated. At the same time, the FF 7 is reset.

3. 发明专利

JPH10282991A SPEECH RATE CONVERTING DEVICE 失效
公开(公告)号：JPH10282991A
公开(公告)日：1998-10-23
申请号：JP8364097
申请日：1997-04-02
申请人： MATSUSHITA GRAPHIC COMMUNIC
发明人： KATAYAMA TAKAO , ONO MOTOYASU
IPC分类号： G10L21/04 , G10L3/02
摘要： PROBLEM TO BE SOLVED: To facilitate calculation of a correlative function by presuming pitch lengths of a head segment and the next segment the same ratio, overlapping both segments, shifting so that waveforms are matched with each other and evaluating the correlation function in the shifted state. SOLUTION: A first correlater 41 calculates the correlative function between the data in a first memory 38 and a second memory 39, and obtains a first correlative delay amount obtained by shifting relative positions so that the large positions of the correlative function of two segments coincide with each other. On the other hand, a waveform deviation value calculator 42 obtains pitch information from a pitch buffer 34, and presumes that the waveforms of the head segment and the next segment have the same pitch, and only different phases, and obtains a deviation value shifting so as to be matched with each other by shifting. A second correlater 43 calculates the correlative function based on the data of the first memory 38 and the second memory 39 and the deviation value from the waveform deviation value calculator 42, and obtains a second correlative delay amount obtained by shifting the relative positions so that the large positions of the correlative function of two segments coincide with each other.

4. 发明专利

JPH09224081A INFORMATION COMMUNICATION EQUIPMENT FOR HOME USE 失效
公开(公告)号：JPH09224081A
公开(公告)日：1997-08-26
申请号：JP2754296
申请日：1996-02-15
申请人： MATSUSHITA GRAPHIC COMMUNIC
发明人： OGAWARA SUMIO , OGAWA ICHIRO , ONO MOTOYASU
IPC分类号： H04N1/00 , H04M3/00 , H04M11/06 , H04N1/32 , H04N7/10 , H04Q3/58 , H04Q9/00
摘要： PROBLEM TO BE SOLVED: To simultaneously and parallelly perform plural kinds of multimedia communication at low cost by providing an outside line interface, extension interface, display interface, remote controller interface and control part. SOLUTION: Information communication equipment for home use is provided with an outside line interface 102, extension interface 103 inside home, control part 106, display interface 105 and remote controller interface 104. The outside line interface 102 houses an outside line and plural wire or radio extensions and performs line exchange or storage exchange between the extension and the outside line, between the extensions or between the outside lines. The display interface 105 displays received information on the screen of a display device 129. Terminals 115-121 having PHS interfaces are connected to the extension interface 103 by radio, a portable terminal 122 is connected by infrared rays and image terminals 123-127 are connected by wires.

5. 发明专利

JPH0642300B2 失效
公开(公告)号：JPH0642300B2
公开(公告)日：1994-06-01
申请号：JP24877186
申请日：1986-10-20
申请人： MATSUSHITA GRAPHIC COMMUNIC
发明人： NIINO ATSUSHI , SAWADA KANAME , UEKI KEIJI , ONO MOTOYASU
IPC分类号： G11B7/00 , G11B7/004 , G11B7/007 , G11B20/10 , G11B20/12

6. 发明专利

JPH0535595A STORAGE CONTROL METHOD 失效
公开(公告)号：JPH0535595A
公开(公告)日：1993-02-12
申请号：JP19182591
申请日：1991-07-31
申请人： MATSUSHITA GRAPHIC COMMUNIC
发明人： SUZUKI TAKASHI , UEKI KEIJI , NIINO ATSUSHI , ONO MOTOYASU
IPC分类号： G06F12/08
摘要： PURPOSE:To increase the hit rate by putting the cache memory of a computer system in efficient operation. CONSTITUTION:The amount of data which can be transferred from a high-speed, small-capacity cache memory to a processor in the mean access time of a low- speed, large-capacity main memory is regarded as a process unit block. When the processor reads a file A which is not in the cache memory out of the main memory, only the head block (a) of the file A is stored in the cache memory (100 101 102,103). Then when the processor reads the file A out, the operation (201) for reading the head block (a) out of the cache memory and the operation (202) for reading blocks following the head block (a) out of the main memory are started almost at the same time to transfer the head block (a) from the cache memory (203) and then the following blocks from the main memory (205).

7. 发明专利

JPH04238162A INFORMATION RECORDING AND REPRODUCING DEVICE 失效
公开(公告)号：JPH04238162A
公开(公告)日：1992-08-26
申请号：JP616691
申请日：1991-01-23
申请人： MATSUSHITA GRAPHIC COMMUNIC
发明人： UEKI KEIJI , NIINO ATSUSHI , ONO MOTOYASU
IPC分类号： G11B7/00 , G11B7/004 , G11B20/10 , G11B20/12
摘要： PURPOSE:To shorten the access time viewed from an external device to a defective sector. CONSTITUTION:An alternate sector storage section 5 which records data in an alternate region consisting of an alternate sector and the management information area thereof or stores the recorded data therein is provided. The recording data of this alternate region is stored into the alternate sector storage section 5 in the stage before a reading out instruction from the region including the alternate region is emitted by an entire part control section 6. The data to be written into this alternate region is stored into the alternate sector storage section 5 and is written in the alternate region at a prescribed period when a writing instruction to the region including this alternate region is emitted.

8. 发明专利

JPS63291267A INFORMATION ARRANGEMENT OUTPUT DEVICE FOR MEMORY DEVICE 失效
公开(公告)号：JPS63291267A
公开(公告)日：1988-11-29
申请号：JP12629687
申请日：1987-05-22
申请人： MATSUSHITA GRAPHIC COMMUNIC
发明人： ONO MOTOYASU
IPC分类号： G06F3/06 , G11B20/12
摘要： PURPOSE:To deliver a record string to a host by rearranging it in sequence of a record number in a short time, by outputting the record string in order by buffering the record string read out in sequence of a sector number on a track to an IC memory and rearranging it in the sequence of the record number. CONSTITUTION:The titled device is provided with a buffer memory (IC-RAM)2 which delivers the record string outputted from a memory device 1 to the host, a write control part 3 which supplies the write address of the buffer memory 2, a read control part 4 which supplies the read address of the buffer memory 2, and a multiplexer 5 which supplies either the address outputs of both control parts 3 and 4 to the buffer memory 2. And the record string read out in the sequence of the sector number on the track is buffered in the IC memory 2, and is outputted in order after being rearranged in the sequence of the record number. In other words, since the IC memory 2 can be accessed with a remarkable high level and a complete random access property is attached, it is possible to perform the rearrangement of the record string at high speed by buffering accompanying by a simple address operation.

9. 发明专利

JPH04176059A STORAGE MEDIUM 失效
公开(公告)号：JPH04176059A
公开(公告)日：1992-06-23
申请号：JP30364690
申请日：1990-11-07
申请人： MATSUSHITA GRAPHIC COMMUNIC
发明人： ONO MOTOYASU , UEKI KEIJI , NIINO ATSUSHI
IPC分类号： G11B20/12 , G11B20/18
摘要： PURPOSE:To achieve a high speed for data transfer into an upper apparatus by arranging a memory region wherein reading and writing are possible between a plurality of concentric ring-shaped read-only memory regions, respectively, and storing the updated data in each ring-shaped read-only memory region in the readable and writable memory region in the vicinity. CONSTITUTION:A plurality of ROM regions 2 and RAM regions 1 are provided. One or a plurality of neighboring tracks are arranged in the respective regions. The updated data in the ROM region 2 are stored in the RAM region 1 as close as possible to the ROM region 2. For example, when the data at the positions of the track number 3 and the section number 0 are updated, the newest data are written into the track number 2 and the sector number 11. Thus the times of the seeking are decreased. In this way, the high speed for the transfer of the data into a higher rank apparatus is achieved.

10. 发明专利

JPH04172662A MANAGING METHOD FOR DEFECT OF MEMORY MEDIUM 失效
公开(公告)号：JPH04172662A
公开(公告)日：1992-06-19
申请号：JP30083490
申请日：1990-11-05
申请人： MATSUSHITA GRAPHIC COMMUNIC
发明人： UEKI KEIJI , NIINO ATSUSHI , ONO MOTOYASU
IPC分类号： G11B20/10 , G11B20/12
摘要： PURPOSE:To shorten a seeking time by dispersively disposing an alternate sector in a data sector. CONSTITUTION:An alternate sector to be replaced with a defective sector generated in a data sector after initializing is dispersively disposed in the data sector for storing data. As the alternate sector of the defective sector, a nearest alternate sector at the rear of the defective sector is used. If the alternate sector is not sufficient, next nearest alternate sector is further sequentially used. Thus, a seeking time can be shortened by writing a content of the defective sector in the near alternate sector at the rear of the defective sector.

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