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1. 发明专利

JPH0964541A PRODUCTION OF MULTILAYERED CERAMIC WIRING BOARD 失效
公开(公告)号：JPH0964541A
公开(公告)日：1997-03-07
申请号：JP21890795
申请日：1995-08-28
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： KOYAMA MASAYA , YAMAGUCHI NOBORU
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To produce a ceramic multilayered wiring board excellent in the reliability of connection between the wiring conductor of the outer layer formed by a thin film method and a conductor of via part formed by a thick film method. SOLUTION: The wiring conductor of the outer layer is formed by a thin film method on the surface of a ceramic board where the wiring conductor of the inner layer is formed by a thick film method and integrated. In such a method for producing a ceramic multilayered wiring board, the surface of a ceramic board is roughened using heated phosphoric acid prior to formation of the wiring conductor of the outer layer. In this production method, the temperature of phosphoric acid for roughening the surface of the ceramic board is set in the range of 140-360 deg.C.

2. 发明专利

JPH0682909B2 失效
公开(公告)号：JPH0682909B2
公开(公告)日：1994-10-19
申请号：JP15982388
申请日：1988-06-27
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： WAKI KYOTAKA , YAMAGUCHI NOBORU
IPC分类号： H05K1/16 , H05K3/06 , H05K3/12

3. 发明专利

JPH06280033A ELECTROLESS PLATING METHOD 失效
公开(公告)号：JPH06280033A
公开(公告)日：1994-10-04
申请号：JP34472492
申请日：1992-12-24
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： YOSHIZAWA IZURU , YAMAGUCHI NOBORU , TONE KAORU , HATTORI HIROMASA , TAKAHASHI HIROAKI
IPC分类号： C23C18/31 , C23C18/34 , C23C18/40
摘要： PURPOSE:To conduct electroless plating without the replenished metal ion being deposited in a plating soln. and with the activity of the electroless plating soln. maintained for a long time. CONSTITUTION:A metal ion is replenished to an electroless plating soln. 12 contg. the metal ion, a metal ion complexing agent, a metal ion reducing agent and a pH regulator in an electroless plating tank 1. In this case, a metallic complex soln. 7 consisting of the metal ion and metal ion complexing agent is used, a part of the soln. 7 is drawn off from the tank 1 and sent to a complexing tank 13, and a fresh metal compd. is added to the soln. which is used to replenish the metal ion.

4. 发明专利

JPH0572353B2 失效
公开(公告)号：JPH0572353B2
公开(公告)日：1993-10-12
申请号：JP13837885
申请日：1985-06-25
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： YAMAGUCHI NOBORU , OGAWA SATORU , YOSHIZAWA IZURU , KAJITA SUSUMU , WAKI KYOTAKA
IPC分类号： B32B15/04 , C04B37/02 , H05K3/38

5. 发明专利

JPH05206592A MANUFACTURE OF CERAMIC BOARD AND CERAMIC WIRING BOARD 失效
公开(公告)号：JPH05206592A
公开(公告)日：1993-08-13
申请号：JP1243792
申请日：1992-01-27
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： HATTORI HIROMASA , YAMAGUCHI NOBORU , YOSHIZAWA IZURU
IPC分类号： B28B11/14 , H05K1/02 , H05K1/03 , H05K3/00
摘要： PURPOSE:To enable a large number of ceramic wiring boards to be manufactured at a time without causing a short circuit which occurs due to a metal film left in a groove by a method wherein a discontinuous spot is locally provided to a groove formed along a board cutting line. CONSTITUTION:Even if a metal film 4 or solder 5 is left unremoved in a board dividing groove in a wiring board manufacturing process, it hardly causes a short circuit to a wiring board. The metal film 4 or the solder 5 is cut at a round or square through-hole 6 or a groove non-formed region, so that circuits 3 are prevented from being electrically connected to each other. That is, metal is not attached to a spot where the through-hole 6 is provided, so that the metal film 4 or the solder 5 are cut off at the through-hole 6. As mentioned above, a groove is disconnected at a spot where a short circuit is apt to occur, whereby a large number of ceramic wiring boards can be manufactured at a time without causing a short circuit.

6. 发明专利

JPH0468275B2 失效
公开(公告)号：JPH0468275B2
公开(公告)日：1992-10-30
申请号：JP4176787
申请日：1987-02-24
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： OGAWA SATORU , YAMAGUCHI NOBORU , ISHIHARA MASAYUKI
IPC分类号： C01B25/238 , C04B41/91

7. 发明专利

JPH0477666A MEASUREMENT METHOD OF ACTIVITY OF NON-ELECTROLYTIC PLATING LIQUID 失效
公开(公告)号：JPH0477666A
公开(公告)日：1992-03-11
申请号：JP19324590
申请日：1990-07-20
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： YOSHIZAWA IZURU , YAMAGUCHI NOBORU
IPC分类号： G01N33/18 , C23C18/31 , G01N27/26
摘要： PURPOSE:To facilitate the determination of accurate activity by sampling a part of a non-electrolytic plating liquid continuously to work on an object to be plated for measuring activity. CONSTITUTION:In this apparatus, a part of a non-electrolytic plating liquid in a plating liquid tank 1 is sampled continuously and returned to the plating liquid tank 1 again passing-through a detector section 3. Then, with the action of the non-electrolytic plating liquid, the plating film is segrigated continuously on the surface of an object 7 to be plated with a quantity corresponding to activity. When changes in the concentration of metal ions, pH and the concentration of reducing agent are measured before and after the passage through a detector section 3, activity of the non-electrolytic plating liquid is learned in the plating liquid tank 1.

8. 发明专利

JPH03141687A MANUFACTURE OF CIRCUIT BOARD WITH THROUGH HOLE 失效
公开(公告)号：JPH03141687A
公开(公告)日：1991-06-17
申请号：JP27919389
申请日：1989-10-26
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： WAKI KIYOTAKA , YAMAGUCHI NOBORU
IPC分类号： H05K3/06
摘要： PURPOSE:To effectively form an etching resist layer by a simple work by dipping an entire board in photosensitive resist liquid in a step of forming the resist layer, and deaerating bubbles in hole for a through hole. CONSTITUTION:A hole 10 for a through hole is opened at an insulating board 1, a conductor metal layer 2 is formed by a plating method, and then dipped in photosensitive resist liquid 3 of a storage tank 4 in which viscosity, thixotropy value, etc., are regulated. When the tank 4 is introduced into a pressure reducing chamber 5 and reduced under pressure, bubbles B in the hole 10 are floated to be removed. When the board 1 in which the liquid 3 is adhered is lifted, after deaerated, and dried, the board 1 covered with an etching resist layer 30 is obtained. Since the fluidity of the liquid 3 is low, the layer 30 is connected to become a joint 31, but it does not affect an influence to its function. It is exposed with an ultraviolet ray by using a mask pattern, developed, the layer 30 of an unnecessary part is removed to form the layer 30 of a predetermined pattern.

9. 发明专利

JPH02221175A FORMATION OF COPPER LAYER ON CERAMIC BASE MATERIAL 失效
公开(公告)号：JPH02221175A
公开(公告)日：1990-09-04
申请号：JP4098689
申请日：1989-02-20
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： YOSHIZAWA IZURU , YAMAGUCHI NOBORU
IPC分类号： C04B41/90 , C04B41/51 , H05K1/03 , H05K3/10
摘要： PURPOSE:To improve the adhesion of a copper layer to a ceramic base material and to obtain uniform strength by forming the copper layer on the base material with a copper oxide layer in-between and successively heat-treating the base material in an oxidizing atmosphere and in a reducing atmosphere. CONSTITUTION:A copper oxide layer is formed on the surface of a ceramic base material by electroless plating and a copper layer is formed on the surface of the copper oxide layer. The ceramic base material is then heat-treated in an oxidizing atmosphere to oxidize an org. component incorporated into the copper oxide layer and the copper layer and to remove carbon having high reducing property. The ceramic base material is further heat-treated in a reducing atmosphere to form a copper layer on the base material.

10. 发明专利

JPH02144988A MANUFACTURE OF WIRING BOARD WITH THROUGH HOLE 失效
公开(公告)号：JPH02144988A
公开(公告)日：1990-06-04
申请号：JP29909388
申请日：1988-11-25
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： WAKI KIYOTAKA , YAMAGUCHI NOBORU
IPC分类号： H05K3/06
摘要： PURPOSE:To prevent disconnection of a conductor circuit and circuit failure in the peripheral part of a through hole and improve reliability by covering the peripheral part of an opening for the through hole with a photoresist for printing in which a filler is contained and forming an etching resist layer thereon. CONSTITUTION:An opening for a through hole 10 is provided in an insulating base board 1, and a conductive metal layer 2 is formed on both top and bottom surfaces and on the inner wall surface of the opening 10. Then, a photoresist for printing in which a filler is contained is filled within the opening 10, and after drying thereof, it is irradiated by ultraviolet rays to photoset and form a filled part 4. Further, the same photoresist for printing in which the filler is contained is applied on both whole surfaces and dried. Then, both surfaces are irradiated by ultraviolet rays to expose this photoresist. At that time, a suitable mask is used to cause only the inner side and peripheral part 11 of the opening 10 to set to form a protective part 5, and other surface part of the insulating base board 1 is removed after development. Next, after an etching resist layer 3 is formed on the conductor metal layer 2, etching treatment is carried out to form a circuit pattern. Then, the filled part 4 and the protective part 5 are peeled and removed to form a wiring board with the through hole.

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