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1. 发明专利

JPH02180401A CERAMIC RESONATOR AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH02180401A
公开(公告)日：1990-07-13
申请号：JP33335488
申请日：1988-12-29
申请人： MATSUSHITA ELECTRIC IND CO LTD , TODA KOGYO CORP
发明人： NAKAMURA HISASHI , MATSUI TOSHIKI , MAKINO YOSHIYUKI , HISADA NOBORU , YAMADA MISAO , UENISHI KENJI
IPC分类号： H01P7/04 , H01P11/00
摘要： PURPOSE:To reduce costs and to improve a Q characteristic by means of the base-metal operation of an electrode material and simplification of processes by forming an electrode layer by means of electroless copper plating through a medium layer consisting of a noble metal ultra-particulate sol on the surface of a cylindrical ferroelectric ceramic sintered body. CONSTITUTION:The edge part of an element is made round by barrel-polishing a ceramic sintered body 4, etc., and the whole surface is made rough by etching- treatment in a hydrofluoric acid solution. Next, the cylindrical ceramic sintered body 4 is dipped to the catalytic solution consisting of the noble metal ultra- particulate sol, and a catalytic layer 6 is deposited on the whole internal and external surfaces of a through hole 5, or deposited to the selective surfaces by applying resist to the surfaces as needed. Then the body is dipped to the electroless copper plating solution consisting of the alkali solution of copper complex salt and formalin, the metal copper is deposited on the surface of the medium layer 6 consisting of the noble metal ultra-particulate sol to the width 5 to 10mu to form an electrode layer 7. Thus, the electrode layer 7 excellent for uniformity and adhesiveness can be formed on the surface of the sintered body 4.

2. 发明专利

JPH0244796A MANUFACTURE OF THROUGH HOLE WIRING BOARD 失效
公开(公告)号：JPH0244796A
公开(公告)日：1990-02-14
申请号：JP19661088
申请日：1988-08-05
申请人： MATSUSHITA ELECTRIC IND CO LTD , TODA KOGYO CORP
发明人： NAKAMURA HISASHI , MATSUI TOSHIKI , IMAI TOMOYUKI , OKANO HIROYUKI
IPC分类号： B32B15/08 , H05K3/42
摘要： PURPOSE:To improve covering power of electroless plating on a through hole by fine grain sol of noble metal as pretreatment of electroless plating, and performing activating treatment. CONSTITUTION:A so-called double-copper lined laminated plate wherein conductor layers 6 such as electlorite or rolled-copper foils are bonded on both upper and rear surface layers comprising synthetic resin such as a glass-polyimide laminated plate is used. A through hole 7 having an arbitrary size is formed at a specified position in said copper lined laminated plate. The double-copper lined laminated plate is immersed into neutral hydrosol of palladium colloid. A fine grain catalyst layer 8 of noble metal comprising palladium is attached on the entire surface of the copper lined laminated plate including the through hole 7. The copper lined laminated plate is immersed into electroless plating liquid, and a conductive metal layer 9 is deposited on the entire surface including the through hole 7. Copper is attached thickly on the surface of the conductor metal, and the conductor metal layer 9 is obtained. Thus the covering power of the plating in the through hole 7 is improved.

3. 发明专利

JPH02178910A MANUFACTURE OF LAMINATE-TYPE CERAMIC CHIP CAPACITOR 失效
公开(公告)号：JPH02178910A
公开(公告)日：1990-07-11
申请号：JP33335388
申请日：1988-12-29
申请人： MATSUSHITA ELECTRIC IND CO LTD , TODA KOGYO CORP
发明人： NAKAMURA HISASHI , MATSUI TOSHIKI
IPC分类号： H01G4/12 , H01G4/232 , H01G4/30
摘要： PURPOSE:To prevent deterioration of insulating property by sticking a catalyst of alkalescent noble metal superfine particle sol to a sintered capacitor element in the form of a separate piece so as to form an external electrode layer by an electroless plating method. CONSTITUTION:A ceramic sheet, which is made into a multilayer by printing an internal electrode layer 2 consisting of high melting point noble metal such as palladium platinum, etc., on the surface of a ceramic dielectric layer 1 and laminating these sheets, is cut in separate piece form, and then is fired so as to obtain a capacitor element in separate piece form. The catalyst 3 of palladium superfine particles is stuck to the entire surface, and is dipped in electroless nicked plating liquid so as to precipitate a conductive metallic layer 4 consisting of metallic nickel at the surface. And the conductive metallic layer 4 at the needless part is dissolved and removed so as to form an external electrode layer consisting of the conductive metallic layer 4. Since alkalescent noble metal superfine particle sol is used as a catalyst 3, the corrosion of the capacitor element by activating treatment process is prevented, and further since the catalyst 3 is of fine particles, the adhesive strength is strong. Hereby, an external electrode layer, which is free from deterioration of insulation and is excellent in adhesion, can be obtained.

4. 发明专利

JPH11162714A FUSE RESISTOR AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH11162714A
公开(公告)日：1999-06-18
申请号：JP22300298
申请日：1998-08-06
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TANAKA HIDEKI , HOSOKAWA ZENEMON , NAKAMURA HISASHI
IPC分类号： H01C1/14 , H01C7/13 , H01C13/00 , H01C17/06
摘要： PROBLEM TO BE SOLVED: To provide a resistor and method for manufacturing it wherein a heat generated at laser trimming does not decompose a resistor layer, with characteristics as a resistor hard to degrade. SOLUTION: An activation layer 42 comprising a narrow load concentration part 43 provided on the upper surface of an insulating substrate 41, a resistor layer 44 provided on the upper surface of the activation layer 42, a pair of upper-surface electrode layers provided on a side part of the resistor layer 44, a low-melting point substance layer 47 provided at the load concentration part 43, and a side-surface electrode layer 49 provided on side surface of the insulating substrate 41 are provided, with no laser used for forming the load concentration part 43, so a fuse resistor wherein the resistor layer 44 is hard to degrade and a method for manufacturing it are provided.

5. 发明专利

JP2537893B2 失效
公开(公告)号：JP2537893B2
公开(公告)日：1996-09-25
申请号：JP20961187
申请日：1987-08-24
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： NAKAMURA HISASHI , HARUTA YOICHI , NISHIDA KOJI , KAWAYAMA MASARU
IPC分类号： H05K3/32 , H05K1/09 , H05K3/24 , H05K3/34

6. 发明专利

JPH0555759A MULTILAYER PRINTED WIRING BOARD AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH0555759A
公开(公告)日：1993-03-05
申请号：JP21202691
申请日：1991-08-23
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： NAKAMURA HISASHI
IPC分类号： H05K3/46
摘要： PURPOSE:To relax restrictions about the positions of through holes to connect an interlayer wiring circuit conductor layer and enhance the degree of freedom for circuit design and increase the density of the wiring circuit in a multilayer printed board used in a wide field of electronic components. CONSTITUTION:A wiring circuit conductor layer 7, which is an inner layer, is installed on the both front and rear sides of an insulation board 6 where a first through hole 8 is made to connect the wiring circuit conductor layer 8 electrically. Then, insulation resin is filled into the through hole 8. Further there an insulation resin layer 9 is made on the wiring circuit conductor layer 7 which is an inner layer. In addition, a wiring circuit conductor layer 10, which is an outermost layer, is installed to both front and back sides of the insulation resin layer respectively where a second through hole 11 is made inside the first through hole 8 in order to connect the wiring circuit conductor layer 10 electrically.

7. 发明专利

JPH04304693A CHIP PACKAGE AND COMPOSITE CHIP PACKAGE 失效
公开(公告)号：JPH04304693A
公开(公告)日：1992-10-28
申请号：JP6826091
申请日：1991-04-01
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TSUKAMOTO KATSUHIDE , NAKATANI SEIICHI , NAKAMURA HISASHI
IPC分类号： H01L23/538 , H05K1/14 , H05K3/30 , H05K3/34 , H05K3/46
摘要： PURPOSE:To make it possible to connect chip components without strain induced by a thermal cycle by laying out each terminal of a chip component in face- shape and bonding each terminal with a flexible board. CONSTITUTION:There are provide chip components 101, such as an IC, a resistor, a capacitor, and a coil. A sealing resin integrates each chip components 101, and hence forms one piece component 105 having a bump 103 attached to the terminal of each chip component 101. Each terminal of the chip components 101 is integrally laid out in face shape and bonded with a flexible board 106. This construction makes it possible to eliminate thermal strain produced by a thermal cycle and provide a reliable bonding performance and enhance a heat emission performance more satisfactorily if a further attempt is made to integrate the chip components 101, using a good conductor sheet.

8. 发明专利

JPH02243769A PRODUCTION OF ELECTRICALLY CONDUCTIVE PARTICLES 失效
公开(公告)号：JPH02243769A
公开(公告)日：1990-09-27
申请号：JP6252089
申请日：1989-03-15
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KIMURA RYO , ISHIKAWA MARIKO , OKINAKA HIDEYUKI , KAWAKITA KOJI , NAKAMURA HISASHI
IPC分类号： C23C18/18 , C23C18/30
摘要： PURPOSE:To improve the electrical conductivity and thermal stability of particles of an electrically conductive multiple oxide in spite of a small thickness of coats by coating the surfaces of the particles with noble metal colloid. CONSTITUTION:Colloid of a noble metal such as Au, Ag, Pd or Pt is adsorbed on the surfaces of particles of an electrically conductive multiple oxide as a base material and the particles are washed and dried to obtain noble metal coated electrically conductive particles. The multiple oxide is preferably one or more among La1-xSrxCoO3 (0.1

9. 发明专利

JPH02243768A PRODUCTION OF ELECTRICALLY CONDUCTIVE PARTICLES 失效
公开(公告)号：JPH02243768A
公开(公告)日：1990-09-27
申请号：JP6247989
申请日：1989-03-15
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KIMURA RYO , ISHIKAWA MARIKO , OKINAKA HIDEYUKI , KAWAKITA KOJI , NAKAMURA HISASHI
IPC分类号： C23C18/18 , C23C18/31 , C23C18/44 , H01B1/22
摘要： PURPOSE:To improve the electrical conductivity and thermal stability of particles of an electrically conductive multiple oxide by coating the surfaces of the particles with a noble metal by electroless plating after activation with Pd colloid. CONSTITUTION:Pd colloid is adsorbed on the surfaces of particles of an electrically conductive multiple oxide as a base material to activate the surfaces and the activated surfaces are directly coated with a noble metal such as Au, Ag, Pd or Pt in an electroless plating soln. The multiple oxide is preferably one or more among La1-xSrxCoO3 (0.1

10. 发明专利

JPH01276750A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01276750A
公开(公告)日：1989-11-07
申请号：JP10638288
申请日：1988-04-28
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： NAKAMURA HISASHI
IPC分类号： H01L21/60 , H01L23/12 , H01L23/28 , H01L23/50
摘要： PURPOSE:To improve the reliability for moisture-resistance, heat impact resistance, etc., by providing a projected bump layer on an electrode pad for external connection of a semiconductor chip, burying the chip in an insulating resin, and further arranging a projected bump layer for external connection on the upper surface of the resin. CONSTITUTION:An Al pad 8 for external connection of an Si chip 7 is arranged. A projected bump layer 9 is formed by stacking an Au thick film through a barrier layer such as Ti or Cr. Then, the chip is buried into a resin 10 by setting an epoxy resin having a filler such as silica mixed with either an acid anhydride-containing or amine-containing thermosetting agent. A molding surface is polished so that a part of the bump layer 9 is exposed from the resin 10. Then, a conductive paste is screen-printed to form a circuit conductive layer 11 and a bump layer 12. According to the constitution, not only the moisture resistance of the semiconductor device is adequately guaranteed but also the reliability against heat impact is proved when a soldering is made on a glass fabric base, epoxy resin printed wiring board by a face down method. A rigid support board such as a metal may be used on the rear of the semiconductor chip 7.

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