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1. 发明专利

JP2007115612A Plasma display panel 有权
标题翻译：等离子显示面板
公开(公告)号：JP2007115612A
公开(公告)日：2007-05-10
申请号：JP2005308187
申请日：2005-10-24
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： TANAHASHI SATOSHI , OKUMURA SHIGEYUKI , WAKABAYASHI SHUNICHI , SETOGUCHI HIROSHI , KAMATANI TAKAYUKI
IPC分类号： H01J11/22 , H01J11/34 , H01J11/38
摘要： PROBLEM TO BE SOLVED: To provide a plasma display panel in which unevenness of luminance in the panel surface is suppressed and increase of impressing voltage is contained.
SOLUTION: The plasma display panel comprises a substrate 4 and a rear substrate 9 installed opposed to each other so as to form a discharge space in between, a plurality of scanning electrodes 5 and sustaining electrodes 6 formed on the substrate 4, and a dielectric layer 7 formed so as to cover the scanning electrodes 5 and the sustaining electrodes 6. In this case, the dielectric constant of the dielectric layer 7 in the center part C of the substrate 4 is made larger than that of the dielectric layer 7 at both end parts B of the substrate 4.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种等离子体显示面板，其中抑制面板表面的亮度不均匀性并且包含施加电压的增加。解决方案：等离子体显示面板包括彼此相对安装以在其间形成放电空间的基板4和后基板9，多个扫描电极5和形成在基板4上的维持电极6，以及形成为覆盖扫描电极5和维持电极6的电介质层7.在这种情况下，使基板4的中心部分C的电介质层7的介电常数大于电介质层7的介电常数在基板4的两个端部B处。版权所有（C）2007，JPO＆INPIT

2. 发明专利

JP2004226916A Display device and its driving method 审中-公开
公开(公告)号：JP2004226916A
公开(公告)日：2004-08-12
申请号：JP2003017688
申请日：2003-01-27
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： WAKABAYASHI SHUNICHI , HASHIGUCHI JUNPEI
IPC分类号： G09G3/20 , G09G3/288 , G09G3/291 , G09G3/292 , G09G3/294 , G09G3/298 , G09G3/28
摘要： PROBLEM TO BE SOLVED: To provide a display device whose discharge is stabilized, and its driving method. SOLUTION: Each field is divided into a plurality of subfields including an address period and a maintaining period respectively. In an address period, write pulses Vw and Vs are applied between an address electrode and a scanning electrode by an address driver and a scanning driver to cause address discharge. In a maintaining period, maintaining pulses Vi and Vj are applied by the scanning driver and sustainment driver alternately between the scanning electrode and a sustaining electrode to cause maintained discharge. In the maintaining period, an adjusting voltage CV corresponding to the length of the maintaining period is applied to the address electrode. COPYRIGHT: (C)2004,JPO&NCIPI

3. 发明专利

JP2004157291A Driving method and driving-gear for ac type plasma display panel 审中-公开
公开(公告)号：JP2004157291A
公开(公告)日：2004-06-03
申请号：JP2002322260
申请日：2002-11-06
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： MURAKOSO TOMOHIRO , TACHIBANA HIROYUKI , NAGAO NOBUAKI , WAKABAYASHI SHUNICHI , MURAI RYUICHI
IPC分类号： G09G3/20 , G09G3/288 , G09G3/291 , G09G3/292 , G09G3/293 , G09G3/294 , G09G3/296 , G09G3/298 , G09G3/28
摘要： PROBLEM TO BE SOLVED: To provide a high-contrast driving method for a PDP (plasma display panel) capable of assuring a sufficient driving margin by compensating a fluctuation-component of a barrier voltage due to the influence of crosstalk etc., from adjacent cells even if the barrier voltage changes.
SOLUTION: The driving method for the PDP comprises impressing an upward ramp type waveform having a voltage smaller than an upward ramp type waveform voltage to perform perfect initialization to a scanning electrode as an initialization waveform of a subfield performing the selective initialization giving rise to a discharge only to the discharge cell where a sustaining discharge arises among a plurality of the subfields constituting one field period.
COPYRIGHT: (C)2004,JPO

4. 发明专利

JPH11194741A PLASMA DISPLAY DRIVING SYSTEM 失效
公开(公告)号：JPH11194741A
公开(公告)日：1999-07-21
申请号：JP35960097
申请日：1997-12-26
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： WAKABAYASHI SHUNICHI
IPC分类号： G09G3/28 , G09G3/20 , G09G3/288 , G09G3/296 , H01J11/20 , H04N5/66 , H01J11/02
摘要： PROBLEM TO BE SOLVED: To reduce moving image pseudo contour noise by writing data of every (n) lines, performing driving for displaying all subfields (n) times and constituting one screen, and increasing a luminance display speed in line units. SOLUTION: Data of (n) lines are written and the driving for displaying all subfields is repeated (n) times to constitute one screen, thereby increasing the luminance display speed in line units. For example, the writing of data and light emission are performed by every three lines as to all the subfields. In this case, lines 1, 4, 7... are displayed in 1st display order. In 2nd display order, lines 2, 5, 8... are displayed. In 3rd display order, lines 3, 6, 9... are displayed. Thus, the address period of the 1st display is shortened to 1/3, so the time becomes short. Namely, the determined display time of luminance as to the line 1 is shortened. Consequently, the drawing speed of the lines is increased, the moving image pseudo contour is reducible.

5. 发明专利

JPH08140022A HORIZONTAL DEFLECTION DEVICE 失效
公开(公告)号：JPH08140022A
公开(公告)日：1996-05-31
申请号：JP27904794
申请日：1994-11-14
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： WAKABAYASHI SHUNICHI
IPC分类号： H04N5/68 , H04N3/16
摘要： PURPOSE: To theoretically turn transient time until delay time and signals are changed to zero and to obtain a horizontal deflection device for which the change speed of a deflection potential is fast by generating the deflection potentials corresponding to the respective pixels of RGB, switching them corresponding to deflection and driving a flat CRT by the switched deflection potential of large amplitude. CONSTITUTION: The respective horizontal potentials of plural potential circuits 7 are equivalent to the potentials of the respective stages of staircase waves Vn, that are the deflection potentials of the respective stages of the staircase waves generated by DAC in a conventional horizontal deflection device. The respective deflection potentials are inputted to a multiplexer 8, time-division controlled by a control circuit 1, successively switched from the potential 1 to the potential (n) and added to an output circuit 5 as the signals of the large amplitude. The signals of the large amplitude pass through the output circuit 5 and are impressed to the horizontal deflection electrode 6 of the flat CRT. Thus, the signals capable of driving the flat CRT are directly generated and they are passed through the output circuit 5 and impressed to the horizontal deflection electrode 6 of the flat CRT.

6. 发明专利

JPH07184081A SYNCHRONIZING SEPARATOR CIRCUIT FOR HIGH VISION 失效
公开(公告)号：JPH07184081A
公开(公告)日：1995-07-21
申请号：JP32298193
申请日：1993-12-22
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： WAKABAYASHI SHUNICHI
IPC分类号： H04N5/08 , H04N7/015
摘要： PURPOSE:To provide the synchronizing separator circuit for High Vision in which a phase shift of a synchronizing signal is prevented and a picture of higher quality is obtained. CONSTITUTION:One of video signals received from a signal input terminal 1 is separated through waveform shaping from a low level waveform of a ternary synchronizing signal at a preliminary synchronizing separator circuit 4 and outputted as a preliminary synchronizing separator output signal. A mask pulse is generated from the preliminary synchronizing separator output signal. The remaining video signal is subjected to pedestal clamping by a pedestal clamp circuit 7 and a signal obtained by masking a high level waveform of the ternary synchronizing signal with the mask pulse is sliced at a comparator 9 by using a pedestal level and a synchronizing separator output signal is outputted from a synchronizing separator output terminal 10. The timing of the rising of the synchronizing separator output signal and the timing of the rising of the ternary synchronizing signal are matched with each other.

7. 发明专利

JPH05328350A VIDEO DESCRAMBLING DEVICE 失效
公开(公告)号：JPH05328350A
公开(公告)日：1993-12-10
申请号：JP12592492
申请日：1992-05-19
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： WAKABAYASHI SHUNICHI
IPC分类号： H04K1/00 , H04N7/167 , H04N7/171 , H04N21/4405
摘要： PURPOSE:To obtain an image of high quality even when the DC level of a video signal is changed by providing this video descrambling device with a DC shifting circuit and executing descrambling signal processing in a DC direct connection state. CONSTITUTION:A scramble signal with compressed synchronizing part is DC- shifted by the DC shifting circuit 2 and simultaneously inputted to amplifiers 3 to 5 having respectively different synchronizing part compression ratios. A scrambling mode controller 10 detects which mode is applied to the synchronizing part compression ratio of the inputted scrambling signal and controls a mode switching circuit 6 to extract the output of the amplifier corresponding to the synchronizing part compression ratio. The output of the circuit 6 is outputted as a descrambled image signal output 7 and inputted to a TV image receiver. Even when the DC level of a video signal on the transmitting side is changed due to a change in the degree of modulation or the like, an apparent change in a pedestal level is removed and the quality of an image is improved.

8. 发明专利

JPH04351086A AGC DEVICE FOR SCRAMBLE SIGNAL 失效
公开(公告)号：JPH04351086A
公开(公告)日：1992-12-04
申请号：JP12413891
申请日：1991-05-29
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： WAKABAYASHI SHUNICHI
IPC分类号： H04N5/52 , H04N7/16 , H04N7/171
摘要： PURPOSE:To realize the AGC immune to the fluctuation of the sender side while avoiding the AGC from being followed to an irregular video signal even when the irregular video signal is received due to the fluctuation in the sender side. CONSTITUTION:A scramble signal (base band) e after demodulation in the 6dB mode is inputted to an input terminal 11 and the scramble signal (e) is subjected to AM modulation (negative modulation) by a modulator 12. The output (d) of the modulator is descrambled by a high frequency amplifier 13 in a form of the modulation signal. Thus, the synchronization portion of an amplifier output (g) is amplified and restored to its regular position. Then the amplifier output (g) is AM-detected by a detector 14 and a DC voltage of a SYNC top of the synchronization portion in the detector output (h) is fed back to a demodulation section as an AGC signal.

9. 发明专利

JP2006351259A PLASMA DISPLAY PANEL 审中-公开
公开(公告)号：JP2006351259A
公开(公告)日：2006-12-28
申请号：JP2005173389
申请日：2005-06-14
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TACHIBANA HIROYUKI , OGAWA KENJI , WAKABAYASHI SHUNICHI
IPC分类号： H01J11/12 , H01J11/22 , H01J11/24 , H01J11/26 , H01J11/28 , H01J11/30 , H01J11/34 , H01J11/36 , H01J11/38 , H01J11/40 , H01J11/42 , H01J11/44 , H01J11/50
摘要： PROBLEM TO BE SOLVED: To generate stable initialized discharge even if xenon partial pressure of a discharge gas of a panel equipped with auxiliary discharge cells is increased. SOLUTION: This plasma display panel is provided with: a plurality of display electrode couples arranged on a front substrate so as to be parallel with one another and each comprising a scanning electrode and a sustaining electrode; a plurality of data electrodes arranged on a back substrate disposed oppositely to the front substrate by interposing a discharge space so as to intersect with the display electrode couples and to be parallel with one another; a plurality of main discharge cells 40 for generating main discharge in the respective intersection parts between the display electrode couples and the data electrodes; and barrier ribs for partitioning discharge spaces in a plurality of priming discharge cells for generating auxiliary discharge between the main discharge cells 40 and the main discharge cells 40. The barrier ribs include longitudinal wall parts 34a in parallel with the data electrodes and lateral wall parts 34b in parallel with the display electrode couples; when the main discharge cell 40 is viewed from the front substrate side, spaces are formed between the lateral wall part 34b partitioning the main discharge cell 40, and the scanning electrode and the sustaining electrode. COPYRIGHT: (C)2007,JPO&INPIT

10. 发明专利

JP2006172800A Plasma display panel and its driving method 审中-公开
标题翻译：等离子体显示面板及其驱动方法
公开(公告)号：JP2006172800A
公开(公告)日：2006-06-29
申请号：JP2004361185
申请日：2004-12-14
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： TACHIBANA HIROYUKI , KOSUGI NAOTAKA , WAKABAYASHI SHUNICHI , MAKINO HIROYASU , KIKO SHIGEO
IPC分类号： G09G3/20 , G09G3/288 , G09G3/291 , G09G3/292 , G09G3/298 , H01J11/12 , H01J11/22 , H01J11/24 , H01J11/26 , H01J11/28 , H01J11/32 , H01J11/34 , H01J11/36 , H04N5/66
摘要： PROBLEM TO BE SOLVED: To provide a plasma display panel and its driving method capable of stably generating writing discharge without narrowing a driving voltage margin of writing operation and without setting a driving circuit only for a priming electrode.
SOLUTION: A discharge start voltage of a priming cell is set to be lower than a discharge start voltage of a main discharge cell. The priming electrode is electrically connected to one of scanning electrodes. After initializing the operation of the main discharge cell, discharge is not generated by the main discharge cell and initializing discharge is generated only by the priming cell.
COPYRIGHT: (C)2006,JPO&NCIPI

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