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1. 发明专利

JP2007150794A Editing device and reproducing device 审中-公开
标题翻译：编辑设备和复制设备
公开(公告)号：JP2007150794A
公开(公告)日：2007-06-14
申请号：JP2005343255
申请日：2005-11-29
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： SAKANIWA KATSUYUKI , NAKAMURA TAKAYUKI , OTAKA HIDEKI , WASAI MICHIO
IPC分类号： H04N5/262 , G11B27/034 , H04N5/91
摘要： PROBLEM TO BE SOLVED: To perform appropriate reediting and reproduction to a rendering material even under a condition with the restriction of a capacity.
SOLUTION: The editing device comprises: a cut specifying means 103 for specifying a used section in a material as a cut on the basis of editing data; a file division judging means 104 for judging whether or not to divide the cut into a plurality of files from the length of the cut specified in the cut specifying means 103; a file constitution determining means 105 for determining the file constitution of the rendering material to be generated as an edited result according to a judged result in the file division judging means 104; a file copying means 107 for copying a part to be used as the cut in the file of the material to the file of the file constitution determined in the file constitution determining means 105; and a division mark imparting means 106 for imparting a division mark which is a mark indicating whether or not the division is performed to the file of the cut according to the judged result in the file division judging means 104.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：即使在限制容量的条件下，也可以对渲染材料进行适当的重新编辑和再现。编辑装置包括：切割指定装置103，用于根据编辑数据指定材料中的使用部分作为切割; 文件分割判断装置104，用于根据切割指定装置103中指定的切割长度判断是否将切割分割成多个文件; 文件构成确定装置105，用于根据文件分割判断装置104中的判断结果确定要作为编辑结果生成的绘制材料的文件构成; 文件复制装置107，用于将用于文件文件中的剪切的部分复制到在文件构成确定装置105中确定的文件构成的文件中; 以及分割标记赋予装置106，用于根据文件分割判断装置104中的判断结果，赋予指示是否对切割文件执行划分的标记的分割标记。版权所有（C））2007，JPO＆INPIT

2. 发明专利

JP2004180233A Receiving and reproducing apparatus, medium and information aggregate 审中-公开
公开(公告)号：JP2004180233A
公开(公告)日：2004-06-24
申请号：JP2002347176
申请日：2002-11-29
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： YOSHIDA JUNJI , MATSUMI CHIYOKO , OTAKA HIDEKI , KORI TOSHIYUKI
IPC分类号： H04N5/93 , G11B20/10
摘要： PROBLEM TO BE SOLVED: To provide a receiving and reproducing apparatus, medium and information aggregate in which data reproduced/transmitted at a double or higher speed are received to reproduce the video and audio.
SOLUTION: Frame data are generated from a transmission packet received by an interface, audio data are separated from the frame data, and the first number M of samples is acquired from the audio data. L, L=M×N when the reproducing speed is an N-times speed (N is an integer of ≥1), is reported as the second number of samples, and the audio data are reproduced based upon the second number of samples.
COPYRIGHT: (C)2004,JPO

3. 发明专利

JPH10164499A METHOD FOR DUBBING DIGITAL SIGNAL AND DEVICE FOR RECORDING AND REPRODUCING DIGITAL SIGNAL 失效
公开(公告)号：JPH10164499A
公开(公告)日：1998-06-19
申请号：JP667898
申请日：1998-01-16
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MATSUMI CHIYOKO , YAMAGUCHI SUSUMU , OTAKA HIDEKI , HOSHIAI RYOICHI
IPC分类号： H04N5/91 , G11B20/10 , H04N5/92
摘要： PROBLEM TO BE SOLVED: To simultaneously attain dubbing and monitoring in a simple constitution in a digital recording and reproducing equipment. SOLUTION: An equipment at a reproduction side outputs a signal obtained by time axis multiplying a video signal and a voice signal in a highly efficiently encoded state. An equipment at a recording side operates a recording processing for dubbing recording by an error-correcting code signal processor 32b, a voice signal processor 33b, a modem 34b, and a magnetic recording and reproduction system 17b, and simultaneously operates a reproducing processing for monitoring by a highly efficient code signal processor 31b, a video signal D/A converter 24b, and a voice signal D/A converter 25a.

4. 发明专利

JPH08149467A VIDEO SIGNAL PROCESSOR 失效
公开(公告)号：JPH08149467A
公开(公告)日：1996-06-07
申请号：JP28188794
申请日：1994-11-16
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： HORI RYUICHI , OTAKA HIDEKI
IPC分类号： H04N19/105 , G06T9/00 , H03M7/30 , H04N19/119 , H04N19/126 , H04N19/136 , H04N19/139 , H04N19/14 , H04N19/176 , H04N19/18 , H04N19/186 , H04N19/189 , H04N19/196 , H04N19/423 , H04N19/51 , H04N19/59 , H04N19/60 , H04N19/65 , H04N19/85 , H04N19/88 , H04N19/91 , H04N7/30
摘要： PURPOSE: To reduce quantization distortion by performing a high efficient coding of the video signal for which a sampling is performed by the different phase for every line by using an orthogonal transformation. CONSTITUTION: A block is composed by collecting the horizontal direction 8 picture elements and the vertical direction 16 lines of a MUSE signal by a blocking device 303, the edge in the horizontal direction within the block is detected by an edge detector 304, the edge is read according to the result and an address generator 305 is controlled. When the edge is not contained, the blocks are read as the blocks which are adjacent to the two vertical directions of the horizontal direction 8 picture elements and vertical direction 8 lines from a buffer memory 306. When the edge is contained, the blocks of the horizontal direction 8 picture elements and the vertical direction 8 lines which are adjacent in the horizontal direction are composed and are read from the buffer memory 306 by dividing the blocks into two blocks of the horizontal direction 4 picture elements and the vertical direction 16 lines and alternately performing a horizontal multiplexing of the picture elements on the two lines within each block.

5. 发明专利

JPH0730892A ORTHOGONAL TRANSFORMATION CODER 失效
公开(公告)号：JPH0730892A
公开(公告)日：1995-01-31
申请号：JP17309793
申请日：1993-07-13
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： OTAKA HIDEKI , SHIGESATO TATSURO
IPC分类号： H04N7/01 , H04N7/30
摘要： PURPOSE:To improve distortion by enhancing coding efficiency for a reinforcement signal when orthogonal transformation coding processing is applied to an EDTV2 signal in which the reinforcement signal is multiplexed on upper and lower mask portions. CONSTITUTION:A motion detection circuit 402 detects an inter-field motion to a block of a picture signal to set '0' or '1' to motion information 403, and to set '1' always to the motion information 403 to a block of a reinforcement signal. The method of orthogonal transformation is selected based on the set motion information 403 and when the motion information 403 is set to '0', switches 404,405 are thrown to the position of Fr and the in-frame orthogonal transformation circuit makes orthogonal transformation. When the motion information 403 is set to '1', the switches 404,405 are thrown to the position of Fi and the in-field orthogonal transformation circuit makes orthogonal transformation.

6. 发明专利

JPH04263588A DIGITAL VTR 失效
公开(公告)号：JPH04263588A
公开(公告)日：1992-09-18
申请号：JP2442491
申请日：1991-02-19
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： OTAKA HIDEKI , SHIGESATO TATSURO , KASHIRO TAKAO
IPC分类号： G11B15/18 , G11B20/10 , G11B20/12 , G11B27/28 , H04N5/92 , H04N5/937 , H04N5/945 , H04N19/895
摘要： PURPOSE:To realize slow reproduction with a small amount of memory in the digital VTR efficiently encoded and recorded in plural field units. CONSTITUTION:The slow reproduction is realized as the slow in a field unit by using a corrected memory 101, a memory 103, and a memory controller 104. In this case, the memory controller detects the ID of a regenerative signal, and controls the memory 103 on the output side by the detection result. In short, when the reproduction of one field of data is detected, the switching of the field to be outputted in the next field period is performed by using the writing control signal.

7. 发明专利

JPH04178088A CODER 失效
公开(公告)号：JPH04178088A
公开(公告)日：1992-06-25
申请号：JP30738890
申请日：1990-11-13
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： OTAKA HIDEKI , NISHINO SHOICHI , SHIGESATO TATSURO
IPC分类号： H04N19/60 , H04N1/41 , H04N19/126 , H04N19/132 , H04N19/136 , H04N19/14 , H04N19/149 , H04N19/176 , H04N19/189 , H04N19/196 , H04N19/42 , H04N19/423 , H04N19/46 , H04N19/59 , H04N19/70 , H04N19/91
摘要： PURPOSE:To ensure the accuracy of orthogonal transformation and to realize a coding section with less circuit scale by increasing an output word length of orthogonal transformation. CONSTITUTION:An orthogonal transformation device 12 implements orthogonal transformation in the unit of blocks and outputs the result in m-bits. The transformed orthogonal components are rearranged and a component (maxAC) except its DC component is detected. Amax detector 13 detects a maximum value of an absolute value of the amplitude in the orthogonal component and the result is classified into four classes 0,1.2.3 depending on the magnitude. The maximum 3-class is quantized so as to be kept in (m-1) bits of dynamic range. The lower class is quantized to be within an m-bit word length. Moreover, the rearrangement method is implemented in the order of the arrow in figure as one method. Since the dynamic range of the input data to a variable length coder 19 is in a range of -MAX(m-1)-+MAX(m-1), the capacity of the table of the coder is enough to be that corresponding to the dynamic range of the (m-1) bit input.

8. 发明专利

JPH0479681A DIGITAL RECORDING METHOD 失效
公开(公告)号：JPH0479681A
公开(公告)日：1992-03-13
申请号：JP19362690
申请日：1990-07-20
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： OTAKA HIDEKI , IDE AKIFUMI , IKETANI AKIRA , NISHINO SHOICHI , SHIGESATO TATSURO , MATSUMI CHIYOKO
IPC分类号： H04N5/7826 , G11B20/12 , H04N5/782 , H04N5/92 , H04N9/80 , H04N9/804 , H04N9/808 , H04N19/102 , H04N19/134 , H04N19/174 , H04N19/189 , H04N19/423 , H04N19/60 , H04N19/625 , H04N19/70 , H04N19/85 , H04N19/895
摘要： PURPOSE:To reproduce a wide area of picture by inserting encoding information into one or (i) pieces of consecutive sync. blocks for recording. CONSTITUTION:(m) pieces of orthogonally transformed blocks are encoded and encoded data are inserted into three pieces of sync. blocks (a), (b), and (c). Regarding the component after orthogonal transformation encoding, components in areas represented by the A, B, and C in the figure are inserted into each sync. block (a), (b), and (c). Encoding information and important information, such as low-band components, etc., are collectively inserted into part of sync. blocks for recording. Therefore, even when only part of the sync. blocks can be read out, a wider area of a picture can be reproduced while high-band components are erased when the sync. blocks containing the encoding information and low-band components can be read out.

9. 发明专利

JPH0474365A DIGITAL RECORDING METHOD 失效
公开(公告)号：JPH0474365A
公开(公告)日：1992-03-09
申请号：JP18654990
申请日：1990-07-13
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： OTAKA HIDEKI , IDE AKIFUMI , IKETANI AKIRA , NISHINO SHOICHI , SHIGESATO TATSURO , MATSUMI CHIYOKO
IPC分类号： G11B20/12 , G11B20/18
摘要： PURPOSE:To enable reproducing to be equivalent to that under ideal condition even when a head is deviated slightly from an ideal locus at the time of high speed reproducing by arranging alternately i-number of continuous 1st sync blocks with j-number of continuous 2nd sync blocks on a track. CONSTITUTION:The sync block is regarded as one recording unit, and at the time of recording by arranging m-number of 1st sync blocks consisting of only error correcting check symbols and n 2nd sync blocks consisting of signal data and the error correcting check symbols on the track, i continuos 1st sync blocks and j aforesaid 2nd sync blocks can be read out under hgih speed reproducing at a specified speed, whereas even when the locus of the head is slightly deviated, j sync blocks including the signal data can be read out. Thus, even when the head is slightly deviated from its ideal locus, the reproducing equivalent to that under its ideal condition is performed.

10. 发明专利

JPH0465977A VIDEO SIGNAL RECORDER 失效
公开(公告)号：JPH0465977A
公开(公告)日：1992-03-02
申请号：JP17475090
申请日：1990-07-02
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： IKETANI AKIRA , YAMAMITSU CHOJURO , IDE AKIFUMI , NISHINO SHOICHI , SHIGESATO TATSURO , OTAKA HIDEKI , MATSUMI CHIYOKO
IPC分类号： G11B20/02 , H04N5/217 , H04N5/243 , H04N5/335 , H04N5/355 , H04N5/357 , H04N5/378
摘要： PURPOSE:To realize a video movie obtaining a picture with good SN regardless of a photographing state by providing an averaging means taking the average of plural photographed pictures in order and a recording means recording the output of the averaging means. CONSTITUTION:The contents of a holding circuit 3 of an initial state 0 and a signal from a photoelectric conversion circuit 1 are added to the video signal from the photoelectric conversion circuit 1 to be held in the circuit 3. As this result, the first picture is held in the circuit 3. Next, when the second picture is transmitted from the circuit 1, it is added with the contents of the circuit 3 to be stored in the circuit 3 again. After performing this operation to the plural pictures, the averaging value of the cumulative addition value of each picture element in the circuit 3 is decided in an average circuit 4, and a recording circuit 6 records the output from the circuit 4. Thus, the SN of the recording video signal is improved with simple circuit construction.

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