会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 3. 发明专利
    • ALIGNER AND PATTERN FORMING METHOD
    • JPH09148224A
    • 1997-06-06
    • JP30543695
    • 1995-11-24
    • MATSUSHITA ELECTRIC IND CO LTD
    • MATSUOKA KOJI
    • G03F7/207G03F9/02H01L21/027
    • PROBLEM TO BE SOLVED: To beforehand recognize a chip or an exposure area being a fail pattern or prevent the fail pattern by a method wherein there is a function of measuring beforehand a projection and a recess and an inclination of the exposure area, and of calculating the maximum focus error which cannot be corrected when corrected in a stage. SOLUTION: An inclination and a projection and a recess of an exposure area are measured first by sensors 3, 4 before a wafer 1 is exposed to light. Next, an inclination amount of the stage and a focus position are calculated by a calculation part 5 based on the data so that a focus error of the exposure area is minimized. Further, a value and a position of the maximum focus error left when adjusted are calculated. Next, when the maximum focus error exceeds a specific permissible value (0.5μm), and alarm is raised by a buzzer. Further, when not exceeded, the inclination amount of the stage and a value of the focus position are supplied to a stage control part 6, and after an inclination and a height position of a stage 2 are actually adjusted, a pattern is exposed to light through a projection lens 9.
    • 4. 发明专利
    • FORMATION OF PATTERN
    • JPH09115805A
    • 1997-05-02
    • JP26967495
    • 1995-10-18
    • MATSUSHITA ELECTRIC IND CO LTD
    • MATSUOKA KOJI
    • G03F7/20H01L21/027
    • PROBLEM TO BE SOLVED: To reduce the optical proximity effect of line system pattern in the process for forming a gate by setting the coherent factor, indicative of the coherency of light in the illumination system of aligner, within a specified range. SOLUTION: A light 6 emitted from an illumination system 1 is collimated through a condenser lens 2 before illuminating a mask 3. The light 6 transmitted through the mask 3 is passed through a projection lens 4 and focused on a water 5. Since the coherent factor of illumination system 1 is set in the range of 0.70-0.80, the outermost light illuminates the mask 3 at a lower angle (ϕ1) as compared with common illumination (σ=0.60) and the mask 3 is illuminated over a wide angular range as a whole. Consequently, contrast of pattern is enhanced and and the range of line width is confined within 0.026μm thus suppressing fluctuation of line width due to optical proximity effect.
    • 5. 发明专利
    • PATTERN FORMING METHOD
    • JPH08264408A
    • 1996-10-11
    • JP6075195
    • 1995-03-20
    • MATSUSHITA ELECTRIC IND CO LTD
    • MATSUOKA KOJI
    • G03F7/30H01L21/027
    • PURPOSE: To obtain stable line width control by a method wherein a dedicated area for detecting a resist development termination is provided on a wafer and light is projected to the dedicated area and reflected light from the resist and the wafer is detected to observe the development state of the resist, so that the data are fed back. CONSTITUTION: An exposed wafer 3 enters a processor 4 and a developing solution is dripped on the wafer 3. Simultaneously, light is projected from a light-casting part 1 to development termination detection pattern 3A located near the orientation flat of the wafer 3. Resist in an exposed area of the development termination detection pattern 3A is dissolved and the film thickness is gradually decreased, therefore the strength of light according to the variation of the resist film thickness is observed in a light-receiving part 2. A control unit 5 judges the time point when the amplitude is not observed from the waveform of the light strength, and computes the period after developing liquid is applied onto the wafer 3 until reaching the substrate. An instruction of the development termination period is sent to the processor 4 based on the obtained period.