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    • 4. 发明专利
    • IMAGE DISPLAY DEVICE
    • JPH089304A
    • 1996-01-12
    • JP13709894
    • 1994-06-20
    • MATSUSHITA ELECTRIC IND CO LTD
    • DOBASHI KENJINISHIKAWA HIROSHITANIGUCHI HIROSHIGE
    • H04N5/68H04N3/18
    • PURPOSE:To prevent deterioration in the image quality due to ununiformed shape of picture elements by controlling a drive voltage applied to a line cathode being a beam source generating an electron beam and giving corresponding adjustment data to a memory so as to eliminate the dispersion in a beam spot to be caused. CONSTITUTION:A counter 102a uses a clock 101a being a vertical synchronizing signal as an initializing signal and counts number of clocks 101b being 11H periodic signals till another clock 101a is received again. Then a counter 102b counts number of horizontal synchronizing signal clocks 101c by using the clock 101b as an initializing signal. A memory 103 receiving the count by the counter 102a as a high-order address and the count by the counter 102b as a low-order address provides an output of an adjustment value corresponding to a scanning line. The adjustment value is given to a D/A converter 104, from which an analog signal is given to an amplifier 105 and then the voltage of the analog signal is amplified to a degree to control a drive voltage of the line cathode. Thus, a vertical diameter of a beam spot is controlled by giving the adjustment address data to the memory.
    • 5. 发明专利
    • Video display
    • 视频显示
    • JP2005341486A
    • 2005-12-08
    • JP2004161038
    • 2004-05-31
    • Matsushita Electric Ind Co Ltd松下電器産業株式会社
    • DOBASHI KENJI
    • H04N5/06G09G5/00G09G5/36G09G5/391H04N5/46H04N7/01
    • PROBLEM TO BE SOLVED: To reproduce a moving video smoothly with high precision using a simple circuit configuration.
      SOLUTION: The video display comprises a first counting circuit 1 for counting the horizontal sync signal of an input signal by reference clock; a first delay circuit 3 for delaying a horizontal sync signal which is to be inputted; a first OR circuit 4 outputting logical sum of the output from the first delay circuit 3 and the horizontal sync signal of the input signal; a second counting circuit 5 for counting the output signal from the first OR circuit 4 for one vertical period; a second delay circuit 7 for delaying the vertical sync signal of the input signal; and a second OR circuit 8 outputting logical sum of the output from the second delay circuit 7 and the horizontal sync signal from the first OR circuit 4.
      COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:使用简单的电路配置以高精度平滑地再现移动视频。 解决方案:视频显示器包括:第一计数电路1,用于通过参考时钟对输入信号的水平同步信号进行计数; 用于延迟待输入的水平同步信号的第一延迟电路3; 输出来自第一延迟电路3的输出和输入信号的水平同步信号的逻辑和的第一OR电路4; 第二计数电路5,用于对来自第一OR电路4的输出信号进行一个垂直周期的计数; 用于延迟输入信号的垂直同步信号的第二延迟电路7; 以及第二OR电路8,输出来自第二延迟电路7的输出和来自第一OR电路4的水平同步信号的逻辑和。(C)2006年,JPO和NCIPI
    • 8. 发明专利
    • Digital signal processing apparatus
    • 数字信号处理设备
    • JP2005142624A
    • 2005-06-02
    • JP2003374142
    • 2003-11-04
    • Matsushita Electric Ind Co Ltd松下電器産業株式会社
    • DOBASHI KENJI
    • H04N5/06
    • PROBLEM TO BE SOLVED: To realize stable image display and stable drive circuit control even when a synchronizing signal is transmitted by any system.
      SOLUTION: The digital signal processing apparatus for converting an input video signal adopting a digital transmission system into a display form adaptive to an image display apparatus includes: a first counter circuit 1 for counting a reference clock of the input video signal on the basis of a horizontal synchronizing signal; a delay circuit 3 capable of optionally delaying the horizontal synchronizing signal by the reference clock; a pulse generating circuit 2 for using a count result of the first counter circuit 1 to count the reference clocks on the basis of a prescribed signal; and a synchronization selection circuit 4 for comparing an output pulse of the delay circuit 3 with an output pulse of the pulse generating circuit 2 to select and output an input pulse according to a prescribed system.
      COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:即使当任何系统发送同步信号时,也能实现稳定的图像显示和稳定的驱动电路控制。 解决方案:用于将采用数字传输系统的输入视频信号转换成适用于图像显示装置的显示形式的数字信号处理装置包括:第一计数器电路1,用于对输入视频信号的参考时钟进行计数 水平同步信号的基础; 延迟电路3,其能够可选地通过参考时钟延迟水平同步信号; 脉冲发生电路2,用于使用第一计数器电路1的计数结果根据规定的信号对参考时钟进行计数; 以及用于将延迟电路3的输出脉冲与脉冲发生电路2的输出脉冲进行比较的同步选择电路4,以根据规定的系统选择输出输入脉冲。 版权所有(C)2005,JPO&NCIPI
    • 9. 发明专利
    • Video display apparatus
    • 视频显示设备
    • JP2004312086A
    • 2004-11-04
    • JP2003099086
    • 2003-04-02
    • Matsushita Electric Ind Co Ltd松下電器産業株式会社
    • DOBASHI KENJI
    • H04N5/66G09G5/00G09G5/12G09G5/18
    • PROBLEM TO BE SOLVED: To provide an apparatus wherein a circuit for performing a control operation or the like by a synchronizing signal can normally be in operation.
      SOLUTION: The video display apparatus is provided with a vertical synchronizing signal conversion circuit including: a frame pulse generating circuit 1 for generating a pulse for one period for an optional period of a received vertical synchronizing signal; a first counter circuit 2 for counting the number of received times of horizontal synchronizing signals each sharing a one-frame pulse period by using the frame pulse from the frame pulse generating circuit 1 for a reference signal; a double speed circuit 3 for doubling a speed of the received horizontal synchronizing signal; a second counter circuit 4 for counting the number of double speed signals outputted from the double speed circuit 3 on the basis of the frame pulse from the frame pulse generating circuit 1; and a pulse generating circuit 5 for using the results of the first and second counter circuits 2, 4 to generate a pulse.
      COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:提供一种其中用于通过同步信号执行控制操作等的电路通常可以在操作中的装置。 解决方案:视频显示装置设有垂直同步信号转换电路,包括:帧脉冲发生电路1,用于在接收的垂直同步信号的可选周期内产生一个周期的脉冲; 第一计数器电路2,用于通过使用来自帧脉冲发生电路1的参考信号的帧脉冲对每个共享一帧脉冲周期的水平同步信号的接收次数进行计数; 双速电路3,用于使接收的水平同步信号的速度加倍; 第二计数器电路4,用于根据来自帧脉冲发生电路1的帧脉冲对从倍速电路3输出的双速信号的数量进行计数; 以及用于使用第一和第二计数器电路2,4的结果产生脉冲的脉冲发生电路5。 版权所有(C)2005,JPO&NCIPI
    • 10. 发明专利
    • HIGH-VOLTAGE ELECTRICAL DISCHARGE PROTECTING CIRCUIT
    • JP2000350051A
    • 2000-12-15
    • JP15442399
    • 1999-06-02
    • MATSUSHITA ELECTRIC IND CO LTD
    • DOBASHI KENJINAGASAWA YUJI
    • H04N3/18H02H7/04H02H7/12H02H9/04
    • PROBLEM TO BE SOLVED: To obtain a high-voltage electric discharge protecting circuit for preventing circuit destruction in the case of abnormal electric discharge, the deterioration of parts and a high-voltage shut-down malfunction in a picture tube by permitting the delay time of a delay circuit to be longer than the reset time of a display device. SOLUTION: This delay circuit 3, for at least delaying the peak of an abnormal pulse and outputting it, is disposed between an abnormal pulse occurrence point by the in-tube electrical discharge of a Braun tube 1 as the picture tube of the display device and the circuit parts 2 as a circuit to be protected. A reset means for detecting the abnormal pulse between the circuit 3 and the Braun tube 1, and resetting the display device is arranged. Then the delay time of the circuit 3 is made longer than the reset time of the display device. Thus, the abnormal pulse from the Braun tube 1 can be made to reach the circuit parts 2 after a reset operation is completed, so that the circuit malfunction is prevented and also the deterioration and the destruction of the parts due to the superimposition of an abnormal voltage or the abnormal pulse on an operation voltage are prevented.