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1. 发明专利

JP2014036245A Signal reproduction device and signal reproduction method 有权
标题翻译：信号再现设备和信号再现方法
公开(公告)号：JP2014036245A
公开(公告)日：2014-02-24
申请号：JP2012174776
申请日：2012-08-07
申请人： Icom Inc , アイコム株式会社
发明人： SHIBATA KAZUNORI
IPC分类号： H04L7/00 , G10L19/00 , H03M1/66
摘要： PROBLEM TO BE SOLVED: To prevent unexpected signal output due to symbol clock deviation.SOLUTION: A reception part 11 receives a signal from an antenna 10, performs frequency conversion and amplification, performs A-D (Analog-to-Digital) conversion and demodulates digital data. An error detection part 13 detects difference between a time interval of prescribed synchronous words and time corresponding to time length of a frame based on a symbol clock as an error. An insertion part 15 inserts the prescribed number of pieces of insertion data to the digital data at a prescribed interval on the basis of an up-sampling rate. An insertion and extraction control part 16 inserts the insertion data to a prescribed position of the up-sampling data or deletes the prescribed insertion data of the up-sampling data every time the error detected for each integrated frame exceeds a prescribed range. A signal reproduction part 17 performs D-A (Digital-to-Analog) conversion of the up-sampling data, removes a high frequency component using an LPF (Low Pass Filter), performs amplification, generates an analog signal and reproduces it.
摘要翻译：要解决的问题：为了防止符号时钟偏差引起的意外信号输出。解决方案：接收部分11接收来自天线10的信号，执行频率转换和放大，执行AD（模数转换）转换并解调数字数据。错误检测部分13基于符号时钟来检测规定的同步字的时间间隔和对应于帧的时间长度的时间之间的差异作为错误。插入部15基于上采样率将规定数量的插入数据插入数字数据，并以规定的间隔。插入和提取控制部分16将插入数据插入上采样数据的规定位置，或者每当针对每个集成帧检测到的误差超过规定范围时，删除上采样数据的规定插入数据。信号再现部分17执行上采样数据的D-A（数模转换）转换，使用LPF（低通滤波器）去除高频分量，进行放大，产生模拟信号并进行再现。

2. 发明专利

JP2013098684A Wireless apparatus and computer program 审中-公开
标题翻译：无线设备和计算机程序
公开(公告)号：JP2013098684A
公开(公告)日：2013-05-20
申请号：JP2011238401
申请日：2011-10-31
申请人： Icom Inc , アイコム株式会社
发明人： SHIBATA KAZUNORI
IPC分类号： H04B1/40
摘要： PROBLEM TO BE SOLVED: To easily confirm use condition of channels in auditory, so as to prevent occurrence of interference, in a wireless apparatus used for an emergency digital wireless system using a single wave simplex communication system.SOLUTION: A controller of the wireless apparatus extracts ID information on a calling destination and information identifying the type of data included in a data section, analyzes the content, and varies voice outputted from a speaker 12 (S5, S12) between the time, when wireless signal is not received (No in S2) and when a wireless signal including packet which is not addressed to its own station is received (No in S7) and the data section of the packet includes packetized data (No in S10).
摘要翻译：要解决的问题：在用于使用单波简单通信系统的紧急数字无线系统的无线装置中，为了容易地确认听觉中的频道的使用状况，以防止发生干扰。解决方案：无线装置的控制器提取呼叫目的地的ID信息和识别包括在数据部分中的数据类型的信息，分析内容，并且改变从扬声器12输出的语音（S5，S12）当没有接收到无线信号时（S2中为否），并且当接收到包括未寻址到其本台的分组的无线信号（S7中为否），并且分组的数据部分包括分组数据（S10中为否）。版权所有（C）2013，JPO＆INPIT

3. 发明专利

JP2013046310A Fsk signal detection device, receiver, and fsk signal detection method 有权
标题翻译： FSK信号检测装置，接收器和FSK信号检测方法
公开(公告)号：JP2013046310A
公开(公告)日：2013-03-04
申请号：JP2011184051
申请日：2011-08-25
申请人： Icom Inc , アイコム株式会社
发明人： SHIBATA KAZUNORI
IPC分类号： H04L27/14
摘要： PROBLEM TO BE SOLVED: To accelerate the speed of detection of an FSK signal to enable a receiver performing intermittent reception to receive data even when a preamble is short.SOLUTION: A reception part 12 performs frequency conversion, amplification and the like of a reception signal received by an antenna 11, and then transmits the reception signal to a detection part 13. The detection part 13 performs FM detection of the reception signal to generate a demodulation signal having an amplitude corresponding to a frequency of the reception signal. A delay part 14 delays the demodulation signal by a sampling interval of the demodulation signal to generate a delay signal. A difference detector 15 calculates a difference between the demodulation signal and the delay signal to remove a DC component from the demodulation signal and generate a first signal including a frequency component in the vicinity of the DC component. An LPF 17 extracts a value equal to or less than a predetermined cut-off frequency from an absolute value of the first signal calculated by an absolute value processing part 16 to generate a second signal. A determination part 18 determines that an FSK signal is included in the reception signal in the case that a signal level of the predetermined frequency of the second signal is a value within a predetermined range.
摘要翻译：要解决的问题：为了加速FSK信号的检测速度，即使在前导码短的情况下，也能使接收机执行间歇接收来接收数据。解决方案：接收部分12执行由天线11接收的接收信号的频率转换，放大等，然后将接收信号发送到检测部分13.检测部分13对接收信号进行FM检测以产生具有与接收信号的频率对应的振幅的解调信号。延迟部分14将解调信号延迟解调信号的采样间隔以产生延迟信号。差分检测器15计算解调信号和延迟信号之间的差以从解调信号去除DC分量，并产生包括DC分量附近的频率分量的第一信号。 LPF 17从由绝对值处理部16计算出的第一信号的绝对值提取等于或小于预定截止频率的值，以产生第二信号。在第二信号的预定频率的信号电平为预定范围内的值的情况下，确定部分18确定FSK信号包括在接收信号中。版权所有（C）2013，JPO＆INPIT

4. 发明专利

JP2010041138A Fsk receiver 有权
标题翻译： FSK接收器
公开(公告)号：JP2010041138A
公开(公告)日：2010-02-18
申请号：JP2008198883
申请日：2008-07-31
申请人： Icom Inc , アイコム株式会社
发明人： SHIBATA KAZUNORI
IPC分类号： H04L27/14 , H04B1/10 , H04B1/16
CPC分类号： H04L27/142
摘要： PROBLEM TO BE SOLVED: To provide an FSK (Frequency Shift Keying) receiver, wherein correction of a DC offset component, which may be generated due to transmitting and receiving frequency deviations, is suitably and quickly applied to a multi-valued FSK signal.
SOLUTION: In the execution of DC offset correction from an average value (center value) between a maximum value and a minimum value in carrier frequency deviations, sample values P1 to P9 are input like (a), a maximum value is updated like (d), a minimum value is updated like (e), and when a difference between the maximum value and the minimum value is less than a predetermined value, e.g. 1,500 Hz as shown in (f), correcting operation is stopped, and when the difference is the predetermined value and more, the correcting operation is performed as shown by P3 to P3' in (a). Correction is not performed by using near values in a multi-valued FSK signal and the correction is performed only when a real maximum value and a real minimum value are obtained, thereby a frequency deviation can be accurately detected and suitable offset removal can be performed. Long-time monitoring of signals is unnecessary, thereby quick correction can be achieved.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种FSK（频移键控）接收机，其中可能由于发射和接收频率偏差而产生的DC偏移分量的校正被适当且快速地应用于多值FSK 信号。解决方案：在载波频率偏差中从最大值和最小值之间的平均值（中心值）执行直流偏移校正时，采样值P1至P9如（a）输入，最大值被更新如（d）所示，最小值如（e）更新，并且当最大值和最小值之间的差小于预定值时，例如如（f）所示的1500Hz，停止校正动作，当该差为规定值以上时，如（a）中的P3〜P3'所示进行校正动作。通过使用多值FSK信号中的近值不进行校正，并且仅在获得实际最大值和实际最小值时执行校正，从而可以精确地检测频率偏差并且可以执行适当的偏移消除。信号的长时间监视是不必要的，从而可以实现快速校正。版权所有（C）2010，JPO＆INPIT

5. 发明专利

JP2013141101A Signal processing apparatus, signal processing method and program 有权
标题翻译：信号处理装置，信号处理方法和程序
公开(公告)号：JP2013141101A
公开(公告)日：2013-07-18
申请号：JP2011290176
申请日：2011-12-28
申请人： Icom Inc , アイコム株式会社
发明人： SHIBATA KAZUNORI
IPC分类号： H03G3/20 , H03G3/30 , H03M1/12
摘要： PROBLEM TO BE SOLVED: To prevent a deterioration in the sound quality of an audio signal.SOLUTION: A signal processing apparatus 1 includes: an analog amplifier 10 for amplifying an input analog audio signal; an ADC 20 for converting the audio signal output from the analog amplifier 10 to an output audio signal; an amplitude ratio calculation section 150 for acquiring the output audio signal at unit time intervals and determining a maximum amplitude of the output audio signal in the unit time; a subtraction section 160 for detecting a difference of a reference amplitude from the unit time maximum amplitude; a multiplication section 180 for determining a control value for controlling the gain of the analog amplifier 10 at unit time intervals on the basis of the difference; and an analog gain control circuit 210 for controlling the gain of the analog amplifier 10 according to the control value set by the multiplication section 180 to change the gain of the analog amplifier 10 at unit time intervals.
摘要翻译：要解决的问题：为了防止音频信号的声音质量恶化。解决方案：信号处理装置1包括：模拟放大器10，用于放大输入的模拟音频信号; 用于将从模拟放大器10输出的音频信号转换为输出音频信号的ADC20; 幅度比计算部分150，用于以单位时间间隔获取输出音频信号，并在单位时间内确定输出音频信号的最大幅度; 减法部160，用于从单位时间最大幅度检测基准振幅的差; 乘法部分180，用于基于差值确定用于以单位时间间隔控制模拟放大器10的增益的控制值; 以及模拟增益控制电路210，用于根据由乘法部180设定的控制值来控制模拟放大器10的增益，以单位时间间隔改变模拟放大器10的增益。

6. 发明专利

JP2010268396A Diversity reception device and diversity reception method 有权
标题翻译：多样性接收设备和多样性接收方法
公开(公告)号：JP2010268396A
公开(公告)日：2010-11-25
申请号：JP2009120204
申请日：2009-05-18
申请人： Icom Inc , Oki Electric Ind Co Ltd , アイコム株式会社 , 沖電気工業株式会社
发明人： SHIBATA KAZUNORI , TAKAHASHI YOSHIRO
IPC分类号： H04B7/08
摘要： PROBLEM TO BE SOLVED: To reduce the load of arithmetic processing on a DSP etc., and also to reduce a phase adjusting means in size and cost by adjusting phases of the reception signals when synthesis processing on a plurality of reception signals input from a plurality of antennas is performed. SOLUTION: An intensity-phase decision circuit 19 monitors signal intensities of a master signal and a slave signal, and when selection switching between the master signal and the slave signal is determined, the determined selection switching is suspended until a π/4-DQPSK demodulation block 22 which demodulates the master signal and the slave signal whose phases are corrected by phase shift circuits 13 and 14, reports the timing of a symbol decision point acquired on the basis of a preamble. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了减少DSP等上的算术处理的负担，并且还通过在对多个接收信号输入的合成处理时调整接收信号的相位来减小尺寸和成本的相位调整装置从多个天线执行。解决方案：强度相位判定电路19监视主信号和从信号的信号强度，并且当确定主信号和从信号之间的选择切换时，所确定的选择切换被暂停直到π/ 4 -DQPSK解调块22解调主相信号和相位由相移电路13和14校正的从属信号，报告基于前同步码获取的符号判定点的定时。版权所有（C）2011，JPO＆INPIT

7. 发明专利

JP2010268397A Transmission power controller and transmission power control method 有权
标题翻译：传动功率控制器和变速箱功率控制方法
公开(公告)号：JP2010268397A
公开(公告)日：2010-11-25
申请号：JP2009120205
申请日：2009-05-18
申请人： Icom Inc , Oki Electric Ind Co Ltd , アイコム株式会社 , 沖電気工業株式会社
发明人： SHIBATA KAZUNORI , TAKAHASHI YOSHIRO
IPC分类号： H04B1/04
摘要： PROBLEM TO BE SOLVED: To shorten a time up to stabilization of transmission power and to reduce a product in size and price.
SOLUTION: When a dummy signal is inserted into an I signal and a Q signal to perform up-sampling processing, and the I signal and the Q signal are subjected to orthogonal modulation to generate an output signal, a coupler 17 detects an output signal generated by an RF power amplifier circuit 15 to generate a feedback signal, which is subjected to orthogonal modulation to generate an I' signal in phase with the feedback signal and a Q' signal having an orthogonal phase. An I signal and a Q signal which are close to a symbol are extracted from the up-sampled I signal and Q signal, and an I' signal and a Q' signal which are close to the symbol are extracted from the I' signal and Q' signal. The electric power of the output signal is controlled according to intensity differences between signal intensities of the I signal and the Q signal which are close to the symbol, and signal intensities of the I' signal and the Q' signal which are close to the symbol.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：缩短传输功率稳定的时间，并缩小产品的尺寸和价格。解决方案：当将伪信号插入到I信号和Q信号中以进行上采样处理时，I信号和Q信号进行正交调制以产生输出信号，耦合器17检测由RF功率放大器电路15产生的输出信号，以产生反馈信号，该反馈信号经过正交调制以产生与反馈信号同相的I'信号和具有正交相位的Q'信号。从上采样的I信号和Q信号中提取接近符号的I信号和Q信号，从I'信号中提取接近符号的I'信号和Q信号， Q'信号。输出信号的功率根据接近符号的I信号和Q信号的信号强度之间的强度差来控制，并且接近符号的I'信号和Q'信号的信号强度。版权所有（C）2011，JPO＆INPIT

8. 发明专利

JP2010041140A Frame sync detecting circuit and fsk receiver using the same 有权
标题翻译：框架同步检测电路和使用相同的FSK接收器
公开(公告)号：JP2010041140A
公开(公告)日：2010-02-18
申请号：JP2008198885
申请日：2008-07-31
申请人： Icom Inc , アイコム株式会社
发明人： SHIBATA KAZUNORI
IPC分类号： H04L7/08 , H04L7/00 , H04L27/12
CPC分类号： H04L7/042 , H04L27/14
摘要： PROBLEM TO BE SOLVED: To quickly establish frame sync with high accuracy in a sync word pattern detecting circuit for detecting frame sync from a received word pattern. SOLUTION: Sequential moving average values shown by square marks are determined from the oversample values of a received word pattern indicated by a solid line in a given symbol period, and differences between the sequential moving average values and respective average values of a given sync word pattern in a given symbol interval are determined as DC offsets (frequency correction amounts) Δf. After subtracting the Δf from the received word pattern, correlation operation (convolution) with the sync word pattern is performed to determine correlation values designated by black circular dots. If one of the correlation values exceeds a threshold TH3, it is determined that a sync word candidate has been received, and then symbol values P11' to P20' of the received word pattern after the DC offset correction are compared with the symbol values of the sync word pattern. If all of symbol errors are within a given range, the sync word pattern detection is ultimately determined. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：在用于从接收到的字模式检测帧同步的同步字模式检测电路中快速建立高精度的帧同步。解决方案：由给定符号周期中由实线表示的接收字模式的过采样值确定平方标记所示的顺序移动平均值，以及顺序移动平均值与给定值的相应平均值之间的差异将给定符号间隔中的同步字模式确定为DC偏移（频率校正量）Δf。在从接收到的字模式中减去Δf之后，执行与同步字模式的相关运算（卷积），以确定由黑色圆点指定的相关值。如果相关值中的一个超过阈值TH3，则确定已经接收到同步字候选，然后将直流偏移校正之后的接收字模式的符号值P11'至P20'与符号值同步字模式如果所有符号错误都在给定范围内，则最终确定同步字模式检测。版权所有（C）2010，JPO＆INPIT

9. 发明专利

JP2010041139A Clock regeneration circuit and receiver using the same 有权
标题翻译：时钟再生电路和接收器
公开(公告)号：JP2010041139A
公开(公告)日：2010-02-18
申请号：JP2008198884
申请日：2008-07-31
申请人： Icom Inc , アイコム株式会社
发明人： SHIBATA KAZUNORI
IPC分类号： H04L27/14 , H04L7/00
CPC分类号： H04L27/14 , H04L7/0334 , H04L27/16
摘要： PROBLEM TO BE SOLVED: To obtain a stable symbol clock by a small operation amount even in a multi-valued FSK (Frequency Shift Keying) demodulated signal when sampling the FSK demodulated signal and regenerating demodulated data from an amplitude value of obtained symbol data. SOLUTION: A quadrature FSK demodulated signal is oversampled by a frequency higher than that of a symbol clock, difference values V1 to V3 from an ideal amplitude level obtained at a symbol point P with respect to the sample data of three points, i.e. a point T2 close to the symbol point P and preceding and succeeding points T1, T3 of the point T2, and the sampling timing of a self-advancing timer is moved to the measurement (sampling) point side of which the difference value is smaller out of the difference values V1, V3 of the preceding and succeeding points T1, T3 only by time corresponding to the difference value V2 of the point T2. Thereby, the shift of the sampling timing is gradually corrected in each oversampling timing at maximum and a stable symbol clock can be regenerated. Timing operation is allowed to execute only at the three points T1, T2, T3, thereby the operation amount can be reduced. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：即使在对FSK解调信号进行采样并且从获得的符号的振幅值再生解调数据时，即使在多值FSK（频移键控）解调信号中也能以小的运算量获得稳定的符号时钟数据。解决方案：正交FSK解调信号以比符号时钟更高的频率进行过采样，相对于三个点的采样数据，在符号点P获得的理想振幅电平的差值V1至V3，即点T2靠近符号点P和点T2的前后点T1，T3，并且自提前定时器的采样定时被移动到其差值较小的测量（采样点）侧只有前一个和后一个点T1，T3的差分值V1，V3只有与点T2的差值V2对应的时间。因此，在每个过采样定时最大化地逐渐校正采样定时的移位，并且可以再生稳定的符号时钟。只允许在三点T1，T2，T3执行定时操作，从而可以减少操作量。版权所有（C）2010，JPO＆INPIT

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