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1. 发明专利

JP2004303420A Device having nonvolatile memory 审中-公开
公开(公告)号：JP2004303420A
公开(公告)日：2004-10-28
申请号：JP2004222690
申请日：2004-07-30
申请人： Hitachi Ulsi Systems Co Ltd , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社日立超エル・エス・アイ・システムズ
发明人： SEKI KOICHI , WADA TAKESHI , MUTO TADASHI , KUBOTA YASURO , SHOJI KAZUYOSHI
IPC分类号： G11C16/02
摘要： PROBLEM TO BE SOLVED: To provide a device having a nonvolatile memory improved in operability. SOLUTION: The device is provided with a bus and a plurality of memories one of which is a nonvolatile memory, a processor and input output terminals. All of them are connected to the bus. The nonvolatile memory receives a plurality of control signals from the processor, executes erase and erase verify operations for the memory cells that are internally specified and automatically conducts erase operations when the erasing is insufficient. Having transmitted erasing signals to the nonvolatile memory, the processor conducts discrimination to determine whether the erasing mode is completed or not based on the information outputted to the bus from the nonvolatile memory. During the period, i.e., after the erase signals are transmitted to the nonvolatile memory and till the erasing mode is completed at the nonvolatile memory, accesses are made to the memories in order to input data from the external through the input output terminals. COPYRIGHT: (C)2005,JPO&NCIPI

2. 发明专利

JP2004134085A System, and device having nonvolatile memory 有权
公开(公告)号：JP2004134085A
公开(公告)日：2004-04-30
申请号：JP2004029156
申请日：2004-02-05
申请人： Hitachi Ulsi Systems Co Ltd , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社日立超エル・エス・アイ・システムズ
发明人： SEKI KOICHI , WADA TAKESHI , MUTO TADASHI , KUBOTA YASURO , SHOJI KAZUYOSHI
IPC分类号： G06F12/16 , G11C16/02
摘要： PROBLEM TO BE SOLVED: To provide a computer system which is easy to use. SOLUTION: A computer system is constituted of a nonvolatile semiconductor memory device having a writing mode in which information is written in a memory cell, a read-out mode in which information of the memory cell is read out, an erasing mode in which erasing operation applying voltage for keeping threshold voltage of the memory cell in a prescribed range and verifying operation reading out a state of the threshold voltage of the memory cell are performed, and a data polling mode function outputting a state of the verifying operation to the outside, and a processor. COPYRIGHT: (C)2004,JPO

3. 发明专利

JP2006048930A Nonvolatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：JP2006048930A
公开(公告)日：2006-02-16
申请号：JP2005310935
申请日：2005-10-26
申请人： Hitachi Ulsi Systems Co Ltd , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社日立超エル・エス・アイ・システムズ
发明人： SEKI KOICHI , WADA TAKESHI , MUTO TADASHI , KUBOTA YASURO , SHOJI KAZUYOSHI
IPC分类号： G11C16/02
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile memory device improved in operability. SOLUTION: The nonvolatile memory device has a nonvolatile memory array in which a plurality of nonvolatile memory cells are arranged in a array state, a voltage generating circuit, and an input/output terminal. The nonvolatile memory is divided into a plurality of blocks, a block of 1 can be selected in accordance with an inputted address signal out of the plurality of blocks in accordance with an address signal inputted from the outside. The voltage generating circuit can generate erasing voltage in erasing operation of data stored in the nonvolatile memory cell. A first state signal is outputted to the input/output terminal during a term in which erasing voltage is supplied to the nonvolatile memory cell existing in the selected block of 1 and erasing of data stored in the nonvolatile memory cell existing in the selected block of 1 is completed. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：解决的问题：提供可操作性提高的非易失性存储装置。解决方案：非易失性存储器件具有非易失性存储器阵列，其中多个非易失性存储单元被布置成阵列状态，电压产生电路和输入/输出端子。非易失性存储器被分成多个块，根据从外部输入的地址信号，可以根据多个块中的输入的地址信号来选择1的块。电压产生电路可以在存储在非易失性存储单元中的数据的擦除操作中产生擦除电压。在将擦除电压提供给存在于所选择的块1中的非易失性存储器单元并擦除存储在选定块1中的非易失性存储单元中的数据的项期间，将第一状态信号输出到输入/输出端子完成了。版权所有（C）2006，JPO＆NCIPI

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