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1. 发明专利

JP2003065669A Refrigerator 审中-公开
标题翻译：冰箱
公开(公告)号：JP2003065669A
公开(公告)日：2003-03-05
申请号：JP2001257145
申请日：2001-08-28
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： NAGUMO HIROBUMI , YAGETA YUTAKA , WATANABE HIDEAKI
IPC分类号： F25D23/08 , F25D23/02 , F25D23/06
CPC分类号： F25D2323/023
摘要： PROBLEM TO BE SOLVED: To provide a refrigerator having an enhanced heat insulation performance.
SOLUTION: The refrigerator has in the front face side of a storage chamber a door formed by filling a gap between an outer plate and an inner plate with a heat insulation material. The refrigerator is provided with a protruding member projected from a door-inside surface of the outer plate toward the door interior side and disposed at a position biased to either one of the side walls of the door, a passage provided on the side opposite to the side wall of the protruding member and directed to the above side wall side and an injection point provided in communication with the passage for injecting the heat insulation material.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：提供具有增强的隔热性能的冰箱。解决方案：冰箱在储存室的正面侧具有通过用绝热材料填充外板和内板之间的间隙而形成的门。冰箱设置有从外板的门内表面朝向门内侧突出的突出构件，并且设置在偏压到门的任一侧的位置处，设置在与该门内侧相反的一侧的通道突出构件的侧壁并且被引导到上述侧壁侧，以及与用于注入隔热材料的通道连通地设置的注入点。

2. 发明专利

JPH03240321A DISTURBING SIGNAL SUPPRESSION SYSTEM 失效
公开(公告)号：JPH03240321A
公开(公告)日：1991-10-25
申请号：JP3604190
申请日：1990-02-19
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： WATANABE HIDEAKI , YAMAMOTO KOICHI , KIMURA HIDEFUMI
IPC分类号： H04B1/10
摘要： PURPOSE:To realize the sufficient suppression of a disturbing signal only with the addition of a simple circuit by deviating the oscillating frequency of a local oscillator upward/downward when a reception electric field level is low to some degree and increasing the reception electric field level with the disturbing signal. CONSTITUTION:A reception signal fR is mixed with the local oscillation signal fLO of an output of a VCO at a frequency mixer 1 and inputted to an FM detector 3 as an IF signal fIF via a band pass filter 2. The level of the input signal fIF of the detector 3 is detected by a reception electric field level detection circuit 8 and a detection level is given to a control circuit 10. The circuit 10 uses a control signal C1 to deviate an output frequency fLO upward/downward of the VCO 4 and the circuit 8 detects the input level in this case. The level is compared with an input level before the fLO is deviated (that is, when a disturbing signal level is high), the circuit 10 outputs a control signal C2 to a C/N switching circuit 9 to select the C/N of the VCO 4. Thus, the disturbing signal is suppressed and the desired signal level is increased.

3. 发明专利

JPS62274917A PHASE SYNCHRONIZATION DETECTING CIRCUIT 失效
公开(公告)号：JPS62274917A
公开(公告)日：1987-11-28
申请号：JP11738386
申请日：1986-05-23
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： NAKAGAWA JUNICHI , KIMURA HIDEFUMI , KUWAMOTO YOSHITOMO , IENAKA MASANORI , WATANABE HIDEAKI
IPC分类号： H03K5/26 , G01R25/00 , H03L7/089 , H03L7/095
摘要： PURPOSE:To obtain a phase difference as a phase synchronizing signal for conversion to level by providing the first circuit, which generates the characteristic of an output pulse width to an input signal phase difference where there is a blind sector where the output pulse width is zero, and a sampling circuit which samples the comparison output of the first circuit and using the output of the sampling circuit as the phase synchronizing signal. CONSTITUTION:Assuming that the delay time of each logic circuit is equally tau, leading parts of negative pulses of signals UP and DW are cut away in a pulse width discriminating circuit 8 by a delay time T1=3tau of delay elements 10 and 11. That is, a negative pulse width TP of a signal L or M is given by TP=¦Ttheta¦+tau-T1 if the fall phase difference between signals R and V is defined as T0. In case of T1>=tau, the signal L or M is certainly in the low level as it is. In case of TP

4. 发明专利

JP2003185332A REFRIGERATOR DOOR AND METHOD OF MANUFACTURING THE SAME 审中-公开
公开(公告)号：JP2003185332A
公开(公告)日：2003-07-03
申请号：JP2001386909
申请日：2001-12-20
申请人： HITACHI LTD
发明人： SUGI KENKICHI , SUZUKI TAKESHI , WATANABE HIDEAKI , MATSUNAGA KUNIO , KOBAYASHI HIROYUKI
IPC分类号： F25D23/02 , F25D23/08
摘要： PROBLEM TO BE SOLVED: To provide a refrigerator door and a method of manufacturing the same capable of temporarily fixing a reinforcing metal without using a screw or a rivet. SOLUTION: In this refrigerator door having an outer plate, a door inner plate mounted on the outer plate, and a reinforcing metal mounted between the outer plate and the door inner plate for fixing a container receiving frame, the reinforcing metal is provided with a hole, the door inner plate is provided with a support stood on a face at an outer plate side, of the door inner plate, penetrated through the hole of the reinforcing metal, and having a maximum length of a top face longer than a diameter of the hole of the reinforcing metal, and the reinforcing metal is held by the door inner plate and the top face. COPYRIGHT: (C)2003,JPO

5. 发明专利

JP2000206276A MOBILE RADIO COMMUNICATION TERMINAL INCORPORATING ELECTRONIC WAVE CLOCK 失效
公开(公告)号：JP2000206276A
公开(公告)日：2000-07-28
申请号：JP257599
申请日：1999-01-08
申请人： HITACHI LTD , HITACHI VIDEO & INF SYST
发明人： KUROSAWA KAZUHITO , SOMA ATSURO , WATANABE HIDEAKI
IPC分类号： G04G5/00 , G04R20/00 , G04R20/08 , G04G7/02
摘要： PROBLEM TO BE SOLVED: To correct time and to provide accurate time by incorporating a receiver with a long-wave standard electronic wave in a mobile radio communication terminal and achieving the function of an electronic wave clock. SOLUTION: A long-wave standard electronic wave is received by an antenna 1 for long wave and a reception low-noise amplifier(LNA) 2 for long wave, and a reference marker in a standard signal being received by a reception pulse extraction circuit 3 is detected and is sent to a time generation circuit 4 and a time difference measurement circuit 5 as a pulse signal. On the other hand, a clock 7 being generated from an oscillator 12 by an incorporated crystal oscillator is counted by a built-in clock and is sent to the measurement circuit 5 via a time signal generation circuit 6 for measurement. The difference between time from the standard electronic wave being received and time from the built-in clock is measured and is sent to a correction signal generation circuit 7, and a correction signal corresponding to the time difference is sent to the built-in clock, thus correcting time. Accurate time is displayed on a display 11 as an electronic wave clock also at the mobile radio communication terminal by the loop control.

6. 发明专利

JPH0738221A HYBRID INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH0738221A
公开(公告)日：1995-02-07
申请号：JP18245893
申请日：1993-07-23
申请人： HITACHI LTD , HITACHI VIDEO & INF SYST
发明人： SUZUKI KAZUTOSHI , WATANABE HIDEAKI
IPC分类号： H01L23/12 , H01L23/50 , H05K1/14 , H05K1/18 , H05K3/34 , H05K3/36 , H05K3/40
摘要： PURPOSE:To prevent a loose state of solder in connection when a hybrid integrated circuit device is mounted on a mounting board. CONSTITUTION:In a hybrid integrated circuit device, a conductive pattern is formed on a dielectric-based board 1, and active and passive components are mounted with solder. The hybrid integrated circuit device is put in electric connection on a mounting board 7. In the board 1, a terminal electrode 3 is connected with a terminal electrode 2 through a through hole 4. When a terminal electrode 6 on the board 7 and the terminal electrode 3 on the connection side of the board 1 are joined with solder 5, the solder 5 goes upward through the through hole 4 and appears in sight at the terminal electrode 2 to be connected. In this way, a loose state of solder in connection between the hybrid integrated circuit device and a mounting board can be detected easily, and the loose state in an early manufacturing step can be prevented.

7. 发明专利

JPS63110818A PHASE LOCKED LOOP OSCILLATOR 失效
公开(公告)号：JPS63110818A
公开(公告)日：1988-05-16
申请号：JP25567386
申请日：1986-10-29
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： NAKAGAWA JUNICHI , KIMURA HIDEFUMI , WATANABE HIDEAKI
IPC分类号： H03L7/18
摘要： PURPOSE:To ruduce the fluctuation of an oscillation frequency arising the moment a power source is cut off by inserting an isolator between a voltage controlled oscillator constituting a phase locked loop oscillator and a frequency divider dividing the frequency of a clock signal from the oscillator. CONSTITUTION:An intermittent control signal inputted from a terminal 17 opens and closes a switch 9 through a drive circuit 11, whereby the supply of a voltage and current to a prescaler 6 from the power source 8 is disconnected. Since the bias point of an active element for a transistor constituting the prescaler 6 fluctuates due to the disconnection of a voltage and a current, the input impedance of the prescaler 6 changes. However, since the isolator 20 is inserted between terminals 21 and 22, a load impedance when the isolator side is viewed from the terminal 21 hardly changes. If the VCO 5 runs freely when the power source is intermittently disconnected, a change in an oscillation frequency, which is caused by the fluctuation of the load, is minimized, and the intention comes true.

8. 发明专利

JPS62213417A PHASE LOCKED OSCILLATOR 失效
公开(公告)号：JPS62213417A
公开(公告)日：1987-09-19
申请号：JP5480086
申请日：1986-03-14
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： NAKAGAWA JUNICHI , KUWAMOTO YOSHITOMO , KIMURA HIDEFUMI , WATANABE HIDEAKI , IENAKA MASANORI
IPC分类号： H03L7/18
摘要： PURPOSE:To decrease the frequency jump of a VCO by minimizing the first phase difference between two signals inputted to a phase comparator after reapplication of power supply in a phase locked oscillator in intermittent operation by the intermission of power supply. CONSTITUTION:A zero detection circuit 14 outputting a zero phase signal detecting that a phase difference between clocks inputted to a reference frequency divider 2 and a frequency divider 7 is nearly zero and a reset pulse generating circuit 15 applying initial set to the reference frequency divider 2 and the frequency divider 7 synchronously with the first zero phase signal after the appliciation of power, are added newly. In applying power again, the zero phase detection circuit 14 detects the zero phase between the clocks of a reference oscillator 1 and a VCO 5 and the reset pulse generating circuit 15 outputs a pulse. In this case, since the reference frequency divider 2 and the frequency divider 7 are set in initial state, the phases of the next frequency division carrier signal outputted from both the frequency dividers are made nearly coincident. Thus, an error signal outputted from a phase comparator 3 is decreased.

9. 发明专利

JPH06267146A RECORDING AND REPRODUCING DEVICE 失效
公开(公告)号：JPH06267146A
公开(公告)日：1994-09-22
申请号：JP5165693
申请日：1993-03-12
申请人： HITACHI LTD , HITACHI VIDEO & INF SYST
发明人： WATANABE HIDEAKI
IPC分类号： G11B15/02 , H04N5/76
摘要： PURPOSE:To make possible the use of a recording medium conformed to the user's will without necessitating a large scaled editing device by recording on the recording medium while changing the order irrespective of the recording time. CONSTITUTION:A reservation of the video recording inputted by the user is stored in a timer part 9. This information is sent to a control part 8 to fetch the time, the order, etc., of the recording. When the recording is made by changing the order, the position capable of recording with the present recording medium 1 is detected by a linear time counter part 7. The time of a succeeding recorded part is fast-forwarded by the linear time counter part 7 and a fast forwarding device 6 to move the recording position of the recording medium 1 to the starting position (2) of recording, then the recording is performed therefrom. When this recording is completed, the unwinding operation up to the starting position (1) of recording is made by the linear time counter part 7 and an unwinding device 5. By such an operation, the editing is easily performed.

10. 发明专利

JPH05344659A 失效
公开(公告)号：JPH05344659A
公开(公告)日：1993-12-24
申请号：JP15037992
申请日：1992-06-10
申请人： HITACHI LTD , HITACHI VIDEO & INF SYST
发明人： WATANABE HIDEAKI , KUWAMOTO YOSHITOMO
IPC分类号： H02J7/02 , H02J7/04
摘要： PURPOSE:To shorten an apparent charging time of a secondary battery and to eliminate user's consideration of a discharging period of the battery by discharging it at a certain special number of times without discharging the battery at every time. CONSTITUTION:The secondary battery charger with a discharge function comprises a secondary battery 1 to be charged and discharged, a charge/ discharge changeover switch 2, a discharging circuit 3, a charging circuit 4, and a charge/discharge switching controller 6. Particularly when the battery 1 is mounted in the charger, the number of times of this case is detected, and a discharging function is operated at a special number of times. In order to conduct this operation, a charging number detector 5 and a holding circuit 7 are newly provided in the charger. Thus, simple circuits 5, 7 are added to reduce a memory effect of the battery 1 without user's labor, and an available time of the battery 1 can be prolonged.

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