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    • 1. 发明专利
    • Semiconductor integrated circuit device and program debugging method
    • 半导体集成电路设备和程序调试方法
    • JP2011159192A
    • 2011-08-18
    • JP2010021930
    • 2010-02-03
    • Hitachi Ltd株式会社日立製作所
    • SAKIYAMA ATSUSHIISHIKAWA MAKOTOKONDO NOBUKAZU
    • G06F11/28
    • PROBLEM TO BE SOLVED: To achieve simplification of program debugging or cost reduction of program debugging.
      SOLUTION: A plurality of CPU blocks (CPUBK [0], CPUBK [1 ],..., CPUBK [n-1], CPUBK [n]) 500a having the same configuration is provided. CPUBK [0] and CPUBK [n-1] are operated in a program executing mode and CPUBK [1] and CPUBK [n] are operated in a debug executing mode, by a mode setting register (MREG) 210. The debug information from CPUBK [0] and CPUBK [n-1] is respectively output through a debug information storage device access controller (DIMAC) 220 and collected through DIMAC of CPUBK [1] and CPUBK [n]. DIMAC of CPUBK [1] and CPUBK [n] have a communication path associated with ring connection and can transmit/receive debug information from each other.
      COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:实现程序调试的简化或程序调试的成本降低。 解决方案:提供具有相同配置的多个CPU块(CPUBK [0],CPUBK [1],...,CPUBK [n-1],CPUBK [n])500a。 CPUBK [0]和CPUBK [n-1]在程序执行模式下运行,CPUBK [1]和CPUBK [n]通过模式设置寄存器(MREG)210在调试执行模式下运行。调试信息 CPUBK [0]和CPUBK [n-1]分别通过调试信息存储设备访问控制器(DIMAC)220输出,并通过CPUBK [1]和CPUBK [n]的DIMAC进行收集。 CPUBK [1]和CPUBK [n]的DIMAC具有与环形连接相关联的通信路径,并且可以彼此发送/接收调试信息。 版权所有(C)2011,JPO&INPIT