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1. 发明专利

JP2010027062A Distributed control system 审中-公开
标题翻译：分布式控制系统
公开(公告)号：JP2010027062A
公开(公告)日：2010-02-04
申请号：JP2009191718
申请日：2009-08-21
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KATO NAOKI , ARAKAWA FUMIO
IPC分类号： G06F9/50 , B60R16/02 , B60R16/023
摘要： PROBLEM TO BE SOLVED: To provide a load distribution system for making each control device efficiently operate after guaranteeing real time and achieving the improvement of fault tolerance after guaranteeing real time in a distributed control system in which a plurality of control devices are connected through a network. SOLUTION: A deadline being a requested time till a task end or information on a period when each task is started is attached to the task, and a control device for executing the task is selected in accordance with the deadline or a task period. A first control circuit, sensor and actuator are connected by a dedicated path that easily guarantees a high-speed response time, and in addition, another control circuit, sensor and actuator are connected through a network. When the first control circuit performs normal operation and when performance is sufficient, the first control circuit is used for control, and when the first control circuit fails or when the performance is not sufficient, the another control circuit is used. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种负载分配系统，用于在保证多个控制装置连接的分布式控制系统中保证实时之后保证实时并实现容错的提高，使每个控制装置有效地工作通过网络。解决方案：任务结束之前的请求时间的最后期限或每个任务开始的期间的信息被附加到任务上，并且根据截止日期或任务期间选择执行任务的控制装置。第一控制电路，传感器和致动器通过容易保证高速响应时间的专用路径连接，此外，另一控制电路，传感器和致动器通过网络连接。当第一控制电路执行正常操作并且当性能足够时，第一控制电路用于控制，并且当第一控制电路出现故障或性能不足时，使用另一控制电路。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2010038607A Detection apparatus and railway vehicle 审中-公开
标题翻译：检测装置和铁路车辆
公开(公告)号：JP2010038607A
公开(公告)日：2010-02-18
申请号：JP2008199398
申请日：2008-08-01
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： HYODO AKIHIKO , OBO SHIGERU , KATO NAOKI
IPC分类号： G01S13/91 , B60L15/40 , B66B3/02
CPC分类号： G01S13/88 , B61L25/025 , B61L25/026 , G01S7/412 , G01S13/04
摘要： PROBLEM TO BE SOLVED: To provide a technology which can detect the position information of a mobile unit at low cost. SOLUTION: The position information of a mobile unit such as a railway and an elevator cage is detected using a change in the reflection intensity of a radio wave. The detection apparatus includes: a radio transmitter SND for radiating a first radio wave; a position marker MK for generating specific reflection intensity and its temporal change pattern at each absolute position from the radiated first radio wave; a radio receiver RCV for receiving a second radio wave reflected by the position marker MK, converting it into a signal form for retrieving position information, and outputting it; and a marker recognition unit LCC for determining a position from the output of the radio receiver RCV. This allows reductions in facility cost and maintenance cost, high-precision position determination with resolution of 1 cm or less, and highly reliable position determination insensitive to the idling or sliding of a wheel. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供可以以低成本检测移动单元的位置信息的技术。解决方案：使用无线电波的反射强度的变化来检测诸如铁路和电梯轿厢的移动单元的位置信息。检测装置包括：用于发射第一无线电波的无线电发射机SND; 用于从辐射的第一无线电波产生每个绝对位置的特定反射强度及其时间变化图案的位置标记器MK; 用于接收由位置标记MK反射的第二无线电波的无线电接收机RCV，将其转换成用于检索位置信息的信号形式并将其输出; 以及用于从无线电接收机RCV的输出确定位置的标记识别单元LCC。这允许降低设备成本和维护成本，分辨率为1厘米或更小的高精度位置确定，以及对车轮空转或滑动不敏感的高度可靠的位置确定。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JP2009110353A Microcontroller and control system 审中-公开
标题翻译：微控制器和控制系统
公开(公告)号：JP2009110353A
公开(公告)日：2009-05-21
申请号：JP2007282959
申请日：2007-10-31
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KATO NAOKI , YAMADA TETSUYA , ARAKAWA FUMIO , YAMADA HIROMICHI , OBO SHIGERU , ISHIKAWA MAKOTO
IPC分类号： G06F7/76
CPC分类号： G06F9/30025 , G06F7/483 , G06F9/3001 , H03M7/24
摘要： PROBLEM TO BE SOLVED: To suppress an increase in code amount by a program code for performing floating-point arithmetic, especially by its variable, and to reduce a processing overhead for converting fixed-point data into floating-point data. SOLUTION: The microcontroller (1) has: a floating-point converter (32) for inputting integer data and corresponding decimal point position data as fixed-point data to a control system and converting the input data into floating-point data by obtaining a fraction part, an exponent part, and a sign of a floating type from the input data; and a floating-point arithmetic logic unit (38) for receiving the output of the floating-point converter and calculating the floating-point data. The floating-point converter acquires the exponent part by performing addition and subtraction of the decimal point position data (ESP2) and the shift amount of the fraction part to the integer data. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：通过用于执行浮点运算的程序代码，特别是通过其变量来抑制代码量的增加，并且减少用于将定点数据转换为浮点数据的处理开销。微控制器（1）具有：浮点转换器（32），用于将整数数据和对应的小数点位置数据作为定点数据输入到控制系统，并将输入数据转换为浮点数据从输入数据中获取浮动类型的分数部分，指数部分和符号; 以及用于接收浮点转换器的输出并计算浮点数据的浮点算术逻辑单元（38）。浮点转换器通过对小数点位置数据（ESP2）的加减运算和分数部分的移位量进行整数取得指数部分。版权所有（C）2009，JPO＆INPIT

4. 发明专利

JP2006134203A Distributed control system 有权
标题翻译：分布式控制系统
公开(公告)号：JP2006134203A
公开(公告)日：2006-05-25
申请号：JP2004324679
申请日：2004-11-09
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KATO NAOKI , ARAKAWA FUMIO
IPC分类号： G06F9/48 , G06F9/50 , G06F11/20 , G06F11/34
CPC分类号： G05B19/0421 , G05B2219/25229 , G05B2219/25231
摘要： PROBLEM TO BE SOLVED: To provide a load distributed system for efficiently driving each control unit in addition to ensuring real time and improving failure proof in addition to ensuring the real time, as a distributed control system in which a plurality of control units are connected. SOLUTION: Each task is given a deadline to be a request time until task completion or information on cycle at which the task is activated and, in accordance with the deadline or task cycle, a control unit for executing the task is selected. A first control circuit is connected to a sensor and actuator with a dedicated path in which a high-speed response time is easily ensured and another control circuit is connected to the sensor and actuator with a network. When the first control circuit is normally operated and has sufficient processing capability, the first control circuit is used for control, whereas it has a failure or insufficient processing capability, other control circuits are used. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：除了确保实时以外，除了确保实时以外，还提供一种用于有效地驱动每个控制单元的负载分布式系统，作为其中多个控制单元被连接。解决方案：每个任务都有一个截止期限，作为完成任务之前的请求时间或任务被激活的周期信息，并根据最后期限或任务周期选择用于执行任务的控制单元。第一控制电路连接到传感器和致动器，其具有容易确保高速响应时间的专用路径，并且另一控制电路通过网络连接到传感器和致动器。当第一控制电路正常工作并且具有足够的处理能力时，第一控制电路用于控制，而其具有故障或处理能力不足，则使用其它控制电路。版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP2004172627A Semiconductor integrated circuit device, memory medium memorizing cell library, and design method of semiconductor integrated circuit 审中-公开
标题翻译：半导体集成电路器件，存储器介质存储单元库，以及半导体集成电路的设计方法
公开(公告)号：JP2004172627A
公开(公告)日：2004-06-17
申请号：JP2003406751
申请日：2003-12-05
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KATO NAOKI , YANO KAZUO , AKITA YOHEI , HIRAKI MITSURU
IPC分类号： G06F17/50 , H01L21/82 , H01L21/822 , H01L27/04 , H03K19/094
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device where an increase of a power consumption caused from a leak current of MOSFETs and an operation speed are harmonized suitably in the semiconductor integrated circuit device composed of MOSFETs. SOLUTION: For a plurality of signal routes of the semiconductor integrated circuit device, a delay when signals are transmitted along the signal routes is considered. A route having room for delay consists of MOSFETs of a high threshold voltage, contrarily, a route having no room for delay consists of MOSFETs of a low threshold voltage whose leak current is large, however, its operation speed is quick. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种半导体集成电路器件，其中由MOSFET的漏电流引起的功率消耗的增加和操作速度在由MOSFET组成的半导体集成电路器件中适当地协调。解决方案：对于半导体集成电路器件的多个信号路径，考虑沿信号路径发送信号时的延迟。具有延迟余地的路由由高阈值电压的MOSFET组成，相反地，没有延迟空间的路由由泄漏电流大的阈值电压的MOSFET组成，但是其操作速度快。版权所有（C）2004，JPO

6. 发明专利

JP2014220708A 書類電子化方法および書類電子化システム有权
标题翻译：文件计算方法和文档计算系统
公开(公告)号：JP2014220708A
公开(公告)日：2014-11-20
申请号：JP2013099614
申请日：2013-05-09
申请人：瀬戸信用金庫 , Seto Shinkin Bank , 株式会社日立製作所 , Hitachi Ltd , 株式会社日立ソリューションズ , Hitachi Solutions Ltd
发明人： KATO NAOKI , MIZUNO YUSUKE , YAMASHITA ZEN , FUJII TAKAYUKI
IPC分类号： H04N1/00 , G06K7/00 , G06K19/06 , G06T1/00 , H04N1/04
CPC分类号： G06K19/00 , G06K7/00 , G06T1/00 , H04N1/00 , H04N1/04
摘要：【課題】種類が多岐にわたる書類を効率的かつ低コストに電子化し、その管理を容易なものとする。【解決手段】情報処理装置100が、書類1それぞれの識別情報、枚数情報、及び各書類1間の並び順情報を含む登録情報125を記憶装置101に格納し、登録情報125に基づいて、各種類の書類1の識別情報と枚数情報を書類間の並び順に従って列挙した印字データと、各種類の書類1の識別情報及びその枚数情報を示す二次元コード4とを生成し、それらの印字指示を印刷手段20に通知して電子化用の表紙2を印刷する処理を実行する。またスキャナ200が、表紙2に対する読み取りを実行して二次元コード4を認識し、二次元コード4が示す各種類の書類1の識別情報と枚数情報を取得する処理と、読み取りによって並び順で得た書類イメージデータ6を、二次元コード4から得ている枚数情報が示す枚数毎に電子ファイル化し、当該電子ファイル7に、該当枚数情報に対応する書類1の識別情報を付与して記憶装置201に格納する処理を実行する、【選択図】図1
摘要翻译：要解决的问题：以有效和低成本的方式对各种文件进行计算机化，从而容易地管理文件。解决方案：信息处理设备100存储在存储设备101中，包括每个文档1，页面的标识信息的注册信息125 计数信息和关于文件的安排顺序的信息1.根据注册信息125，信息处理设备100生成其中列举了每种类型的文档1的识别信息和页面计数信息的打印数据按照文件的布置顺序，以及指示每种文件的识别信息和页数信息的二维码4。信息处理装置100将打印数据和二维码的打印指令报告给打印装置20，并执行打印用于计算机化的前置页2的处理。扫描器200执行前页2的读取，识别二维码4，并执行用于获取由二维码4指示的种类的文档1的识别信息和页面计数信息的处理以及用于制作以通过读取的排列顺序获得的文件图像数据6被写入由从二维码4获得的页面计数信息指示的每个页数的电子文件中，赋予与页面对应的文档1的标识信息向电子文件7计数信息，并将电子文件7存储在存储装置201中。

7. 发明专利

JP2008193102A Semiconductor integrated circuit device, storage medium storing cell library, and method for designing semiconductor integrated circuit 有权
标题翻译：半导体集成电路器件，存储介质存储单元库，以及设计半导体集成电路的方法
公开(公告)号：JP2008193102A
公开(公告)日：2008-08-21
申请号：JP2008031324
申请日：2008-02-13
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KATO NAOKI , YANO KAZUO , AKITA YOHEI , HIRAKI MITSURU
IPC分类号： H01L21/822 , G06F17/50 , H01L21/82 , H01L27/04 , H03K19/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device which suitably harmonizes the increase in power consumption by leakage current of MOSFETs and the working speed in the semiconductor integrated circuit device constituted by the MOSFETs.
SOLUTION: On a plurality of signal paths in the semiconductor integrated circuit device, in view of the delay such that signals are transmitted along the signal paths, a path having a margin in the delay is constituted with a MOSFET with high threshold voltage, on the other hand, a path not having the margin in the delay is constituted with a MOSFET with low threshold voltage which has a high working speed with large leakage current.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体集成电路器件，其适当地协调MOSFET的漏电流的功耗增加和由MOSFET构成的半导体集成电路器件中的工作速度。解决方案：在半导体集成电路器件的多个信号通路上，考虑到信号沿着信号路径发送的延迟，具有高阈值电压的MOSFET具有延迟裕度的路径另一方面，不具有延迟裕度的路径由具有低阈值电压的MOSFET构成，具有高工作速度和大的漏电流。版权所有（C）2008，JPO＆INPIT

8. 发明专利

JP2004152039A Method for designing logic circuit and cad program 有权
公开(公告)号：JP2004152039A
公开(公告)日：2004-05-27
申请号：JP2002316981
申请日：2002-10-31
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KATO NAOKI , YANO KAZUO
IPC分类号： G06F17/50 , G09C1/00 , H04L9/08
CPC分类号： G06F17/5045 , G06F2217/78
摘要： PROBLEM TO BE SOLVED: To inexpensively provide a logic circuit designing method and a CAD program for allowing a user to design a logic circuit having his desired performance in a short period of time by suppressing the increase of a logic design period for achieving a circuit area, operating speed, and power consumption being target specifications.
SOLUTION: A logic synthesis CAD program having high performance is made available free only at the time of confirming the circuit characteristics of the synthetic result, and the fee of the CAD program is collected at the time of using a gate level logic circuit according to the satisfaction level of the circuit characteristic result so that the logic circuit can be designed in a short period of time at low costs. Thus, it is possible for a user to inexpensively acquire his desired logic circuit in a design phase for inputting the logic circuit in a register transfer level or an operation level, and synthesizing it with the gate level logic circuit.
COPYRIGHT: (C)2004,JPO

9. 发明专利

JP2007034359A Distributed control system 审中-公开
标题翻译：分布式控制系统
公开(公告)号：JP2007034359A
公开(公告)日：2007-02-08
申请号：JP2005212238
申请日：2005-07-22
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： HYODO AKIHIKO , KATO NAOKI , ARAKAWA FUMIO
IPC分类号： G06F9/50 , G06F9/48
CPC分类号： G05B19/042 , B60W2050/0297 , G05B2219/25229 , G05B2219/2637 , G06F9/4856 , G06F9/5033 , G06F9/5044
摘要： PROBLEM TO BE SOLVED: To provide a distributed control system in which a plurality of controllers are connected to one another by a network and which is capable of transferring tasks, for execution on other controllers, with properties specific for the controllers, where input and output processes are required or data stored in specific controllers are used.
SOLUTION: To execute the transfer tasks specific for the controllers for execution on the other controllers, the transferring controller is provided with functions of collecting input data and context information in a storage area and transferring them to a destination controller, in addition to its original functions. The destination controller is provided with, functions of storing the data sent from the transferring controller in the storage area, performing computations, and returns the results to the transferring controller. The program of the task performing computation processes is included in both the destination controller and the transferring controller, and the destination controller determines a reference address using an appropriate method for processing the task.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种分布式控制系统，其中多个控制器通过网络彼此连接，并且能够以特定于控制器的特性在其他控制器上传送任务以执行任务，其中需要输入和输出过程或使用存储在特定控制器中的数据。
解决方案：为了执行特定于控制器在其他控制器上执行的传输任务，转移控制器具有在存储区域中收集输入数据和上下文信息并将其传送到目的地控制器的功能，其原有功能。目的地控制器设置有将从传送控制器发送的数据存储在存储区域中的功能，执行计算，并将结果返回给传送控制器。执行计算处理的任务的程序包括在目的地控制器和传送控制器中，并且目的地控制器使用用于处理该任务的适当方法来确定参考地址。版权所有（C）2007，JPO＆INPIT

10. 发明专利

JP2003168960A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 审中-公开
公开(公告)号：JP2003168960A
公开(公告)日：2003-06-13
申请号：JP2001368079
申请日：2001-12-03
申请人： HITACHI LTD
发明人： KATO NAOKI
IPC分类号： H01L21/822 , H01L21/8234 , H01L27/04 , H01L27/088 , H03K3/037 , H03K3/356
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device constituted by an MOS transistor, in which the harmony is established between the increase in a leak current of the MOS transistor and an operational speed. SOLUTION: Threshold voltages of MOS transistors i11 and p11 are set at a low threshold voltage, the transistors constituting a logic gate on a path for steps of inputting through outputting a data signal in a clock-synchronous flip-flop or a latch circuit for inputting a clock signal CK and a data signal D. A threshold voltage or a MOS transistor is set at a high threshold voltage, the transistor constituting gates i15 and tg11 on an path except for the input/ output path. COPYRIGHT: (C)2003,JPO

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