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1. 发明专利

JP2009265682A Display device, pdp display device, and its driving circuit 审中-公开
标题翻译：显示装置，PDP显示装置及其驱动电路
公开(公告)号：JP2009265682A
公开(公告)日：2009-11-12
申请号：JP2009153194
申请日：2009-06-29
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： OSAWA MICHITAKA , OHIRA HIROSHI , MORI MUTSUHIRO , OTAKA SHIGEO , ISHIZAKA KATSUO
IPC分类号： G09G3/20 , G09G3/288 , G09G3/291 , G09G3/296
摘要： PROBLEM TO BE SOLVED: To provide a driving method that reduces voltage drop at the time of conduction and exhibits an excellent current interruption capability.
SOLUTION: Current characteristics of an AC-type driving, in which a charge current is stopped independently of an applied voltage even though a voltage is applied, and a speed-up means for IGBT are used. Specifically, the IGBT is used as an output element for a driving circuit of a panel, wherein the IGBT is provided with the speed-up means. For example, although a PDP sustain circuit requires a high element breakdown voltage, because the IGBT can reduce the voltage drop at the time of conduction with little dependence of the element breakdown voltage, the defect of the IGBT can be compensated by combining the sustain circuit with the AC-type PDP.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种降低导通时的电压降的驱动方法，具有优异的电流中断能力。解决方案：使用即使施加电压而与施加的电压无关的充电电流也停止的AC型驱动的电流特性，以及IGBT的加速装置。具体地，IGBT用作面板的驱动电路的输出元件，其中IGBT设置有加速装置。例如，尽管PDP维持电路需要高的元件击穿电压，但是由于IGBT可以在导通时减小元件击穿电压几乎不依赖的电压降，因此可以通过组合维持电路来补偿IGBT的缺陷与AC型PDP。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2010092056A Pdp display device 审中-公开
标题翻译： PDP显示设备
公开(公告)号：JP2010092056A
公开(公告)日：2010-04-22
申请号：JP2009236800
申请日：2009-10-14
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： OSAWA MICHITAKA , OHIRA HIROSHI , MORI MUTSUHIRO , OTAKA SHIGEO , ISHIZAKA KATSUO
IPC分类号： G09G3/20 , G09G3/288 , G09G3/291 , G09G3/294 , G09G3/296 , H01L21/336 , H01L21/8234 , H01L27/04 , H01L27/088 , H01L29/739 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide drive technology with small voltage drop in a conductive state and satisfactory current interrupting characteristics.
SOLUTION: In a PDP (Plasma Display Panel) display device, a high-speed IGBT for sustain circuit is used as an output power element. An influence of a tail current, which is an original defect of the element, is reduced by combining an AC type PDP 15 having voltage and current characteristics in which a discharge current is interrupted independently of applied voltage even if the voltage is applied.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供具有导通状态的小电压降的驱动技术和令人满意的电流中断特性。解决方案：在PDP（等离子体显示面板）显示装置中，使用用于维持电路的高速IGBT作为输出功率元件。即使施加电压，组合具有电压和电流特性的AC型PDP 15也可以减小作为元件的原始缺陷的尾电流的影响，其中放电电流被独立于施加的电压中断。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JPH03259537A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH03259537A
公开(公告)日：1991-11-19
申请号：JP5639890
申请日：1990-03-09
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： TSUNODA HIDEKI , YOSHIDA ISAO , GOSHIMA HIDEKAZU , OTAKA SHIGEO , ISHIZAKA KATSUO , KASHU NOBUYOSHI
IPC分类号： H01L21/322 , H01L21/336 , H01L29/32 , H01L29/78
摘要： PURPOSE:To suppress other characteristic deterioration to a minimum limit, to improve switching speed and to increase breakdown strength by forming a crystal defect layer due to an ion implantation near a base region, and introducing a life time killer to a power MOSFET. CONSTITUTION:A p-type diffused region 103 is formed on an n-type high concentration substrate 101 having a drain electrode 109 and a base region 102 of an n-type low concentration region, and an n-type high concentration diffused region 104, etc., to become a source region is formed by high concentration ion implantation with dopant as carbon, thereby forming a power MOSFET. A crystal defect layer 110 is formed near the region 102 by the predetermined ion implantation, a life time killer is introduced to the MOSFET by the layer 110 to suppress the deterioration of other characteristic to a minimum limit, the reverse recovery time of a flywheel diode is shortened, and switching speed, breakdown strength are enhanced.

4. 发明专利

JPH043980A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH043980A
公开(公告)日：1992-01-08
申请号：JP10490790
申请日：1990-04-20
申请人： HITACHI LTD
发明人： ISHIZAKA KATSUO , IIJIMA TETSUO , OTAKA SHIGEO
IPC分类号： H01L29/417 , H01L29/423 , H01L29/78 , H01L29/784
摘要： PURPOSE:To improve frequency characteristic of a transistor and to further improve integration by connecting the gate electrode of an insulated gate type field effect transistor to a first outer terminal via a first metal wiring having small specific resistance value and connecting a source region to a second outer terminal via a second metal wiring formed on a conductive layer having smaller specific resistance value than that of the gate electrode and different from the first wiring. CONSTITUTION:A metal wiring 8G is formed on an upper conductive layer than a gate electrode 6 of an insulated gate field type field effect transistors Q, a metal wiring 10S is formed on an upper conductive layer than the wiring 8G, and the wiring 8G is formed of thinner film thickness than that of the wiring 10S. With the structure, the processing accuracy of the wiring 8G is enhanced and since the processing accuracy of the electrode 6 of the transistor Q is enhanced correspondingly, the occupying area of the transistor Q is reduced, and the integration of a semiconductor device of a single structure can be improved.

5. 发明专利

JPH0669512A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0669512A
公开(公告)日：1994-03-11
申请号：JP22124692
申请日：1992-08-20
申请人： HITACHI LTD , HITACHI TOBU SEMICONDUCTOR LTD
发明人： AMANO TOMOAKI , IIJIMA TETSUO , ISHIZAKA KATSUO , OTAKA SHIGEO
IPC分类号： H01L29/78 , H01L29/784
摘要： PURPOSE:To increase the bonding width of a diode element for gate protection without increasing the external size of a semiconductor substrate (a semiconductor chip) and to enhance a protective effect in a semiconductor device wherein a vertical-type MISFET (a power transistor) and the diode element, for gate protection, connected to a gate electrode for the vertical-type MISFET are provided. CONSTITUTION:A semiconductor device is provided with a vertical-type MISFET and with a diode element, for gate protection, connected to a gate electrode for the vertical MISFET. In the semiconductor device, the diode element for gate protection is formed on the gate electrode 4 for the vertical-type MISFET by interposing an interlayer insulating film 7.

6. 发明专利

JPH0629538A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0629538A
公开(公告)日：1994-02-04
申请号：JP18064292
申请日：1992-07-08
申请人： HITACHI LTD
发明人： IIJIMA TETSUO , ISHIZAKA KATSUO
IPC分类号： H01L29/78 , H01L29/06 , H01L29/784
摘要： PURPOSE:To suppress increase in the peripheral region of a semiconductor substrate (semiconductor chip) by contriving to arrange gate wiring layout. CONSTITUTION:A vertical MISFET with a semiconductor substrate as a drain region is laid out on the main surface of a center region 20 of the semiconductor substrate (a semiconductor chip 1), a second conductive type semiconductor region is laid out along the peripheral region on the main surface of a peripheral region 21 surrounding the perimeter of the center region 20 of the semiconductor substrate, and a first contact part 9b where a gate wiring 10B is connected to a gate electrode 6 of the vertical MISFET and a second contact part 9c where a wiring 10c with the same potential as a source wiring 10A which is connected to the source region of the MISFET is connected to the second conductive type semiconductor region are laid out on the peripheral region 21 of the semiconductor substrate. In this semiconductor device, the first contact part 9b and the second contact part 9c are laid out alternately in the direction of extension of the gate wiring 10B.

7. 发明专利

JPH04111324A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH04111324A
公开(公告)日：1992-04-13
申请号：JP22931090
申请日：1990-08-30
申请人： HITACHI LTD
发明人： ISHIZAKA KATSUO , OTAKA SHIGEO , IIJIMA TETSUO
IPC分类号： H01L29/78 , H01L21/336
摘要： PURPOSE:To prevent peeling of upper layer interconnection become of accumulation of gas in a boundary region between organic interlayer insulating film and the interconnection by externally discharging gas such as moisture, air, etc., absorbed by the insulating film produced in a heat treating process to be conducted after the-interconnection is deposited through a plurality of through holes formed in the interconnection. CONSTITUTION:In a single structure semiconductor device 20, gate electrode 6 and source region of an insulated gate type field effect transistor Q are respectively connected to external terminals 10GP, 10SP through a lower layer metal interconnection 8G electrically isolated by organic interlayer insulating film 9 and an upper layer metal interconnection 10S covering substantially the entire active region, thereby forming a plurality of through holes 10H in the interconnection 10S. Thus, in a heat treating process executed after the interconnection 10S is deposited, gas absorbed by the film 9 is externally discharged through the holes 10H of the interconnection 10S, and hence peeling of the interconnection 10S is prevented, and the external appearance defect of the device 20 of a unit structure can be reduced.

8. 发明专利

JP2000330514A DISPLAY DEVICE, PDP DISPLAY DEVICE, AND ITS DRIVING CIRCUIT 失效
公开(公告)号：JP2000330514A
公开(公告)日：2000-11-30
申请号：JP13968999
申请日：1999-05-20
申请人： HITACHI LTD
发明人： OSAWA MICHITAKA , OHIRA HIROSHI , MORI MUTSUHIRO , OTAKA SHIGEO , ISHIZAKA KATSUO
IPC分类号： G09G3/288 , G09G3/20 , G09G3/291 , G09G3/294 , G09G3/296 , G09G3/298
摘要： PROBLEM TO BE SOLVED: To improve a switching characteristic by lightening the burn of a drive circuit of an output element and to reduce voltage drop at the time of conduction by using IGBT in which fast speed operation is performed as an output element of a driving circuit of a panel. SOLUTION: IGBT is used for output elements 11a, 11b. IGBT is used for also switching elements 12a, 12b for recovering electric power. IGBT has a bad current cut off characteristic and especially a tail current appears remarkably, but defect of IGBT can be compensated by combining increase of operation speed of a current cut off characteristic of IGBT and Ac type PDP in which a charge current is stopped independently of that sustaining voltage is applied to an electrode. Thereby, as for voltage drop, further improvement can be performed by using IGBT of which voltage drop is small as an element (as compared with a power MOS FET of the same chip size) when a current is made to flow as output elements 11a, 11b.

9. 发明专利

JPH07321307A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH07321307A
公开(公告)日：1995-12-08
申请号：JP10684494
申请日：1994-05-20
申请人： HITACHI LTD
发明人： IIJIMA TETSUO , ISHIZAKA KATSUO , OTAKA SHIGEO
IPC分类号： H01L27/06 , H01L29/78
摘要： PURPOSE:To prevent the operating characteristics of a transistor from being lost and to set diode reverse breakdown voltage freely when forming a diode for protecting elements from the surge from a drain between the gate and the drain in MOS transistor structure. CONSTITUTION:A diode 5 for mutually connecting a gate and a drain is formed between the gate and the drain of a power MOS transistor 1. The diode 5 is formed by introducing p-type and n-type impurities into a polysilicon layer 14 formed via an oxide layer 13b on a semiconductor substrate 11. Since impurity diffusion layers 14a-14c constituting the diode 5 and diffusion layers 11b and 11d at a substrate side for constituting the transistor 1 are insulated by the insulation film 13b, thus preventing a parasitic thyristor from being generated between these. Also, since an impurity is introduced in a different manufacturing process from the transistor 1, the degree of design freedom increases and the inverse breakdown voltage of the diode can be set freely.

10. 发明专利

JPH05166984A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH05166984A
公开(公告)日：1993-07-02
申请号：JP33168791
申请日：1991-12-16
申请人： HITACHI LTD , HITACHI TOBU SEMICONDUCTOR LTD
发明人： SUDA MINORU , IIJIMA TETSUO , HAGIWARA YOSHIMI , ISHIZAKA KATSUO , AMANO TOMOAKI
IPC分类号： H01L23/48 , H01L29/78
摘要： PURPOSE:To enable a power MOSFET to be lessened in ON-state resistance by a method wherein at least one of leads is made to extend to the electrode of the element, and the tip of the lead is directly connected to the electrode. CONSTITUTION:A pellet 2 on whose rear side adhesive agent such as solder 11 or the like is applied is mounted on a metal header before the surface electrode of the pellet 2 is connected to a lead 8. The extension tip of the source lead-out lead 8 is aligned with an electrode 10. Electrically conductive adhesive agent such as solder pellet 11 is applied onto a contact area between the lead 8 and the electrode 10. Thereafter, the pellet 2 is made to pass through a reflow oven, whereby the pellet 2 is soldered to the header and the source lead 8 is bonded to the pellet 2. By this setup, the pellet 2 can be reduced in resistance by electrode resistance whose main component is wire resistance, so that the pellet 2 low in ON-state resistance can be obtained.

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