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1. 发明专利

JP2013074261A Wiring board and manufacturing method of the same 有权
标题翻译：接线板及其制造方法
公开(公告)号：JP2013074261A
公开(公告)日：2013-04-22
申请号：JP2011214438
申请日：2011-09-29
申请人： Hitachi Chemical Co Ltd , 日立化成株式会社
发明人： SUGIBAYASHI MANABU , TAMURA TADASHI , SUZUKI KUNIJI , WAKABAYASHI AKIHIKO
IPC分类号： H05K3/42 , H05K1/02 , H05K1/11
摘要： PROBLEM TO BE SOLVED: To provide a wiring board and a manufacturing method of the same, capable of suppressing void formation into a filled via plating of a through-hole and aiming at reducing man-hour and securing reliability owing to filled via plating surfaces of front and back surfaces on the through-hole being flat.SOLUTION: The wiring board includes a through-hole having a cross-sectional shape of a tapered shape in which a pore diameter decreases towards an inside from both sides of front and back surfaces of a substrate. An inner wall in a depth direction central part of the through-hole is roughly perpendicular to the front and back surfaces of the substrate. The manufacturing method of the same is also provided.
摘要翻译：要解决的问题：为了提供一种布线板及其制造方法，能够抑制通孔的填充通孔中的空隙形成，并且旨在减少工时和确保由于填充通孔的可靠性通孔上正面和背面的电镀表面平坦。解决方案：布线板包括具有锥形形状的截面形状的通孔，其中孔径从衬底的前表面和后表面的两侧向内侧减小。通孔的深度方向中心部分的内壁大致垂直于基板的前表面和后表面。还提供了其制造方法。版权所有（C）2013，JPO＆INPIT

2. 发明专利

JP2014082489A Manufacturing method for multilayer wiring board 有权
标题翻译：多层布线板的制造方法
公开(公告)号：JP2014082489A
公开(公告)日：2014-05-08
申请号：JP2013204115
申请日：2013-09-30
申请人： Hitachi Chemical Co Ltd , 日立化成株式会社
发明人： SUGIBAYASHI MANABU , TAMURA TADASHI , WAKABAYASHI AKIHIKO , SUZUKI KUNIJI , ISODA SATOSHI
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a high density multilayer wiring board capable of reducing production man-hours and lead time.SOLUTION: A method for manufacturing a multilayer wiring board comprises: a step (A) for forming a core substrate on which an interlayer connection between wiring layers formed on both surfaces of an insulation layer via a through hole connecting their wiring layers, is formed thereon; a step (B) for overlaying the insulation layer and a metal foil on wiring layers formed on a lower layer side and an upper layer side of the core substrate respectively to stack them on a separation layer capable of physically separating layers; a step (C) for being multilayered the upper layer side of the core substrate by the build-up method to form a wiring layer having two or more layers, and for stacking the insulation layer and the metal foil; a step (D) for separating the multilayer wiring board by the separation layer; and a step (E) for forming a circuit on metal foils on both surfaces after insulation, and for forming the wiring layer.
摘要翻译：要解决的问题：提供能够降低生产工时和交货时间的高密度多层布线板。解决方案：一种多层布线板的制造方法，包括：形成芯基板的工序（A），其中夹层形成在绝缘层的两面上的配线层之间的连接通过连接其布线层的通孔而形成在其上; 分别在形成在芯基板的下层侧和上层侧的布线层上分别覆盖绝缘层和金属箔的工序（B），将其堆叠在能够物理分离层的分离层上; 通过聚集方法将芯基板的上层侧多层化以形成具有两层或多层的布线层，并堆叠绝缘层和金属箔的步骤（C）; 用于通过分离层分离多层布线板的步骤（D）; 以及用于在绝缘之后在两个表面上的金属箔上形成电路并形成布线层的步骤（E）。

3. 发明专利

JP2014072326A Semiconductor element mounting package substrate and manufacturing method therefor 审中-公开
标题翻译：半导体元件安装封装基板及其制造方法
公开(公告)号：JP2014072326A
公开(公告)日：2014-04-21
申请号：JP2012216537
申请日：2012-09-28
申请人： Hitachi Chemical Co Ltd , 日立化成株式会社
发明人： TAMURA TADASHI , SUGIBAYASHI MANABU , ISODA SATOSHI , SUZUKI KUNIJI
IPC分类号： H01L23/12 , H05K1/02 , H05K3/46
CPC分类号： H01L2224/48091 , H01L2224/48227 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor element mounting package capable of enhancing the yield by suppressing adhesion of resin powder, capable of forming a fine and adhesive outer layer circuit having a surface flat for an insulating layer, by forming an embedded circuit not causing undercut, capable of forming various metal configurations such as bumps and metal posts by a three-dimensional circuit, and capable of forming a solder resist, and to provide a manufacturing method therefor.SOLUTION: A semiconductor element mounting package comprises: an insulating circuit; a circuit embedded in the surface of the insulating circuit; and a metal post arranged on the embedded circuit. The metal post has the embedded circuit, electroless plating and electroplating, in this order. A manufacturing method therefor is also provided.
摘要翻译：要解决的问题：提供一种半导体元件安装封装，其能够通过抑制树脂粉末的粘附性而提高成品率，该树脂粉末能够形成具有表面平坦的绝缘层的细小的粘合的外层电路，通过形成不引起底切，能够通过三维电路形成各种金属构造如凸块和金属柱，并且能够形成阻焊剂，并提供其制造方法。解决方案：半导体元件安装封装包括：绝缘电路; 埋入绝缘电路表面的电路; 以及设置在嵌入式电路上的金属柱。该金属柱具有嵌入式电路，无电解电镀和电镀，按此顺序。还提供了一种制造方法。

4. 发明专利

JP2015060912A 半導体素子搭載用パッケージ基板有权
标题翻译：用于安装半导体元件的封装基板
公开(公告)号：JP2015060912A
公开(公告)日：2015-03-30
申请号：JP2013192925
申请日：2013-09-18
申请人：日立化成株式会社 , Hitachi Chemical Co Ltd
发明人： TAMURA TADASHI , SUGIBAYASHI MANABU , ISODA SATOSHI , ISHIKAWA KAZUMITSU
IPC分类号： H01L23/12 , H05K3/46
摘要：【課題】高密度実装性や信頼性を確保しつつ、キャビティ構造によって汎用性を実現可能な半導体素子搭載用パッケージ基板を提供する。【解決手段】絶縁層表面の導体回路上に凸状に配置されるカッパーポストを有するベース基板と、前記カッパーポストを収容する貫通孔及び前記ベース基板上にキャビティ部を形成する開口を有するキャビティ基板と、前記ベース基板とキャビティ基板との間に配置される接着剤と、を備え、前記カッパーポストとこれを収容する前記貫通孔の内壁との間に、前記接着剤が配置される半導体素子搭載用パッケージ基板。【選択図】図1
摘要翻译：要解决的问题：提供一种用于安装半导体元件的封装基板，其可以通过腔结构实现多功能性，同时确保高密度可封装性和可靠性。解决方案：用于安装半导体元件的封装基板包括：具有铜柱的基底以突出方式布置在绝缘层表面的导体电路上; 空腔基板，具有用于容纳铜柱的通孔和用于在基底基板上形成空腔部分的开口; 以及布置在基底基板和空腔基板之间的粘合剂，其中粘合剂布置在铜柱和用于容纳铜柱的通孔的内壁之间。

5. 发明专利

JP2014082490A Multilayer wiring board 审中-公开
标题翻译：多层接线板
公开(公告)号：JP2014082490A
公开(公告)日：2014-05-08
申请号：JP2013204116
申请日：2013-09-30
申请人： Hitachi Chemical Co Ltd , 日立化成株式会社
发明人： SUGIBAYASHI MANABU , TAMURA TADASHI , WAKABAYASHI AKIHIKO , SUZUKI KUNIJI , ISODA SATOSHI
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a high density multilayer wiring board capable of reducing production man-hours and lead time.SOLUTION: A multilayer wiring board comprises: a core substrate (3) on which an interlayer connection (8) between wiring layers L5, L6(2) formed on both surfaces of an insulation layer via a through hole connecting their wiring layers L5, L6(2), is formed thereon; an insulation layer (4) and wiring layers L4, L7(2) formed on wiring layers L5, L6(2) on a lower layer side and an upper layer side of the core substrate (3), respectively; and interlayer connections (10) arranged on an upper and lower of the interlayer connection (8) of the core substrate (3), and formed by a non-through hole reaching on the interlayer connection (8) formed by a through hole passing from the wiring layer (2) to the insulation layer (4). The interlayer connection (10) formed by the non-through hole has a tapered shape in which a diameter decreases towards the interlayer connection (8) formed by the through hole of the core substrate (3) from wiring layers L4, L7(2).
摘要翻译：要解决的问题：提供一种能够降低生产工时和交货期的高密度多层布线板。解决方案：多层布线板包括：芯基板（3），布线层L5之间的层间连接（8）通过连接其布线层L5，L6（2）的通孔形成在绝缘层的两个表面上的L6（2）; 分别形成在芯基板（3）的下层侧和上层侧的布线层L5，L6（2）上的绝缘层（4）和布线层L4，L7（2）以及布置在所述芯基板（3）的所述层间连接（8）的上下的层间连接（10），并且由到达所述层间连接（8）的非贯通孔形成，所述非贯通孔由通孔布线层（2）到绝缘层（4）。由非贯通孔形成的层间连接部（10）具有锥形形状，其中，直径朝向由布线层L4，L7（2）的芯基板（3）的通孔形成的层间连接（8）减小，。

6. 发明专利

JP2013074262A Wiring board and manufacturing method of the same 有权
标题翻译：接线板及其制造方法
公开(公告)号：JP2013074262A
公开(公告)日：2013-04-22
申请号：JP2011214439
申请日：2011-09-29
申请人： Hitachi Chemical Co Ltd , 日立化成株式会社
发明人： TAMURA TADASHI , SUGIBAYASHI MANABU , SUZUKI KUNIJI
IPC分类号： H05K1/02 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a wiring board and a manufacturing method of the same, capable of suppressing void formation into a filled via plating of a through-hole and aiming at reducing man-hour and securing reliability owing to filled via plating surfaces of front and back surfaces on the through-hole being flat.SOLUTION: The wiring board includes: an inner layer substrate having an inner layer conductor and an IVH provided with a through hole plating layer; a laminate substrate having a surface layer conductor and an insulating resin, laminated on both front and back sides of the inner layer substrate; and a through-hole which penetrates the laminate substrate. A cross-sectional shape of the through-hole includes a portion of a tapered shape in which a pore diameter decreases towards an inside from both front and back sides of the laminate substrate and a portion in which opposing inner walls provided in a portion corresponding to the inner layer substrate of the through-hole become parallel. The manufacturing method of the same is also provided.
摘要翻译：要解决的问题：为了提供一种布线板及其制造方法，能够抑制通孔的填充通孔中的空隙形成，并且旨在减少工时和确保由于填充通孔的可靠性通孔上正面和背面的电镀表面平坦。解决方案：布线板包括：具有内层导体的内层基板和具有通孔镀层的IVH; 具有表层导体和绝缘树脂的叠层基板，层叠在内层基板的前后两侧; 以及穿透层叠基板的贯通孔。通孔的横截面形状包括锥形形状的一部分，其中细孔径从层压基板的前后两侧向内侧减小，并且其中相对的内壁设置在对应于通孔的内层基板变得平行。还提供了其制造方法。版权所有（C）2013，JPO＆INPIT

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