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    • 1. 发明专利
    • Communication device using shared priority id
    • 使用共享优先级的通信设备
    • JP2014171131A
    • 2014-09-18
    • JP2013042495
    • 2013-03-05
    • Hitachi Automotive Systems Ltd日立オートモティブシステムズ株式会社
    • SUZUKI TAKAFUMIIJUIN MAKOTO
    • H04L12/28
    • PROBLEM TO BE SOLVED: To suppress a communication delay due to a load on the bus of a car onboard network while maintaining a bus resource to be allocated to communication for each of a car onboard ECU and an external node.SOLUTION: An ID having high priority is prepared, as a priority ID, one instance for one automotive network, and this priority ID is used in common for communication data between a plurality of car onboard ECUs. The car onboard ECUs normally are performing normal communication in which a low priority ID is set for each communication data between the ECUs, and, when a switchover request is received from an external node in normal communication with external nodes, a communication state is entered in which communication data having the priority ID imparted thereto is used. Then, the communication data having the priority ID imparted thereto is used for communication between the car onboard ECUs and external nodes.
    • 要解决的问题:为了抑制车载网络的总线上的负载引起的通信延迟,同时保持为车载ECU和外部节点中的每一个分配通信的总线资源。解决方案:具有高的ID 作为优先级ID,优先级被准备为一个汽车网络的一个实例,并且该优先级ID被共同用于多个车载ECU之间的通信数据。 汽车车载ECU通常正在执行正常通信,其中针对ECU之间的每个通信数据设置低优先级ID,并且当从与外部节点正常通信的外部节点接收到切换请求时,进入通信状态 使用赋予其优先级ID的通信数据。 然后,具有赋予其优先级ID的通信数据被用于车载ECU和外部节点之间的通信。
    • 2. 发明专利
    • Method for detecting memory overwrite by dma transfer
    • 通过DMA传输检测存储器过载的方法
    • JP2011145841A
    • 2011-07-28
    • JP2010005419
    • 2010-01-14
    • Hitachi Automotive Systems Ltd日立オートモティブシステムズ株式会社
    • IJUIN MAKOTOIRIE TORUOKUBO MINORU
    • G06F13/28G06F12/14
    • PROBLEM TO BE SOLVED: To allow an abnormality in DMA to be detected and memory overwrite to be minimized, when a transfer destination address error occurs in a DMA transfer operation, and unauthorized DMA accesses are made to an unforeseen memory area. SOLUTION: A controller having a DMA (direct memory access) function includes a memory area A121 which is a transfer destination for a DMA device A13a; a memory area B121a in which an initial value of a timer A14a is stored; a timer A14a which causes time-out at a predetermined time; a timer B14b, which generates a start request signal for a DMA device B13b, at a predetermined time interval that is shorter than the time-out time of the timer A14a; and a DMA device B13b, which transfers the value of the memory area B121a to a counter of the timer A14a and initializes the timer. COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:当在DMA传送操作中发生传送目的地地址错误时,为了允许检测到DMA异常并且存储器重写被最小化,并且对未预见的存储区域进行未经授权的DMA访问。 解决方案:具有DMA(直接存储器访问)功能的控制器包括作为DMA设备A13a的传送目的地的存储区域A121; 存储定时器A14a的初始值的存储区域B121a; 定时器A14a,其在预定时间引起超时; 定时器B14b,其以比定时器A14a的超时时间短的预定时间间隔生成DMA设备B13b的开始请求信号; 以及将存储区域B121a的值传送到定时器A14a的计数器的DMA装置B13b,并初始化定时器。 版权所有(C)2011,JPO&INPIT