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1. 发明专利

JPS52106246A TEST METHOD 失效
公开(公告)号：JPS52106246A
公开(公告)日：1977-09-06
申请号：JP2342376
申请日：1976-03-04
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , FUJITSU LTD
发明人： MIYAZAKI KATSUYUKI , MATSUSHITA SHIGEHIKO , KUBOTA SHIZUKA , ITOU KIICHIROU , ARIMA SHIYUUHEI
IPC分类号： H04Q3/545 , G06F11/00 , G06F11/16 , G06F11/22 , H04B3/46 , H04L12/26
摘要： PURPOSE:To establish the access route from auxiliary system to using system for the information process system which equips duplicated communication circuit of using and auxiliary systems and individual circuit corresponding to the communication circuit. Thus, the unit of auxiliary system can be utilized for a test unit.

2. 发明专利

JPS5273606A MULTIPLICATION SYSTEM 失效
公开(公告)号：JPS5273606A
公开(公告)日：1977-06-20
申请号：JP15045675
申请日：1975-12-16
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , HITACHI LTD , FUJITSU LTD
发明人： ITOU KIICHIROU , SASAOKA MAKOTO , ISOGAI TETSUJI , HEITOU KOUSHI , NAGATA TETSUO
IPC分类号： H04L5/22 , H04L12/52
摘要： PURPOSE:The direct storage of data terminal in to central station as well as data terminal are stored once at distant station, and then plural distant stations are collected to central station. As a result, an economical bucket multiplication can be performed.

3. 发明专利

JPS5391507A BUCKET MULTIPLEXING SYSTEM 失效
公开(公告)号：JPS5391507A
公开(公告)日：1978-08-11
申请号：JP592177
申请日：1977-01-24
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO
发明人： MAEDA YUUZOU , SHINOOKA MAKOTO , KANASHIGE KUNIOKI , ITOU KIICHIROU
IPC分类号： H04L5/22 , G06F13/00 , H04L12/951
摘要： PURPOSE:To improve the processing efficiency of a bucket multi-plexing device in which a H-procedure terminal and terminal for the procedure except the H procedure are installed.

4. 发明专利

JPS528712A SPEED CHANGING SYSTEM 失效
公开(公告)号：JPS528712A
公开(公告)日：1977-01-22
申请号：JP8435675
申请日：1975-07-11
申请人： OKI ELECTRIC IND CO LTD , IKUMATSU KENICHI , ITO KIICHIROU , YAMAMOTO TOSHIAKI , KOJIMA TAKUTO
发明人： KAMEDA KIYOTAKA , IKUMATSU KENICHI , ITOU KIICHIROU , YAMAMOTO TOSHIAKI , KOJIMA TAKUTO
IPC分类号： H04Q11/04
摘要： PURPOSE:In order to obtain a economical speed changing system through performing Bearareito conversion, by means of providing a temporary memory function to the timeslot TS conversion device in a time division channel.

5. 发明专利

JPS58151749A PACKET MULTIPLYING DEVICE 失效
公开(公告)号：JPS58151749A
公开(公告)日：1983-09-09
申请号：JP3468882
申请日：1982-03-05
申请人： NIPPON ELECTRIC CO
发明人： ITOU KIICHIROU
IPC分类号： H04L12/951
摘要： PURPOSE:To decrease the quantity of hardwares, by decentralizing all procedures for transmission of data and at the same time by simplifying the access method to a common data memory. CONSTITUTION:The non-paket terminals are connected to a data memory 60 via circuits 11-1n, circuit control parts 21-2n, transmission control processors 31-3n and a memory bus 70 respectively. At the same time, a packet exchange station is connected to the memory 60 via a multiplex circuit control part 40 and a transmission control processor 30. Thus the communication is performed between the exchange station and the terminals via the memory 60. The processor 30 transmits and receives data between the memory 60 and the part 40 on the basis of the transmission control procedure corresponding to the exchange station, while the control part 40 controls the assembly and disassembly of a data packet. The processors 31-3n transmit data between the control part 21- 2n and the memory 60 with the transmission control procedure corresponding to the non-packet terminals. A memory access control part 80 controls the access sequences to the memory 60 for the processors 30-3n.

6. 发明专利

JPS5666987A OPERATION SYSTEM OF DATA EXCHANGE EQUIPMENT 失效
公开(公告)号：JPS5666987A
公开(公告)日：1981-06-05
申请号：JP14251979
申请日：1979-11-02
申请人： NIPPON ELECTRIC CO
发明人： ITOU KIICHIROU
IPC分类号： H04Q3/545
摘要： PURPOSE:To use the off-line system as a debug system without possibility of interference to the on-line system, by means of the operation mode of a duplex system. CONSTITUTION:One isolation signal S of ''Matecp Isolate'' is added are on the IO bus HIB, also the split keys K0, K1 are provided on each switch controller SWC, and the system is controlled as shown in Table 1 in accordance with combination of the status. The access becomes possible by sending out an isolation signal from the on-line system CP (CP0), and also turning on the split key K1 by SWC1. Also, SWC0 only is inhibited by CP1 of the off-line system, and interference from the off- line system to the on-line system is not caused.

7. 发明专利

JPS6028346A LINE EXCHANGE CONTROL SYSTEM 失效
公开(公告)号：JPS6028346A
公开(公告)日：1985-02-13
申请号：JP13704883
申请日：1983-07-27
申请人： NIPPON ELECTRIC CO
发明人： ITOU KIICHIROU
IPC分类号： H04L12/52
摘要： PURPOSE:To process easily the change of a channel assigning system and of the constitution of a time division multiplex switch by the constitution that the function is divided into three blocks; a line control section, channel assignment bus control section and an exchange control section. CONSTITUTION:A line exchange is provided with n-set of line control sections LCU01-LCUn-1n accommodating plural kinds of data terminal devices different in terminal speed and call control procedure and conducting call control in response to the call control procedure of each terminal device, a channel assignment bus control section (CHCTL) conducting the channel assignment with a bearer rate in response to each terminal speed and the switching control of a connection bus, and an exchange control section (EXCTL') 21 conducting all exchange controls other than the controls by the LCU01-LCUn-1n and the CHCTL 30. A CH-CP300 indicates a desired bus connection to an HSW301 and returns a bus connection end response to the EXCTL'21 when the bus of outgoing terminal device -LCU01-HSW300-LCUn-1n- called terminal device is set.

8. 发明专利

JPS58111546A COMMUNICATION CONTROLLER 失效
公开(公告)号：JPS58111546A
公开(公告)日：1983-07-02
申请号：JP21527581
申请日：1981-12-25
申请人： NIPPON ELECTRIC CO
发明人： ITOU KIICHIROU
IPC分类号： H04L29/02 , G06F13/00 , G06F13/42
摘要： PURPOSE:To provide a margin for the limit of processing time of a character processing section and to mitigate the design condition of the character processing section, by taking transmission and reception buffers as one and two characters, respectively and providing a circuit masking a reception processing request signal. CONSTITUTION:A character decomposing section 2b reads data for one character's share from a transmission register 4, transmits a serial data for one character's share to a line 1b and also a transmission character processing request 10 to a character processing section 3, which transmits the next data to the transmission buffer 4. The serial data of the section 2 from the line 1a is reconstituted into the parallel data and transferred to a reception register 5, and when a reception register 6 is vacant, a reception character processing request 12 is given and transferred to the register 6. The request 12 is masked at a mask circuit 7 for a prescribed time before the generation of the request 10.

9. 发明专利

JPS57135549A AUTOMATIC LEADING-IN DEVICE FOR CIRCUIT 失效
公开(公告)号：JPS57135549A
公开(公告)日：1982-08-21
申请号：JP2199081
申请日：1981-02-17
申请人： NIPPON ELECTRIC CO
发明人： ITOU KIICHIROU
IPC分类号： H04M3/26 , H04L12/26
摘要： PURPOSE:To reduce hindrance to an actual communication by providing a circuit-break detecting circuit to the titled device of a telex switchboard and minimizing the continuation of a circuit break due to the fault of a leadin switch in the automatic leading-in device. CONSTITUTION:For leading a circuit into a circuit test board LTCSL, a control part CONT having received an instruction from the central processor CP of a switchboard EXSW drives a make contact and a switch SWB in the switch SWA of a specified circuit. After its drive is completed, a break contact in the switch SWA which corresponds to the specified circuit is driven for disconnection, and a corresponding circuit detecting circuit monitors the output of the switch SWB; when a current absence state continues for more than time equivalent to one character, a circuit break is considered to occur to stop the driving the break contact, thereby connecting the circuit side of the specified circuit and the switchboard EXSW directly.

10. 发明专利

JPS57106294A CONNECTION CONTROL SYSTEM OF TIME DIVISION MULTI-SWITCH 失效
公开(公告)号：JPS57106294A
公开(公告)日：1982-07-02
申请号：JP18251580
申请日：1980-12-23
申请人： NIPPON ELECTRIC CO
发明人： ITOU KIICHIROU
IPC分类号： H04Q3/545 , H04Q3/52 , H04Q11/04
摘要： PURPOSE:To avoid multi-connection and erroneous disconnection caused by a holding memory erroneously written by erroneous operation of upper control system, by installing space indication memory corresponding to ON/OFF high-way of time division multi-switch. CONSTITUTION:For example, when l1m1 are connected by channel t0, simultaneously when l1 is written on the lot number of t0 of the holding memory HMm1, ''1'' (space display) is set on the lot of t0 of the space display memory BMm1 and BM11. Under this condition, if a command to connect l1 to m2 in channel t0 is input, the control device BMCTL reads out the lot number t0 of the space display memory BM11 and BMm2. In this case, as the lot number t0 of the memory BM11 is ''1'' (space display), pass connection from the control device BMCTL to the control device HMCTL is prohibited.

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