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    • 1. 发明专利
    • OPERATING CONTROLLING METHOD FOR ANNUAL COOLING AND FREEZING CYCLE
    • JPH01273953A
    • 1989-11-01
    • JP10258588
    • 1988-04-27
    • HITACHI LTDNIPPON TELEGRAPH & TELEPHONE
    • YAMADA SHINICHIROSEKI OSAMUUEKUSA TSUNEOOSHIMA KAZUOSANPEI MINORUNAKAO MASAKI
    • F25B1/00
    • PURPOSE:To keep a low pressure while keeping a high pressure at a proper value, prevent a frosting at an evaporator and enable an operating condition of a compressor to be normally controlled by a method wherein a condensing pressure adjusting valve which is made variable by an electrical signal is arranged and sensors for sensing a high pressure and a low pressure are added. CONSTITUTION:A pressure P1 before operation varies in terms of solid lines of a low pressure Ps and a high pressure Pd in case that no control is carried out after operation. In winter season, the high pressure is not increased, a time is required for reaching a reference pressure P4. Under an operating condition at a low pressure, it does not fulfill a reference pressure P2 and a frosting in an evaporator and a difference in high pressure are high, so that a compressor generates an abnormal state. Then, a high pressure and a low pressure are detected and if the low pressure does not fulfill the reference value P2, a condensing pressure adjusting valve is controlled in such a way as it shows a further higher pressure Pd' even if the pressure has already reached the high pressure reference value P4. An inlet pressure of a pressure reducing device is increased, a flow rate of coolant is increased and after controlling the lower pressure is increased up to a low pressure Ps'. If the pressure has already reached the reference pressure P2, the condensing pressure adjusting valve is controlled in such a way as the high pressure Pd is decreased down to a reference high pressure P4.
    • 4. 发明专利
    • TIME SWITCH MODULE
    • JPS63261979A
    • 1988-10-28
    • JP9527487
    • 1987-04-20
    • NIPPON TELEGRAPH & TELEPHONE
    • MATSUMOTO KIYOSHINIKAIDO TADANOBUYAMADA SHINICHIRO
    • H04Q3/52H04Q11/04
    • PURPOSE:To attain the IC of a time switching module, and to reduce the design and production cost of the module by providing an input and output connection switching circuit for switching the connection of an input and output highways according to an input and output modes by an externally applied mode switching control signal. CONSTITUTION:Time division multiplex data applied from the input highways I0-I3 is supplied to the input connection switching circuit M0 and input data is switched and outputted to internal input highways II0-II3 according to an externally applied mode switching signal MS. This output data is written in positions at which speech path memories S00-S33 are disposed in a matrix form are set. The output connection switching circuit M1 is disposed to internal output highways OI0-OI3 for reading the contents of the memories S00-S33 and outputting, the outputs of the highways OI0-OI3 are switched according to the external mode switching signal MS to output to the output highways 00-03 and easily attain the IC of the module.
    • 8. 发明专利
    • MEMORY DEVICE
    • JPS61217995A
    • 1986-09-27
    • JP6030485
    • 1985-03-25
    • NIPPON TELEGRAPH & TELEPHONE
    • OGURA TAKESHIYAMADA JUNZOYAMADA SHINICHIRO
    • G11C15/00G11C15/04
    • PURPOSE:To improve a throughput by providing a means for outputting word addresses of a word to be the object of an operation at the same time when writing a data irrespective of a word address of the word storing the data. CONSTITUTION:The writing of a data without using a word address produces a drive signal corresponding to a word performing the writing of the data through an association operation or an operation determining the word for writing the data from the words in which an effective data is not stored. Based on the driving signal, by driving a word line of the word writing the data by the use of a word line driving circuit, the data writing is realized. During writing the data, the word line of the word in which the data is written is without fail driven, so that the word lines of the respective words are connected to terminals designating a generation and the output of the address of an address encoder, thereby the word address of the word in which the data is written is produced and outputted by the address encoder.