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1. 发明专利

JP2000035835A METHOD FOR RECOGNIZING BATTERY 失效
公开(公告)号：JP2000035835A
公开(公告)日：2000-02-02
申请号：JP20471698
申请日：1998-07-21
申请人： HITACHI LTD , HITACHI PROCESS COMPUTER ENG
发明人： NAGAYAMA HISAO , MURAKAMI TOSHIYUKI , WATABE RYUICHI
IPC分类号： G01R31/36 , G06F1/28 , G06F1/30 , H02J7/00 , H02J9/00
摘要： PROBLEM TO BE SOLVED: To recognize the substantial soundness of a battery and to prepare for backup at the time of an unexpected power cut by connecting a simulated load to the battery during an operation by main power. SOLUTION: When a load from a non-load state is connected to a battery, a certain degree of time is required until a system is restored to normal voltage. Voltage is detected by using the characteristic and soundness is recognized. A time monitoring circuit 003 issues a monitoring request at prescribed time, and a time monitoring circuit 004 pulse-outputs the time restoration hour/minute of the battery. When the time monitoring circuit 004 receives the voltage recognition request of the battery from the time monitoring circuit 003, it pulse-outputs the conduction request signal of the voltage restoration hour/minute of the battery to a switch 005. The switch 005 connects a simulated load to the battery by the conduction request signal. Battery voltage when the pulse output of the time monitoring circuit 004 is turned off is detected and it is held in a flip flop 006. Thus, the soundness of the battery is recognized based on the result.

2. 发明专利

JP2000298515A ON-LINE DIAGNOSTIC METHOD AND DEVICE FOR FAIL-SAFE SWITCH 失效
公开(公告)号：JP2000298515A
公开(公告)日：2000-10-24
申请号：JP10615899
申请日：1999-04-14
申请人： HITACHI LTD , HITACHI PROCESS COMPUTER ENG
发明人： KITADA TAKASHI , NAGAYAMA HISAO , KUSAMOTO SOTA , IGARI KUNIYUKI , NAKAMICHI SHUICHI
IPC分类号： G05B23/02 , G05B9/02 , H03K17/00
摘要： PROBLEM TO BE SOLVED: To attain the on-line diagnosis of a fail-safe switch for normally interrupting current supply by a 'emergency stop' or 'fail-safe' command through a conductive field effect transistor(FET) or the like. SOLUTION: An on-line diagnostic device for a fail-safe switch (FET) 10 for supplying current normally from an AC power supply 2 to an equipment 7 and interrupting current supply to the equipment 7 when an 'emergency stop' or 'fail-safe' control command is outputted from a controller or the like is provided with a detection circuit 20 for detecting the load current of the equipment 7, a diagnostic timing generation circuit 30 for generating a diagnostic pulse for controlling the FET 10 to an off state at timing for outputting '1' when a detection value V (converted into a voltage value) from the circuit 20 exceeds a prescribed reference (Ref) and a judgment circuit 44 for comparing a held detection value Vhold held at the timing and a detection value V detected immediately after the value Vhold, and when Vhold >= V, judging the off of the FET 10.

3. 发明专利

JPH09305424A DUAL SYSTEMS 失效
公开(公告)号：JPH09305424A
公开(公告)日：1997-11-28
申请号：JP12145596
申请日：1996-05-16
申请人： HITACHI LTD , HITACHI PROCESS COMPUTER ENG
发明人： KOBAYASHI EIJI , NAGAYAMA HISAO , KUROSAWA KENICHI , TAKAMATSU RYOICHI , OHASHI AKIHIRO , HASHIMOTO TADAHIKO , MASUI KOJI
IPC分类号： G06F11/20 , G06F9/46
摘要： PROBLEM TO BE SOLVED: To provide simple fast dual systems which manages common data with main memories without using a system-shared global memory(GM). SOLUTION: When an MPU 020 of an in-use system processor 010 gains write access to the main memory 030, a memory access information acquiring circuit 046 of a CME (common data coincidence device) 040 directly snoops the access information from a main memory bus 021 and transfers it to a transfer circuit comparing circuit 042. The comparing circuit 042 compares the address of the access information with a common area range (upper-limit register 044 and lower-limit register 055), and judges common data in case of writing to the common area 033 and sends it to a transmitting receiving circuit 143 of a stand-by system processor 110. A CME140 of the stand-by system when judging the common data from the address of the receive information by a coincidence bus 060 gains write access to the main memory 130 from a memory access circuit 146.

4. 发明专利

JPH0423392A PRINTED BOARD 失效
公开(公告)号：JPH0423392A
公开(公告)日：1992-01-27
申请号：JP12330490
申请日：1990-05-14
申请人： HITACHI LTD , HITACHI PROCESS COMPUTER ENG
发明人： IGARI KUNIYUKI , YAMAOKA HIROMASA , KOBAYASHI MASAMITSU , WATABE RYUICHI , NAGAYAMA HISAO
IPC分类号： H05K3/46
摘要： PURPOSE:To eliminate the need to mount discrete resistors and to reduce the manhour of assembly by a method wherein printed wirings, each having are resistance value different from the others, are formed in the internal layer of a printed board in a multilayer and the printed wirings, each having a resistance value different from the others, are respectively combined and connected. CONSTITUTION:A transmission side IC 4 an a reception side IC 5 are mounted on a multilayer printed board 10 consisting of printed wirings 1 and 2 which have respectively a prescribed resistance value, insulating layers 8 and 9 and a normal mod layer 3 and output 41 of the IC 4 is connected with a resistor 21 of the wiring 2 having the prescribed resistance value, passes through to the layer 3 through a through hole 61, is connected to a normal mode layer 71 and moreover, is connected to input 51 of the IC 5. Combinations of the remaining 7 groups are also connected in the same way and are buried in an internal layer 70. Thereby, mounting of discrete resistors becomes unnecessary.

5. 发明专利

JPH10116225A ADDRESS CONVERTING CIRCUIT AND MULTIPROCESSOR SYSTEM 失效
公开(公告)号：JPH10116225A
公开(公告)日：1998-05-06
申请号：JP27056796
申请日：1996-10-14
申请人： HITACHI LTD , HITACHI PROCESS COMPUTER ENG
发明人： YAMADA TSUTOMU , KUROSAWA KENICHI , MASUI KOJI , OHASHI AKIHIRO , NAGAYAMA HISAO
IPC分类号： G06F12/02 , G06F12/06 , G06F13/36 , G06F15/17 , G06F15/177
摘要： PROBLEM TO BE SOLVED: To obtain an address converting circuit with a small circuit scale which gives flexibility to access by converting a part of an address and outputting it to a local bus. SOLUTION: A processor 1, a main storage 3, and a local bus 21 are connected to one another by a memory controller 2. The address converting circuit 100 bypasses a part of AC 14 between the local bus 12 and a system bus 16. Then the address converting circuit 100 consists of a conversion part 110, a conversion control part 130, and a bus state machine part 150, and the bus state machine part 150 monitors the state of the local bus 12 and the conversion control part 130 determines whether or not address conversion is done and the direction of a two-way AD signal passing through the conversion part according to the state of the local bus 12. For access from the system bus 16, the memory controller 2 recognizes the address converted by the address converting circuit 110 and gains access to the main storage 3.

6. 发明专利

JP2000105729A BATTERY BACKUP CIRCUIT 失效
公开(公告)号：JP2000105729A
公开(公告)日：2000-04-11
申请号：JP27460598
申请日：1998-09-29
申请人： HITACHI LTD , HITACHI PROCESS COMPUTER ENG
发明人： UMEHARA TAKASHI , MASUI KOJI , OHASHI AKIHIRO , NAGAYAMA HISAO
IPC分类号： G06F12/16
摘要： PROBLEM TO BE SOLVED: To output a warning with respect to a backup failure in the start-up process when a main power source is turned on and to clearly display whether or not a battery needs to be replaced by providing a backup voltage monitor circuit and also a circuit which maintains a state wherein the main power is normally supplied. SOLUTION: A power source switching part 009 automatically switches the connection to the battery 001 when the voltage of the main power source 000 drops, and automatically resumes the connection of the main power source 000 when the voltage of the main power source 000 recovers. A state monitor part 004 is provided, and if the battery voltage drops even for a short time, a flip-flop circuit is cleared to indicate a drop in the battery voltage. Therefore, when the main power source 000 is turned on, the state wherein the backup process is carried on is shift to the state holding part 0005, and then power source abnormality, after the main power source 000 is turned on, can be monitored by the state monitor part 004. Consequently, the information on the battery output voltage drop in the backup operation is surely stored and then, a battery replacement request can be issued.

7. 发明专利

JPH04363713A PROGRAMMABLE CONTROLLER 失效
公开(公告)号：JPH04363713A
公开(公告)日：1992-12-16
申请号：JP13880591
申请日：1991-06-11
申请人： HITACHI LTD , HITACHI PROCESS COMPUTER ENG
发明人： KOBAYASHI MITSUAKI , YAMAOKA HIROMASA , KITADA TAKASHI , NAGAYAMA HISAO
IPC分类号： G05B19/04 , G05B19/048 , G05B19/05 , G06F1/28 , G06F12/16
摘要： PURPOSE:To improve the reliability and maintenanbility of a system, and to shorten a starting time by adding a voltage variation storage circuit to a storage device having an outside power source and an incorporated auxiliary power source for holding data. CONSTITUTION:This device is equipped mainly with a processor 2, and a storage device 6 having an outside power source 3, and an auxiliary power source 4 as the power source, which is constituted of a storage element 14, leading address storage circuit 15, and voltage variation storage circuit 5. The voltage variation storage circuit 5 is added to the storage device having the outside power source 3, and the incorporated auxiliary power source 4, so that the reliability and maintenability of the system can be sharply improved, and the starting time can be sharply shortened.

8. 发明专利

JP2006344086A DATA COLLATING DEVICE AND METHOD, DATA CONTROLLER, AND DATA CONTROL METHOD 审中-公开
公开(公告)号：JP2006344086A
公开(公告)日：2006-12-21
申请号：JP2005170274
申请日：2005-06-10
申请人： HITACHI LTD , HITACHI INF & CONTROL SYST
发明人： NAGAYAMA HISAO , FUNAKI SATORU , BANDO AKIRA , ENDO HIROMICHI , OGURA MAKOTO , KOBAYASHI MASAMITSU , UMEHARA TAKASHI , WATABE RYUICHI , MASUKO NAOYA
IPC分类号： G06F11/18
摘要： PROBLEM TO BE SOLVED: To attain compactness, high performance, security improvement and availability improvement about a device using a plurality of processors. SOLUTION: In this data collating device for inputing a processing result obtained by processing a common data processing object so as to be compatible between and among two systems or more and collating data in processing results of the two systems or more, the matter that the processing results of the two systems or more are performed to a data processing object common to each other is determined as data commonness, and is in a tolerance as data permission and the data collation is configured to be performed according to the data commonness and data permission. COPYRIGHT: (C)2007,JPO&INPIT

9. 发明专利

JP2006338426A Calculator system 审中-公开
标题翻译：计算机系统
公开(公告)号：JP2006338426A
公开(公告)日：2006-12-14
申请号：JP2005163425
申请日：2005-06-03
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： ENDO HIROMICHI , NAGAYAMA HISAO , OGURA MAKOTO , FUNAKI SATORU , YAMADA TSUTOMU , BANDO AKIRA , MASUKO NAOYA , UMEHARA TAKASHI , KOBAYASHI MASAMITSU , ISHIKAWA MASAKAZU , SHIRAISHI MASAHIRO
IPC分类号： G06F12/00 , G06F12/14
摘要： PROBLEM TO BE SOLVED: To solve a problem of increase in device weight in a conventional controller generally constructed of a component device responsible for usability and a component device responsible for safety separately.
SOLUTION: When an access control state from a processor side and that from an input/output device side to a shared resource is changed in a switch between a normal control mode and a safe control mode, the both control modes coexist on the same calculator system. Therefore, in this calculator system capable of operating a plurality of tasks and having the shared resource used by a plurality of tasks and a plurality of control modes for operating one or more tasks under the respective control modes, an access control state for access from the respective tasks to the shared resource is applied to each control mode, and synchronously with the switch of the control mode, the access control state is switched.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了解决通常由负责可用性的部件装置构成的常规控制器和分别负责安全的部件装置的设备重量增加的问题。解决方案：当在正常控制模式和安全控制模式之间的切换中改变来自处理器侧和从输入/输出设备侧到共享资源的访问控制状态时，两个控制模式共存于相同的计算器系统。因此，在能够操作多个任务并具有多个任务所使用的共享资源的该计算器系统和用于在各个控制模式下操作一个或多个任务的多个控制模式的访问控制状态下，将共享资源的各个任务应用于每个控制模式，并且与控制模式的切换同步，切换访问控制状态。版权所有（C）2007，JPO＆INPIT

10. 发明专利

JP2009121880A Driving mechanism monitoring device 审中-公开
标题翻译：驱动机械监控装置
公开(公告)号：JP2009121880A
公开(公告)日：2009-06-04
申请号：JP2007294375
申请日：2007-11-13
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： SASAMOTO TAKASHI , OBARA KOHEI , NAGAYAMA HISAO , ECHIZEN TOMOHITO
IPC分类号： G21C17/10
摘要： PROBLEM TO BE SOLVED: To provide a driving mechanism monitoring device capable of acquiring accurately position information of a position sensor.
SOLUTION: The device includes a driving mechanism 10 for driving a body to be controlled; a positional displacement sensor 12 for generating an output based on a supplied excitation signal and displacement of the driving mechanism; a control part 7 for supplying a prescribed excitation signal to the positional displacement sensor, and detecting displacement of the driving mechanism based on an output signal based on the position of the driving mechanism output from the sensor; an adjusting mechanism 5 for adding an adjustment value to the excitation signal output from the control part 7 so that a sensor output becomes a value set beforehand when the driving mechanism is displaced to a position set beforehand; and a converter 8 for performing digital-analog conversion of the excitation signal output from the control part 7, supplying the results to the adjusting mechanism, performing digital-analog conversion of the output signal from the positional displacement sensor, and supplying the results to the control part.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供能够准确地获取位置传感器的位置信息的驱动机构监视装置。解决方案：该装置包括用于驱动要控制的主体的驱动机构10; 位置偏移传感器12，用于基于所提供的激励信号和驱动机构的位移产生输出; 用于向位置位移传感器提供规定的激励信号的控制部分7，并且基于从传感器输出的驱动机构的位置，基于输出信号来检测驱动机构的位移; 调整机构5，用于对从控制部7输出的激励信号添加调整值，使得当驱动机构移位到预先设定的位置时，传感器输出成为预先设定的值; 以及转换器8，用于对从控制部分7输出的激励信号进行数模转换，将结果提供给调节机构，对来自位置传感器的输出信号进行数模转换，并将结果提供给控制部分。版权所有（C）2009，JPO＆INPIT

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