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1. 发明专利

JPH08202580A EMULATOR 失效
公开(公告)号：JPH08202580A
公开(公告)日：1996-08-09
申请号：JP876495
申请日：1995-01-24
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： KOYAMA HIDEAKI , AOTO GIICHI , SASAKI HIROYUKI
IPC分类号： G06F11/28 , G06F11/22
摘要： PURPOSE: To execute emulation in the application system of a multi-CPU system by using one emulator. CONSTITUTION: The emulator which executes the emulation in the application system of a 2-CPU system and is divided into an emulator unit not to be concerned with making into AS such as a part to support the CPU core of a microcomputer, etc., and a target probe 3b to vary in accordance with the making into AS such as the artificial circuit of a peripheral function, etc., is provided with a slave microcomputer 4 to execute substitutionally the function of the target microcomputer of one side between two microcomputers and the slave microcomputer 5 to execute substitionally the funciton of the target microcomputer 5 of the other side. Since the target probe 3b is provided with these slave microcomputers 4, 5, the emulation of the two-CPU system can be executed by using one emulator.

2. 发明专利

JPH0830483A EMULATOR 失效
公开(公告)号：JPH0830483A
公开(公告)日：1996-02-02
申请号：JP16496694
申请日：1994-07-18
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： NAITO YOSHIRO , SUZUKI TATSUYA , AOTO GIICHI
IPC分类号： G06F11/28 , G06F11/22 , G06F15/78
摘要： PURPOSE:To debug a program by making a user optionally alter the timing chart of the execution contents of the program. CONSTITUTION:The user program is traced and an optional signal of the timing chart displayed on a display 2e is altered on a keyboard 2a or with a mouse 2b. The altered timing chart is inputted to a work memory 8 from an I/O 2d through a master bus 10, the user program before the alteration which is executed and the altered user program are converted and transferred to an emulation control circuit 7, and the user program stored in a user memory 1a is erased; and the altered user program is outputted from a user interface 12 to rewrite and store the data in the user memory 1a, and the user alters the pattern of the user program and debugs the program.

3. 发明专利

JPH1173344A EMULATOR 失效
公开(公告)号：JPH1173344A
公开(公告)日：1999-03-16
申请号：JP23467797
申请日：1997-08-29
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： ONDA HIDEO , ITO ATSUYOSHI , AOTO GIICHI
IPC分类号： G06F11/28 , G06F11/22
摘要： PROBLEM TO BE SOLVED: To improve the availability of a trace memory. SOLUTION: This emulator is provided with a status forming means 20A for forming a 1st status signal indicating a repeating period of execution of a loop instruction and a 2nd status signal showing each repeated execution of the loop instruction and trace controlling means 50, 60 for inhibiting tracing in a trace memory 70 during a period from a 1st loop end up to a final loop end based on the 1st and 2nd status signals. Since tracing in the trace memory 70 is inhibited from the 1st loop end up to the final loop end, the repeated writing of arithmetic processing execution results in the memory 70 by the loop instruction can be evaded and the using efficiency of the memory 70 can be improved.

4. 发明专利

JPH08194658A MICROCOMPUTER SYSTEM 失效
公开(公告)号：JPH08194658A
公开(公告)日：1996-07-30
申请号：JP519795
申请日：1995-01-17
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： NOGUCHI HIROKATSU , KOYAMA HIDEAKI , AOTO GIICHI
IPC分类号： G06F13/10
摘要： PURPOSE: To reduce burden for developing a software by unnecessitating the development of the software for initializing the built-in memory interface or the like of a microprocessor. CONSTITUTION: A microprocessor 1 incorporates the memory interface, initializing program for that interface, and control register 10 for storing initializing information and on the other hand, a memory 2 incorporates a register 20 for initialization where its own specification information is stored. Just after the power source of the system is turned on or reset, the microprocessor 1 reads the specification information out of the memory 2 and after the memory interface initialization is performed based on that read specification information, ordinary arithmetic processing or the like is started. Thus, since the initialization for the built-in memory interface or the like in the microprocessor 1 is automatically performed, it is not necessary to prepare software for initializing the interface and burden for software development is reduced.

5. 发明专利

JPH09114690A INTERNAL INFORMATION OUTPUT METHOD AND EMULATOR 失效
公开(公告)号：JPH09114690A
公开(公告)日：1997-05-02
申请号：JP27087395
申请日：1995-10-19
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： SUZUKI TATSUYA , AOTO GIICHI
IPC分类号： G06F11/28 , G06F11/22 , G06F11/34
摘要： PROBLEM TO BE SOLVED: To refer to data accessed by a microprocessor and the internal state of the microprocessor without stopping the execution of a program by the microprocessor. SOLUTION: This emulator is provided with the microprocessor provided with a function equivalent to an emulation object microprocessor. The microprocessor 1 is constituted of a CPU 20 provided with a general purpose/ status register 21, a built-in ROM/RAM 22, a peripheral I/O 23 provided with a refresh controller 24, an external bus controller 25 and an output data holding circuit 26, etc. The value of the general purpose/status register 21 is held in the output data holding circuit 26 every time it is changed, access data to a specified address for the built-in ROM/RAM 22 are held as well and the held data are outputted at the time of a refresh cycle.

6. 发明专利

JPH08179963A EMULATOR 失效
公开(公告)号：JPH08179963A
公开(公告)日：1996-07-12
申请号：JP31895594
申请日：1994-12-22
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： ONDA HIDEO , AOTO GIICHI
IPC分类号： G06F11/28 , G06F11/22
摘要： PURPOSE: To perform trace acquisition only when data with a designated address is changed and to easily evaluate analysis and execution results in the change of a data content. CONSTITUTION: When a user program is executed, an address comparator 14 outputs a control signal to latch circuits 15, 16, and new data is latched with the data latch circuit 15, and the latch circuit 16 latches data latched last time by the data latch circuit 15, and a data comparator 17 compares them, and a trigger signal is outputted when noncoincidence is obtained. A trigger signal detection circuit 18 to which a trigger signal is inputted outputs a write enable signal to trace memory 19, and the control signal to a latch circuit 21, and a count-up signal to a counter 20, then, performs the trace acquisition. When coincidence between the data compared by the data comparator 17 is obtained, no tirgger signal is outputted, therefore, no write on the trace memory 19 is performed.

7. 发明专利

JPH10105434A EMULATOR 失效
公开(公告)号：JPH10105434A
公开(公告)日：1998-04-24
申请号：JP25821496
申请日：1996-09-30
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： SASAKI HIROYUKI , AOTO GIICHI , FUJITA HIDEYA , SUZUKI TATSUYA
IPC分类号： G06F11/28
摘要： PROBLEM TO BE SOLVED: To provide technique for accurately executing brake condition comparison even when the operation frequency of an emulation processor is high. SOLUTION: An emulator is provided with plural sub-emulation buses 51 and 52 respectively capable of being connected to an emulation bus 55, sorting means 31 and 32 which successively sorts the states of the emulation bus to the plural sub-emulation buses at every bus cycle and pluralbrake condition comparing circuits 10A and 10B which are respectively provided in accordance with the plural sub-emulation buses and capable of judging whether or not the states of the respectively corresponding sub-emulation buses coincide with previously set brake conditions. Then, the operation margin of the brake condition comparing circuit is enlarged so as to attain the adequacy of brake detection.

8. 发明专利

JPH09160801A EMULATOR AND SYSTEM EVALUATION DEVICE USING THE SAME 失效
公开(公告)号：JPH09160801A
公开(公告)日：1997-06-20
申请号：JP32277195
申请日：1995-12-12
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： SASAKI HIROYUKI , AOTO GIICHI , FUJITA HIDEYA , SUZUKI TATSUYA
IPC分类号： G06F11/28 , G06F11/00 , G06F11/22 , G06F11/34 , G06F11/36
摘要： PROBLEM TO BE SOLVED: To efficiently store desired data in a trace memory by constituting a control circuit so that trace data are stored in respective memories in order and providing a trace condition setting means and a trace condition coincidence detecting means. SOLUTION: The trace and break control circuit 13 consists of a register 42 where trace conditions are set, a comparator 43 which compares the conditions set in the register 42 with signals on buses BB0 and BB1 to judge whether or not they match with each other, a trace and break control circuit 41 which generates write signals /WR0 and WR1 for giving the writing timing of data to bank memories BMEM0 and BMEM1, etc. Effective/ineffective state flags WRV0 and WRV1 indicating whether or not data meet the trace conditions, are generated and stored in respective banks together with trace data.

9. 发明专利

JPH08147187A EMULATOR 失效
公开(公告)号：JPH08147187A
公开(公告)日：1996-06-07
申请号：JP30987394
申请日：1994-11-18
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： SUZUKI TATSUYA , AOTO GIICHI
IPC分类号： G06F11/28 , G06F11/22
摘要： PURPOSE: To refer to data to be handled by a microprocessor for emulation without stopping the execution of a user program due to the microprocessor for emulation. CONSTITUTION: This emulator is provided with a memory 20 for data monitor coupled so as to possess information to be transmitted through an emulation bus 2 and a gate 28 for turning the memory 20 for data monitor to a write state during a period in which the information to be defined as a monitor object is transmitted through the emulation bus 2 and for turning the memory 20 for data monitor to a read state during the period in which the information defined as the monitor object is not transferred through the emulation bus 2 and without stopping the execution of the user program due to the microprocessor for emulation, the data to be handled there can be referred to.

10. 发明专利

JPH1185559A EMULATOR 失效
公开(公告)号：JPH1185559A
公开(公告)日：1999-03-30
申请号：JP24054597
申请日：1997-09-05
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： AOKI KENICHI , AOTO GIICHI
IPC分类号： G06F11/28 , G06F11/22
摘要： PROBLEM TO BE SOLVED: To easily check whether a real user machine is connected or not. SOLUTION: This emulator is provided with a logic signal forming means 8 for forming a logic signal for discriminating a connection state corresponding to the state of conduction with the real user machine through a user interface cable, register 90 for storing the logic signal formed by the logic signal forming means, and discriminating means for discriminating the state of connection with the real user machine while referring to the information held in this register before transferring the user program to the real user machine. Then, the logic signal for discriminating the state of connection is stored in the register corresponding to the state of conduction with the real user machine and before transferring a monitor program to this real user machine, setting information in this register is checked so that it can be easily checked whether the real user machine is connected or not.

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