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    • 1. 发明专利
    • MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    • JPH07147281A
    • 1995-06-06
    • JP29323593
    • 1993-11-24
    • HITACHI LTD
    • YONEDA KATSUMIYAMADA YOHEIKANAI FUMIYUKI
    • H01L21/3205H01L21/768H01L23/522
    • PURPOSE:To obtain a flat interlayer insulating film, in which steps between wirings are reduced, by a method wherein such a second insulating film as to make slow the film-forming rate of a silicon oxide film is held formed on a lower wiring layer and the film-forming rate of the silicon oxide film on the wiring layer is made to differ from that of the silicon oxide film on a wiring space region. CONSTITUTION:A field insulating film 2 is formed on a semiconductor substrate 1, a semiconductor element is formed on an active region on the substrate 1 and thereafter, a first insulating film 3 is formed on the film 2. Then, after a conductive film for first wiring layer and a second insulating film 5 are formed in order on the film 3, this conductive film is etched to form a first wiring layer 4. At this time, the film-forming rate of a silicon oxide film 6, which is formed on the film 5 on the layer 4, is formed slower than that of the film 6 on a wiring space region on the film 3. Accordingly, a step between the upper part of the wiring space region and the upper part of the layer 4 is dissolved and the surface of the film 6 can be roughly flattened.