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1. 发明专利

JP2004228927A Spread spectrum radio-communication system and control program 有权
公开(公告)号：JP2004228927A
公开(公告)日：2004-08-12
申请号：JP2003014288
申请日：2003-01-23
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： TANAKA MIKIHIRO
IPC分类号： H04J13/00 , H04B1/7103 , H04B7/26 , H04W16/10
CPC分类号： H04W16/10 , H04W72/0453 , H04W74/0808 , H04W84/12
摘要： PROBLEM TO BE SOLVED: To provide a radio-communication system in which a signal interfere between the radio-communication systems is avoided and a new occupied band is assigned efficiently in a limited frequency band.
SOLUTION: In the spread spectrum radio-communication system, another radio system searches a frequency in use, the frequency band adapted to the new occupied band is detected from a dead frequency band and an occupied-band center frequency is decided in the detected dead frequency band. When there is no dead frequency band adapted to the occupied band, the detection of the dead frequency band and the decision of the center frequency are repeated while using the occupied band, in which a bandwidth is narrowed as a set object when the bandwidth of the occupied band to be set can be changed. Accordingly, since the interference of the radio signal between the systems is avoided and the occupied band having the bandwidth corresponding to a user requirement can be set, a plurality of the systems can be operated simultaneously by effectively utilizing the limited frequency band.
COPYRIGHT: (C)2004,JPO&NCIPI

2. 发明专利

JP2001318124A LOGICAL MODULE 失效
公开(公告)号：JP2001318124A
公开(公告)日：2001-11-16
申请号：JP2000142246
申请日：2000-05-09
申请人： HITACHI LTD
发明人： TANAKA MIKIHIRO , YAMAGIWA AKIRA , TADA OSAMU , EJIMA NOBUAKI
IPC分类号： G01R31/28 , G06F11/22
摘要： PROBLEM TO BE SOLVED: To provide a technology enabling logical verification corresponding to different requirements of specification such as pin arrangement having no restriction on a system board subjected to logical verification or high rate signal transmission. SOLUTION: The logical module comprises a plurality of programmable logical elements, switching elements and connectors mounted on one or both sides of a substrate wherein the connectors on the opposite sides of the substrate have the same shape so that they can be mounted upside down. The ratio of the number of I/O connections from the connectors to the logical elements and switching elements configures a different architecture between the connectors on the surface and rear. When the connectors on the surface and rear are used separately, logical verification can be effected in correspondence with different requirements of specification, e.g. pin arrangement having no restriction on a system board or high rate signal transmission.

3. 发明专利

JP2002230069A LOGIC VERIFYING DEVICE 失效
公开(公告)号：JP2002230069A
公开(公告)日：2002-08-16
申请号：JP2001026247
申请日：2001-02-02
申请人： HITACHI LTD
发明人： TANAKA MIKIHIRO , YAMAGIWA AKIRA
IPC分类号： G01R31/28 , G06F17/50
摘要： PROBLEM TO BE SOLVED: To provide a technology for realizing connection from an interface part to the arbitrary pin of a logical part by enabling a signal to go through only one switching device so as to reduce delay when the pin arrangement of the interface part of a logic verification device is preliminarily decided. SOLUTION: The sets of a plurality of logic elements having a first connection terminal classified into n kinds of categories, one or more interface connectors, and a plurality of switching devices are prepared for the number corresponding to the n kinds of categories. The device is provided with first connection wiring for connecting the first connection terminal to the switching device in the set corresponding to the category to which the connection terminal belongs, second connection wiring for connecting the connector to a third connection terminal, and for connecting the connector to the n pieces of switching device whose categories are different, and third connection wiring for connecting the logic elements to each other. Thus, it is possible to realize the connection from the interface part of the logic verification device to the arbitrary connection terminal of the logical part, and to release the constraint of the pin arrangement of the interface part.

4. 发明专利

JP2002229679A ELECTRONIC EQUIPMENT WITH SLOT FOR PC CARD AND PCI EXTENSION ADAPTOR 审中-公开
公开(公告)号：JP2002229679A
公开(公告)日：2002-08-16
申请号：JP2001226986
申请日：2001-07-27
申请人： HITACHI LTD
发明人： TANAKA MIKIHIRO , YOSHIDA KENICHI , INOGUCHI HIROYUKI , MARUYAMA TAKASHI , KISHI KAZUMA , OIKAWA HIRONORI , ITO HIROSHI , YOKOTA HITOSHI
IPC分类号： G06F1/16 , G06F1/18 , G06K17/00
摘要： PROBLEM TO BE SOLVED: To provide techniques for realizing a PCI extension adaptor for a PC card capable of connecting with a connector for extending a desktop type personal computer PCI adopting a low profile PCI. SOLUTION: This adaptor is formed by a low profile PCI extension board comprising a means for electrically connecting with a PCI bus and a PC card control element, and an extension unit comprising a means for electrically connecting with the PC card. The low profile PCI extension board and the extension unit are connected with each other by the means for electrically connecting loaded respectively on each board and connected with the connector for extending the desktop type personal computer PCI by the means for electrically connecting with the PCI bus of the low profile PCI extension board.

5. 发明专利

JPH11186771A CIRCUIT MODULE AND INFORMATION PROCESSING DEVICE 失效
公开(公告)号：JPH11186771A
公开(公告)日：1999-07-09
申请号：JP34753197
申请日：1997-12-17
申请人： HITACHI LTD
发明人： TANAKA MIKIHIRO , YAMAGIWA AKIRA , MARUYAMA TAKASHI , KAMIMURA YASUHIRO
IPC分类号： H05K7/20 , H01L23/427
摘要： PROBLEM TO BE SOLVED: To improve heat dissipation efficiency by mounting a processor in the state of a bare chip, in a cavity part of a printed board, bonding one surface of the bare chip to one surface of a heat pipe, and installing a heat dissipation part on the end portion of the heat pipe. SOLUTION: A cavity part is formed in a circuit module 2 and a circuit module substrate 101. A processor in a state of a bare chip 20 is mounted in the cavity part. The bare chip 20 is electrically connected with the circuit module substrate 101 through bonding wires 104. Further, main components such as a cache submodule 40, a system controller 30 and a connector 90 for interface are mounted on the circuit module substrate 101. One surface of the bare chip 20 mounted on the circuit module substrate 101 is bonded to one surface of a heat pipe 103, and a heat dissipation part is installed on the end portion of the heat pipe 103. Thereby heat dissipation efficiency can be improved.

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