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1. 发明专利

JPS5439534A PRIORITY CONTROL SYSTEM 失效
公开(公告)号：JPS5439534A
公开(公告)日：1979-03-27
申请号：JP10583877
申请日：1977-09-05
申请人： HITACHI LTD
发明人： SHIMOTSUMA KEN
IPC分类号： G06F13/00
摘要： PURPOSE:To prevent the specific information processor in the information processing system from being obtained for the line usage right biased, by adding comparatively simple control code and circuit.

2. 发明专利

JPS545344A CONTROL SYSTEM OF PROCESSING CONDITION 失效
公开(公告)号：JPS545344A
公开(公告)日：1979-01-16
申请号：JP6983977
申请日：1977-06-15
申请人： HITACHI LTD
发明人： SHIMOTSUMA KEN , NAGAI TOMONORI
IPC分类号： G06F9/48
摘要： PURPOSE:To enable to speed up the processing, by performing direct transition from the condition of processing in high emergency to lower emergency with a simple control, through using a conditional control bit register.

3. 发明专利

JPS6123234A Service processor control system 失效
标题翻译：服务处理器控制系统
公开(公告)号：JPS6123234A
公开(公告)日：1986-01-31
申请号：JP14240484
申请日：1984-07-11
申请人： Hitachi Comput Eng Corp Ltd , Hitachi Ltd
发明人： SHIMOTSUMA KEN , WATANABE SHIYOUZOU
IPC分类号： G06F9/00
摘要： PURPOSE: To attain the simple and quick execution of the operation contents registered by a frame through which the key input operations are edited and registered, by processing the data transmitted from a service processor in a specific mode as the data given from a keyboard at a data terminal equipment.
CONSTITUTION: A frame is provided to give indications for registration and execution of procedures of an operator. Then a command is given to set a false key input mode to a terminal equipment 3 which is operated separately from a service processor 2. The data sent from the processor 2 under such a mode is handled as the input data given from a keyboard 32. Then a series of operations edited by the operator are executed consecutively and automatically.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：通过处理从特定模式的服务处理器发送的数据，通过从键盘输入的数据来处理由键盘输入操作被编辑和登记的帧所登记的操作内容的简单且快速的执行数据终端设备。规定：提供了一个框架来提供操作员的注册和执行程序的指示。然后，给予与服务处理器2分开操作的终端设备3设置假键输入模式的命令。在这种模式下从处理器2发送的数据被作为从键盘32给出的输入数据来处理。然后连续执行一系列由操作者编辑的操作。

4. 发明专利

JPS56149649A HARDWARE STATE CONTROL SYSTEM 失效
公开(公告)号：JPS56149649A
公开(公告)日：1981-11-19
申请号：JP5310580
申请日：1980-04-22
申请人： HITACHI LTD
发明人： SHIMOTSUMA KEN
IPC分类号： G06F11/22 , G06F9/00 , G06F11/00 , G06F11/30
摘要： PURPOSE:To improve the reliability and to reduce of cost for a hardware state control system, by controlling the hardware state control word (MCW) through a service processor. CONSTITUTION:To alternate the MCW through an indirect designation of MCW, the service processor 30 scans out the MCW for indirect designation of hardware MCW20 within the central processor 20 to the MCW103 for indirect designation with a modification by the operator MCW and then scans it into the indirect designating MCW part of hardware MCW201 within the processor 20. The hardware MCW201 of the processor 20, if altered directly by a microprogram, can be observed on the display of the processor 30. Accordingly, both the alternation of MCW indicated by an operator and said alternation by the program can be controlled with no conflict by making use of a display of the service processor 20. Thus an increase of reliability and a reduction of cost is realized.

5. 发明专利

JPS5443636A INFORMATION TRANSFER SYSTEM 失效
公开(公告)号：JPS5443636A
公开(公告)日：1979-04-06
申请号：JP10986777
申请日：1977-09-14
申请人： HITACHI LTD
发明人： SHIMOTSUMA KEN , MURANO MASUO
IPC分类号： G06F9/46 , G06F3/00 , G06F13/00 , G06F13/362 , G06F15/16 , G06F15/177
摘要： PURPOSE:To eliminate the contradiction such as the usage of one information transmission line by any two information processors among a plural number of processors, by providing a priority decision circuit for making each information processor use the information. CONSTITUTION:Several information processors 1, 2...k...n are connected to one information transmission line 10 and one priority line 20 without double connection, and respective processors 1, 2... are equipped with the 1st circuit 100 generating an information transmission request signal and the 2nd circuit 200 generating a priority signal. Further, this system is provided with the priority decision circuit composed of the 3rd circuit 300 which measures time aging when both circuits 200 and 200 start operating and the 4th circuit 400 which controls circuits 100 and 200 under conditions fixed uniformly by respective processors 1, 2... when circuit 300 starts the measurement. When an information transmission request occurs, the information transmission request signal and priority signal are transmitted to information transmission line 10 and priority line 20, under the conditions that there are neither information transmission signal nor priority signal from other processors 1, 2..., thereby permitting the use of the transmission line.

6. 发明专利

JPS518842A RONRISOCHINO SHINDANHOSHIKI 失效
公开(公告)号：JPS518842A
公开(公告)日：1976-01-24
申请号：JP7841474
申请日：1974-07-09
申请人： HITACHI LTD
发明人： SHIMOTSUMA KEN , HINO MASASHI
IPC分类号： G06F11/22 , G06F11/00

7. 发明专利

JPS6133212B2 失效
公开(公告)号：JPS6133212B2
公开(公告)日：1986-08-01
申请号：JP1081979
申请日：1979-02-01
申请人： HITACHI LTD
发明人： SHIMOTSUMA KEN
IPC分类号： G06F3/02 , G06F3/048 , G06F3/14 , G06F3/153 , G06F9/00 , G09G1/00 , G09G5/00 , G09G5/22

8. 发明专利

JPS6015974B2 失效
公开(公告)号：JPS6015974B2
公开(公告)日：1985-04-23
申请号：JP10583877
申请日：1977-09-05
申请人： HITACHI LTD
发明人： SHIMOTSUMA KEN
IPC分类号： G06F13/00

9. 发明专利

JPS58129671A SYSTEM CONTROLLING SYSTEM 失效
公开(公告)号：JPS58129671A
公开(公告)日：1983-08-02
申请号：JP1162982
申请日：1982-01-29
申请人： HITACHI LTD
发明人： MURANO MASUO , SHIMOTSUMA KEN
IPC分类号： G06F9/00 , G06F15/163
摘要： PURPOSE:To enable collective system control in a multi-processing system without using a system console by performing information interchange of multiprocessing system. CONSTITUTION:Two operation processing systems 103, 104 are connected to console service processors (SVP) 110, 111 through CPU interfaces 112, 113. Console service processors 110, 111 are connected by an SVP interface 109 to perform information transfer between SVP 110 and 111. By this way, controlling function indicated by one console service processor can be processed by other console service processor, and a multiprocessing system can be controlled collectively.

10. 发明专利

JPS58127264A SERVICE PROCESSOR 失效
公开(公告)号：JPS58127264A
公开(公告)日：1983-07-29
申请号：JP1034882
申请日：1982-01-26
申请人： HITACHI LTD
发明人： SHIMOTSUMA KEN
IPC分类号： G06F15/177 , G06F15/17
摘要： PURPOSE:To operate an SVP.INTF from any side of two processors, by providing a processor interface circuit between two processors. CONSTITUTION:An SVP1 is directly connected to a CPU4 by a service processor interface 7, and also is connected to the CPU4 through an input/output control device (CH) 5 and a channel interface, by an I/O interface 8. The CPU4 and the CH5 are connected to a main storage device 6 by memory interfaces 10, 11, respectively. The SVP1 is constituted of two processors 2, 3, and the service processor interface 7 is connected to the processors 2 and 3 by one interface. Between the processors 2, 3, an inter-processor interface circuit is provided, and a command is outputted to the other processor optionally and its response is received, through the interface circuit under the control of a microprogram.

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