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    • 2. 发明专利
    • JAPANESE SENTENCE INPUT SYSTEM
    • JPS57191742A
    • 1982-11-25
    • JP7650681
    • 1981-05-22
    • HITACHI LTD
    • NAKAYAMA TAKESHIKUROSU MASAAKIOOSHIMA YOSHIMITSUFUJIKATA KENJIUCHIDA SHIGERUNAKASHIMA AKIRA
    • G06F17/21G06F3/00G06F3/01
    • PURPOSE:To make a character panel small-size and inexpensive, by indicating a square, which corresponds to a Kanji (chinese character) to be inputted, on the character panel to form the Kanji pattern and storing the Kanji pattern in a personal file and displaying it when this Kanji pattern does not exist on the character panel. CONSTITUTION:When coordinates (i, j) on a character panel 1 are indicated, a Kanji pattern corresponding to the code (i, j) is read out from a common file 12 and is displayed on a display device 15. When a Kanji pattern to be inputted exists on the character panel 1, the operator performs this opration. When a Kanji pattern to be inputted does not exist on the character panel, the operator depresses a register square of the character panel 1 and uses a region from coordinates (1, 1) to coordinates (24, 24) on the character panel 1 to depress positions marked with black circles in accordance with the character pattern to be inputted, and thus, the character pattern is displayed on the display device 15 in accordance with coordinates depressed on the character panel 1, and the Kanji pattern is written in a personal Kanji file 2 when the operator depresses the register square after completing the pattern.
    • 3. 发明专利
    • FUNCTION GENERATOR
    • JPS553054A
    • 1980-01-10
    • JP7536878
    • 1978-06-23
    • HITACHI LTD
    • FUJIKATA KENJIYOKOZAWA NORIO
    • G06K15/00G06F3/153G09G1/00G09G1/10G09G5/20
    • PURPOSE:To secure generation of a short-time ramp function with no error for the function generator which generates the ramp voltage, by installing the means comprising the memory or the like which sets the integrating time previously. CONSTITUTION:The difference signal between the terminating and starting voltage of the ramp function is produced at logic circuit 11 and then supplied to memory 15 along with the slope signal of the ramp function. The subtraction counter changes over switch 18 to the (b) side when the integrating time signal is supplied from memory 15 to set the counter. Thus the output voltage of D/A converter 14 is supplied to integrating amplifier 20, and at the same time the subtraction is carried out by the clock supplied from clock generator 17. When the contents of subtraction counter 16 becomes zero, switch 18 is changed over to the (a) side with the integrating output clamped near the target voltage level. And then the output is finally set to the target voltage level given from D/A converter 12.