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1. 发明专利

JPS61141247A Remote maintenance system test system of exchange 失效
标题翻译：远程维护系统测试系统
公开(公告)号：JPS61141247A
公开(公告)日：1986-06-28
申请号：JP26302384
申请日：1984-12-14
申请人： Fujitsu Ltd , Hitachi Ltd , Nec Corp , Nippon Telegr & Teleph Corp , Oki Electric Ind Co Ltd
发明人： SAITO JINKO , SUZUKI TOSHIAKI , AOKI TOSHIRO , WANAMI MASAO , INOUE SABURO
IPC分类号： H04M3/26 , H04Q1/26
CPC分类号： H04Q1/26
摘要： PURPOSE:To eliminate the need for a test means to a remote maintenance system by utilizing an input/output equipment at the exchange side as a test means so as to eliminate disabled test items. CONSTITUTION:Procedures specific to each input/output equipment, that is, those for input/output equipment number, edition of test data and input/output instruction, initial setting of tested equipment, execution of test and test result analysis relating to each input/output equipment are replaced into those for remote maintenance system in order to test the remote maintenance system from an exchange 1. Thus, the remote maintenance system is handled as an input/output equipment by the exchange side and the exchange 1 conducts the test of the remote maintenance system. Thus, an input/output interface (a) of the exchange 1, a part (c) connecting an exchange interface (b) of an exchange additional equipment 2, a part (d) connecting exchange additional equipments 2, 3, a part (e) connecting the equipments 3, 4 and a remote maintenance equipment 4 are tested.
摘要翻译：目的：通过在交换机侧使用输入/输出设备作为测试手段，消除对远程维护系统的测试手段的需要，以消除残留的测试项目。规定：每个输入/输出设备特定的程序，即输入/输出设备编号，测试数据和输入/输出指令的编辑，测试设备的初始设置，与每个输入/输出设备相关的测试和测试结果分析的执行，输出设备被替换为用于远程维护系统的设备，以便从交换机1测试远程维护系统。因此，远程维护系统由交换机作为输入/输出设备处理，交换机1进行测试远程维护系统。因此，交换机1的输入/输出接口（a），连接交换机附加设备2的交换接口（b）的部分（c），连接交换附加设备2,3的部分（d） e）连接设备3,4和远程维护设备4。

2. 发明专利

JPS61153717A SYSTEM RISE SELECTING AND SWITCHING SYSTEM 失效
公开(公告)号：JPS61153717A
公开(公告)日：1986-07-12
申请号：JP27379084
申请日：1984-12-27
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NEC CORP , HITACHI LTD , FUJITSU LTD
发明人： ISHIZUKA MASARU , SUZUKI TOSHIAKI , IGAWA IKUTOSHI , HAKAMATA HIDENORI , INOUE SABURO
IPC分类号： G06F1/00 , G06F9/06 , G06F11/14
摘要： PURPOSE:To shorten the system-down time at a system is abnormal, by providing an automatic rise file selecting and switching mechanism, on the outside of a data processor. CONSTITUTION:A data processing system 1 is providd with a central control equipment 2 and a restart signal generating circuit 3, and also provided with a counting circuit 5 for counting a restart signal sending-out circuit from an on-line system side. Moreover, a file device 8 is provided on the data processing system 1. In this state, when a system-down is generated in the course of operation of the data processing system, other control device of a redundant constitution continues its operation automatically. In such a case, a restart signal 4 is generated by the restart signal generating circuit 3, the number of times of its generation is counted by the counting circuit 5, and by the number of times of its reception within a prescribed time, a selection of a previous day file and a security file a nd a selection of a rise condition are executed, and a file load instruction to the data processing system is executed. In this processing system 1, a designated IPL system is operated by the file device 8 and a system program is loaded.

3. 发明专利

JPS54101151A RELAY 失效
公开(公告)号：JPS54101151A
公开(公告)日：1979-08-09
申请号：JP722478
申请日：1978-01-27
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , FUJITSU LTD
发明人： SUZUKI TOSHIAKI , SUZUKI HIDEO , SUZUKI HAJIME , MIKAMI NOBUO , NORIMOTO KAZUO
IPC分类号： H01H50/16 , H01H50/36

4. 发明专利

JPS5432005A SHUNTTTYPE CURRENT SWITCH SCANNING SYSTEM 失效
公开(公告)号：JPS5432005A
公开(公告)日：1979-03-09
申请号：JP9788377
申请日：1977-08-17
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , FUJITSU LTD
发明人： SUZUKI TOSHIAKI , UENO TAKAO , SAITOU JINKOU , ASAKURA JIYUNJI , MIYAKE YASUSHI
IPC分类号： H04Q3/72 , H04Q3/00
摘要： PURPOSE:To reduce the DC signal current flowing to the scanner side at the offhook time by blocking the AC induction vertical voltage in the case of the on-hook through insertion of the diode in series to the shunt resistance.

5. 发明专利

JPS53132921A SHUNTTTYPE CURRENTTSWITCHING SCANNING SYSTEM 失效
公开(公告)号：JPS53132921A
公开(公告)日：1978-11-20
申请号：JP4760477
申请日：1977-04-25
申请人： NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , OKI ELECTRIC IND CO LTD , FUJITSU LTD
发明人： YANAGISAWA TAKATOSHI , MIURA MASAMI , SUZUKI TOSHIAKI , TSUTSUMI TAKEHIKO , UEHARA KAZUE
IPC分类号： H04Q3/72 , H04Q3/00
摘要： PURPOSE:To prevent the error detection of a scanning circuit due to noises induced to a signal line, by flowing a noise current induced to the signal line only to a shunt circuit by giving a difference in supply voltage between the scanning circuit and shunt circuit.

6. 发明专利

JPS56165480A ORIGINATING CONNECTION SYSTEM FOR ENTRUSTED PUBLIC TELEPHONE CIRCUIT OF COIN THROW-IN TYPE 失效
公开(公告)号：JPS56165480A
公开(公告)日：1981-12-19
申请号：JP6884380
申请日：1980-05-26
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： TAGUCHI OSAO , KANAO SEIICHI , YAMAZAKI AKIO , SUZUKI TOSHIAKI , MURAKAMI TAKASHI
IPC分类号： H04Q3/555 , H04M17/00 , H04Q3/00
摘要： PURPOSE:To realize a direct call to a called subscriber without requiring the key operation of a truster, by switching the connection during in answer of a called subscriber from a talking line to a reversed polarity line when an originating connection is executed from a coin throuw-in type entrusted public telephone to an emergency report line. CONSTITUTION:A calling subscriber picks up a handset and dials the emergency report request number after throwing in the coins. Thus an emergency report trunk FPT is connected in a route of calling subscriber SUBA (A) line-LIN-TLN- FPT (A) line-called subscriber SUBB (B) line-FPT (B) line-TLN-LIN- SUBA (B) line. With an answer of the subscriber SUBB, a central processer CC switches connection for the call line like SUBA (A) line-LIN-TLN-FPT (C) line-SUBB (B) line-FPT (D) line-TLN-LIN-SUBA (B) line. Then the signals of the (A) line earth and the (B) line battery are transmitted to the public telephone of the calling subscriber. And a short circuit of the telephone receiver part is cancelled in the acceptable state of coin to permit talking.

7. 发明专利

JPS5427704A SCANNING MATRIX DEVICE 失效
公开(公告)号：JPS5427704A
公开(公告)日：1979-03-02
申请号：JP9356377
申请日：1977-08-03
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , HITACHI LTD
发明人： UEHARA KAZUE , ISHIZAWA AKIRA , TSUTSUMI TAKEHIKO , OGUCHI SEISHIROU , SUZUKI TOSHIAKI
IPC分类号： H04Q3/72 , H03K17/00 , H04Q3/00
摘要： PURPOSE:To obtain a matrix device which is prevented from malfunctioning due to a noise, by reducing the noise generated on a read wiring connected to a column reader circuit.

8. 发明专利

JPS545372A DSCHARGE CIRCUIT 失效
公开(公告)号：JPS545372A
公开(公告)日：1979-01-16
申请号：JP6980977
申请日：1977-06-15
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , FUJITSU LTD
发明人： SUZUKI TOSHIAKI , YANAGISAWA TAKATOSHI , MURAKAMI TOMOSHI , ONO CHIYUUKICHI , SEKI SHIYUUICHI
IPC分类号： H01H47/18 , H02M9/04 , H03K3/02 , H03K3/35 , H03K3/352 , H03K17/73
摘要： PURPOSE:To enable a constitution with the element of a small current capacity and thus to increase the mounting efficiency, by installing the discharge circuit element composed of the resistance and the thyristor in plural steps to the discharge circuit and then giving conduction to the thyristors sequentially according to the discharge amount of the electric charge.

9. 发明专利

JPS57204958A FILE MEMORY TRAP SYSTEM 失效
公开(公告)号：JPS57204958A
公开(公告)日：1982-12-15
申请号：JP9058981
申请日：1981-06-12
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , HITACHI LTD
发明人： INOUE AKIRA , SUZUKI TOSHIAKI , MUNAKATA HIDENAO , YAZAWA KATSUHIKO , MASUDA TAKESHI
IPC分类号： G06F12/16 , G06F11/28 , G06F12/00 , G06F12/08 , G06F13/00
摘要： PURPOSE:To realize the trap function, which acts upon a main storage device, for a file memory also, by detect the data transfer where data is transferred to a set file memory area. CONSTITUTION:In case that the trap operation is executed for the data access to an area B from an address A to an address C of a file memory 12, the processor 2 sets the address A to a trap address setting circuit 5 of a data channel device 4 and sets the area B to a trap area setting circuit 6. An adding and subtracting circuit 9 calculates the address C and sets it to a trap end address setting circuit 7. The device 4 sets an access address D from the memroy 12 to a file memory address setting circuit 8, and address subtractions A-D and C-D are executed in the circuit 9, and results are transferred to a trap detecting circuit 10. The circuit 10 sets an indication FF 3 through an indicating line 11 on a basis of results as shown in figure to report to the processor that the trap object area B is accessed.

10. 发明专利

JPS5843041A INFORMATION PROCESSOR 失效
公开(公告)号：JPS5843041A
公开(公告)日：1983-03-12
申请号：JP13924881
申请日：1981-09-05
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： MUNAKATA HIDENAO , SUZUKI TOSHIAKI , SAKURAI YOSHIO , FURUKAWA KAZUO , UKAWA YOSHIHIRO
IPC分类号： G06F9/34
摘要： PURPOSE:To simplify the program designing, by securing an alteration of the operation mode of an information processor which is based on a process of each word between the word address mode and the byte address mode. CONSTITUTION:An instruction based on a word access is read out to an instruction register IR from a memory device via a memory buffer register MBR. The instruction is decoded by a decoder DEC, and a switching signal is transmitted to each gate from a control circuit CTL in accordance with the decoded information. The circuit CTL is controlled by the switching signal given from a mode storing circuit MODE, and the gate open/close signal can be altered between the word address mode and the byte address mode. As a result, a process of each byte is possible to simplify the program designing without altering nor lowering the functions of various types of instructions in the word address mode.

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