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1. 发明专利

JP2008165355A Power source noise analysis model generating program and power source noise analysis model generating device 有权
标题翻译：电源噪声分析模型生成程序和电源噪声分析模型生成装置
公开(公告)号：JP2008165355A
公开(公告)日：2008-07-17
申请号：JP2006352084
申请日：2006-12-27
申请人： Fujitsu Ltd , 富士通株式会社
发明人： IWAKURA YOSHIYUKI , FUJIMORI SHOGO , HIRAI TENDO , SENDA HITOSHI , KANEI KAZUYOSHI , NIMURA KOTARO
IPC分类号： G06F17/50 , H05K3/00
CPC分类号： G06F17/5036 , G06F2217/78 , H05K1/0216 , H05K3/0005
摘要： PROBLEM TO BE SOLVED: To simplify a power source noise analysis model of a circuit board.
SOLUTION: The CAD data of a circuit board is acquired from a CAD device (Figure 3, S21), and power source islands which overlap with each other are extracted as a power source pair (S22), i.e., power source islands in the different layers of the circuit board. Nodes are arranged to the extracted power source pair, and the nodes of the power source pair are projected on the power source islands to which the power source pair belongs (S23). A mesh generation part 24 determines mesh areas, which surround the nodes, for each power source island, and an impedance computation part 25 computes impedances (L, R, C) between the nodes (S24). A model generation part 26 generates a power source noise analysis model based on the impedance between the nodes of the respective layers and the capacity between the layers (S25).
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：简化电路板的电源噪声分析模型。解决方案：从CAD设备获取电路板的CAD数据（图3，S21），提取彼此重叠的电源岛作为电源对（S22），即电源岛在电路板的不同层。节点被布置到提取的电源对，并且电源对的节点投影在电源对所属的电源岛上（S23）。网格产生部分24确定每个电源岛环绕节点的网格区域，并且阻抗计算部分25计算节点之间的阻抗（L，R，C）（S24）。模型生成部26基于各层的节点之间的阻抗和层之间的容量来生成电源噪声分析模型（S25）。版权所有（C）2008，JPO＆INPIT

2. 发明专利

JP2004334654A Power supply noise analytic model generation system, power supply noise analytic model generation method, and power supply noise analytic model generating program 审中-公开
公开(公告)号：JP2004334654A
公开(公告)日：2004-11-25
申请号：JP2003131529
申请日：2003-05-09
申请人： Fujitsu Ltd , 富士通株式会社
发明人： IWAKURA YOSHIYUKI , SATO TOSHIAKI , KANEI KAZUYOSHI , SENDA HITOSHI , NIMURA KOTARO
IPC分类号： G06F17/50 , H05K1/02 , H05K3/00
CPC分类号： G06F17/5036 , H05K1/0216 , H05K3/0005
摘要： PROBLEM TO BE SOLVED: To provide a power supply noise analytic model generation device for modeling a power supply layer, considering various conditions of a circuit board. SOLUTION: This device comprises a CAD data acquisition part 11; a CAD data conversion processing part 12 for converting CAD data to data suitable to power supply noise analysis; a power supply pair extraction processing part 14; a mesh division processing part 15 for dividing the power supply pair area by meshes; a wave pattern processing part 16 for arranging a wave pattern that is the wave surface of electromagnetic waves radiated onto the power supply pair area from an element on the power supply pair area; a node arrangement processing part 18 for arranging a plurality of nodes on the power supply pair area; a node area determination processing part 19 for determining a node area; an LRC determination processing part 20 for calculating L, R and C for connecting nodes; a power supply layer model generation processing part 21; and power supply noise analytic model generation processing part 23. COPYRIGHT: (C)2005,JPO&NCIPI

3. 发明专利

JP2014137829A Storage device, sweep motion control method and sweep motion control program 有权
标题翻译：存储设备，SWEEP运动控制方法和SWEEP运动控制程序
公开(公告)号：JP2014137829A
公开(公告)日：2014-07-28
申请号：JP2013005000
申请日：2013-01-15
申请人： Fujitsu Ltd , 富士通株式会社
发明人： NIMURA KOTARO , ABE MARIE , NAKAMURA MASATOMO , KONTA YOSHIHITO
IPC分类号： G11B21/02 , G06F3/06 , G11B19/14
CPC分类号： G06F3/06 , G06F3/061 , G06F3/0659 , G06F3/0689
摘要： PROBLEM TO BE SOLVED: To avoid delay of response for a host device.SOLUTION: A storage device 1 comprises: storage units 25 and 26 comprising multiple disks 41 and storing every disk 41 information whether the disk has a redundancy configuration; a disk determination unit 241 determining multiple disks 41 having a redundancy configuration from the multiple disks 41 on the basis of the information stored in the storage units; and a sweep execution control unit 243 controlling an execution timing of a sweep operation smoothing lubricant with a head to be one disk 41 at the same period for the multiple disks 41 determined by the disk determination unit 241.
摘要翻译：要解决的问题：避免延迟主机设备的响应。解决方案：存储设备1包括：存储单元25和26，其包括多个盘41并且存储每个盘41信息盘是否具有冗余配置; 盘决定单元241根据存储在存储单元中的信息确定具有来自多个盘41的冗余配置的多个盘41; 以及扫描执行控制单元243，对于由盘确定单元241确定的多个盘41，以与头相同的时间段的头为一个盘41的扫描操作平滑润滑剂的执行定时。

4. 发明专利

JP2013041394A Storage device and method of controlling the same 有权
标题翻译：存储装置及其控制方法
公开(公告)号：JP2013041394A
公开(公告)日：2013-02-28
申请号：JP2011177489
申请日：2011-08-15
申请人： Fujitsu Ltd , 富士通株式会社
发明人： ABE MARIE , NIMURA KOTARO
IPC分类号： G06F3/06 , G06F3/08
CPC分类号： G06F3/0611 , G06F3/0619 , G06F3/0647 , G06F3/0689 , G06F11/108 , G06F11/1096 , G06F11/1662 , G06F11/2056 , G06F11/2069 , G06F11/2094
摘要： PROBLEM TO BE SOLVED: To restrain a plurality of storage media from reaching those upper limits of the number of times of writing at the same time.SOLUTION: A storage device includes: a selection section 1d for calculating a difference between the number of times of writing to a storage media 1a-1 and the number of times of writing to a storage media 1a-2 to set the difference as a first difference, and calculating a difference between the number of times of writing to the storage media 1a-1 and the number of times of writing to a storage media 1a-3 after copying data in the storage media 1a-2 to the storage media 1a-3 to set the difference as a second difference, and selecting the second storage media 1a-2 in which the second difference is larger than the first difference as an object to be replaced; and a setting change section 1e for copying the data stored in the storage media 1a-2 selected as the object to be replaced to the storage media 1a-3, changing a setting of the second storage media 1a-2 to one as a preliminary, and changes a setting of the storage media 1a-3 to one as a data writing designation.
摘要翻译：要解决的问题：为了限制多个存储介质同时达到写入次数的上限。解决方案：存储装置包括：选择部分1d，用于计算写入存储介质1a-1的次数与写入存储介质1a-2的次数之间的差异以设定差异作为第一差别，并且在将存储介质1a-2中的数据复制到存储介质1a-1之后，计算写入存储介质1a-1的次数与写入存储介质1a-3的次数之间的差异介质1a-3将差设定为第二差，并且选择其中第二差大于第一差的第二存储介质1a-2作为要替换的对象; 以及设置改变部分1e，用于将存储在被替换的对象的存储介质1a-2中存储的数据复制到存储介质1a-3，将第二存储介质1a-2的设置改为一个作为初步，并将存储介质1a-3的设置改变为一个作为数据写入指定。版权所有（C）2013，JPO＆INPIT

5. 发明专利

JP2014186412A Controller, storage device, and control program 有权
标题翻译：控制器，存储设备和控制程序
公开(公告)号：JP2014186412A
公开(公告)日：2014-10-02
申请号：JP2013059325
申请日：2013-03-22
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KOBAYASHI HIDESHI , KONTA YOSHIHITO , ITO JUN , NIMURA KOTARO , ABE MARIE , TOJO MIHOKO , NAKAMURA MASATOMO
IPC分类号： G06F3/06
CPC分类号： G06F12/0223 , G06F3/0601 , G06F12/0868
摘要： PROBLEM TO BE SOLVED: To reduce performance deterioration of write processing in a storage device which stores unit data with first size in data areas with second size different from the first size.SOLUTION: A controller comprises: an assignment processing section 14 which assigns data areas of a storage device 5 to a plurality of storage areas of data blocks with first size, and assigns the same data blocks with the first size to the plurality of data areas of the storage device 5; a management section 13 which manages management information showing data storage states of the plurality of storage areas of the data blocks with the first size in the respective data areas; a write area determination section 11a which determines one data area from among the plurality of data areas on the basis of the management information on the plurality of data areas assigned to the data blocks for write; and a write processing section 11b which generates write data with second size different from the first size including data on the data blocks for write and writes the write data in the one data area.
摘要翻译：要解决的问题：为了减少存储装置中的写入处理的性能下降，该存储装置在第二大小不同于第一尺寸的数据区域中存储具有第一尺寸的单元数据。解决方案：控制器包括：分配处理部分14，其分配数据区域将存储装置5的数据块分配给具有第一大小的数据块的多个存储区域，并将与第一大小相同的数据块分配给存储装置5的多个数据区域; 管理部13，管理表示各数据区域中具有第一大小的数据块的多个存储区域的数据存储状态的管理信息; 写区域确定部分11a，其基于分配给用于写入的数据块的多个数据区域的管理信息，从多个数据区域中确定一个数据区域; 以及写入处理部分11b，其生成具有不同于第一大小的第二大小的写入数据，该数据包括用于在一个数据区域中写入和写入写入数据的数据块上的数据。

6. 发明专利

JP2014010709A Storage control device, program thereof and method thereof 有权
标题翻译：存储控制设备，其程序及其方法
公开(公告)号：JP2014010709A
公开(公告)日：2014-01-20
申请号：JP2012147876
申请日：2012-06-29
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KONTA YOSHIHITO , NIMURA KOTARO , ABE MARIE
IPC分类号： G06F3/06 , G06F13/10
CPC分类号： G06F13/1689 , G06F13/10 , G06F13/385
摘要： PROBLEM TO BE SOLVED: To prevent a response delay to an access request regarding a random access under a condition that an access request regarding a sequential access to a storage device and an access request regarding a random access thereto are mixed.SOLUTION: In accordance with a result of comparing a ratio of the number of command issues in response to an access request having a random property to the number of command issues in response to an access request having a sequential property with a threshold, a command given first identification information for instructing a storage device to determine an execution order of commands issued to the storage device or a command given second identification information for instructing the storage device to execute commands in an order of the commands received by the storage device is generated and the generated command is issued to the storage device. When an acquired access request has the random property, a time period until a response from the storage device comes since a command is issued is measured and in accordance with a result of comparing a current measurement time period with a previous measurement time period, the threshold is adjusted to prevent the response delay.
摘要翻译：要解决的问题：在与存储装置的顺序访问有关的访问请求和关于其随机访问的访问请求混合的条件下，防止对随机访问的访问请求的响应延迟。解决方案：根据响应于具有具有顺序性质的具有阈值的访问请求，响应于具有随机属性的访问请求的命令问题的数量与命令问题的数量的比率的比较的结果;给出用于指示的第一标识信息的命令生成用于确定向存储装置发出的命令的执行顺序的存储装置，或者产生用于指示存储装置按照由存储装置接收的命令的顺序执行命令的第二识别信息的命令，并且生成的命令被发布到存储设备。当获取的访问请求具有随机属性时，测量直到发出命令之后来自存储装置的响应的时间段，并且根据将当前测量时间段与先前测量时间段进行比较的结果，阈值被调整以防止响应延迟。

7. 发明专利

JP2014010519A Control device, storage device, control method, and control program 有权
标题翻译：控制设备，存储设备，控制方法和控制程序
公开(公告)号：JP2014010519A
公开(公告)日：2014-01-20
申请号：JP2012144969
申请日：2012-06-28
申请人： Fujitsu Ltd , 富士通株式会社
发明人： ABE MARIE , NIMURA KOTARO , KONTA YOSHIHITO
IPC分类号： G06F3/06 , G06F13/10
CPC分类号： G06F3/0604 , G06F3/0653 , G06F3/0659 , G06F3/0689
摘要： PROBLEM TO BE SOLVED: To suppress the occurrence of data transfer delay due to transfer of CREDIT BLOCKED for notifying a transmission side of the fact that reception of data is not possible.SOLUTION: A control device includes: a reference information setting unit 15 that sets a comparison reference value on the basis of a response time to a command issued to a transmission destination 60; and a suppression unit 14 that compares, during issuance of the command, the comparison reference value with a difference data amount that is a difference between an issuance data amount related to the command being issued to the transmission destination and a response data amount related to data in the response, and when the difference data amount exceeds the comparison reference value, suppresses the issuance of the command.
摘要翻译：要解决的问题：抑制由于传输CREDIT BLOCKED而导致的数据传输延迟的发生，用于通知发送侧无法接收数据的事实。解决方案：控制装置包括：参考信息设置单元15，其设置基于对发送目的地60发出的指令的响应时间的比较基准值; 以及抑制单元14，其在发布命令期间将比较参考值与作为发送到发送目的地的命令的发行数据量与与数据相关的响应数据量之间的差的数据量进行比较在响应中，并且当差异数据量超过比较参考值时，禁止发出命令。

8. 发明专利

JP2010086011A Power supply noise analysis model creation method, power supply noise analysis model creation apparatus, and power supply noise analysis model creation program 有权
标题翻译：电源噪声分析模型创建方法，电源噪声分析模型创建装置和电源噪声分析模型创建程序
公开(公告)号：JP2010086011A
公开(公告)日：2010-04-15
申请号：JP2008250920
申请日：2008-09-29
申请人： Fujitsu Ltd , 富士通株式会社
发明人： FUJIMORI SHOGO , NIMURA KOTARO , HIRAI TENDO
IPC分类号： G06F17/50 , H05K3/00
CPC分类号： G06F17/5036 , H05K3/0005 , H05K2201/09663
摘要： PROBLEM TO BE SOLVED: To provide a model creation method capable of creating a model for obtaining an analysis result, on which the shape of a via clearance hole provided on a circuit board is reflected, as the model creation method for analysis of noise caused by a power supply conductor or the like of a multilayer circuit board. SOLUTION: Nodes are generated in four oblique directions of a via as nodes as a reference for dividing a power supply island or the like into meshes for model creation for analysis of noise caused by a power supply conductor or the like of a multilayer circuit board. COPYRIGHT: (C)2010,JPO&INPIT

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