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1. 发明专利

JP2008139046A Resistance measuring method and component inspecting process 有权
标题翻译：电阻测量方法和组件检测过程
公开(公告)号：JP2008139046A
公开(公告)日：2008-06-19
申请号：JP2006322949
申请日：2006-11-30
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HIRATSUKA YOSHIAKI , IKEDA AKIO , SUZUKI MASAHARU
IPC分类号： G01R27/02
CPC分类号： G01N27/20
摘要： PROBLEM TO BE SOLVED: To provide a resistance measuring method for accurately measuring an electrical resistance of a plate material formed with a film on its surface, and a component inspecting process to which the resistance measuring method is applied.
SOLUTION: In a first step, objects to be measured such as two zinc plating steel plates 1a, 1b respectively formed with the films on their surfaces are prepared, an elastic conductive material 10 is interposed between two zinc plating steel plates 1a, 1b as the objects to be measured, and a spacer 11 for regulating a gap between two zinc plating steel plates 1a, 1b is also interposed. In a second step, the electrical resistance is measured between two objects 1a, 1b to be measured in a state that the elastic conductive material 10 is interposed.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于精确测量其表面上形成有膜的板材的电阻的电阻测量方法以及应用电阻测量方法的部件检查过程。解决方案：在第一步骤中，制备分别在其表面上形成有两个镀锌钢板1a，1b的被测量物体，弹性导电材料10插入在两个镀锌钢板1a，作为测量对象物1b，还插入用于调节两个镀锌钢板1a，1b之间的间隙的间隔件11。在第二步骤中，在插入有弹性导电材料10的状态下，测量要测量的两个物体1a，1b之间的电阻。版权所有（C）2008，JPO＆INPIT

2. 发明专利

JP2014182762A Design support device, via addition method, program and printed circuit board 有权
标题翻译：设计支持设备，通过添加方法，程序和打印电路板
公开(公告)号：JP2014182762A
公开(公告)日：2014-09-29
申请号：JP2013058634
申请日：2013-03-21
申请人： Fujitsu Ltd , 富士通株式会社
发明人： NAGASE KENJI , HIRATSUKA YOSHIAKI , NAKAO TOMOYUKI , SAWADA YOSHIHIRO , NAKAMURA KEISUKE
IPC分类号： G06F17/50 , H05K1/02 , H05K3/00
CPC分类号： H05K3/0005 , G06F17/5072 , H05K1/115
摘要： PROBLEM TO BE SOLVED: To provide a technique that allows more speedy determination of an arrangement of a via to be added to a printed circuit board for EMI suppression.SOLUTION: An input/output part 11 inputs CAD data 2 that represents a designed printed circuit board, and setting data 3 that allows identification of a protection area length of an influence range of a via to be added. A via addition object area retrieval part 12 sets a protection area length, and identifies a via addition object area for adding a via to an SG via addition part 13. The SG via addition part 13 sets a start point within the via addition object area, and moves the search point in spiral from the set start point, through determining whether or not to add a via to the search point after the move, so as to determine a location of a via to be added.
摘要翻译：要解决的问题：提供一种能够更快速地确定要添加到印刷电路板以用于EMI抑制的通孔的布置的技术。解决方案：输入/输出部分11输入表示设计的印刷电路的CAD数据2 以及允许识别要添加的通孔的影响范围的保护区域长度的设置数据3。通过加法对象区域检索部分12设置保护区域长度，并且通过加法部分13识别用于将通道添加到SG的经过加法对象区域.S SG经由加法部分13设置经过加法对象区域内的起始点，并且通过确定在移动之后是否将搜索点添加到搜索点，从而从设定的开始点将螺旋的搜索点移动，以便确定要添加的通道的位置。

3. 发明专利

JP2007234032A Electronic device and casing 审中-公开
标题翻译：电子设备和机箱
公开(公告)号：JP2007234032A
公开(公告)日：2007-09-13
申请号：JP2007087333
申请日：2007-03-29
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HIRATSUKA YOSHIAKI , YOKOMIZO SHINICHI
IPC分类号： G06F1/16 , H05F3/02 , H05K9/00
摘要： PROBLEM TO BE SOLVED: To provide an environment-friendly electronic device capable of obtaining a sufficient noise prevention effect at low cost and a casing for realizing this electronic device. SOLUTION: The housing for installing an electronic circuit in it is provided with a component exposing part in which a portion of a conductive component mounted in the casing is exposed to the outside, a plate part made of a conductive material with prescribed thickness and spread from the component exposing part at a distance, and a bridge part extended along the component exposing part to electrically connect the plate part and the conductive component together and provided with the total thickness larger than the thickness of the plate part. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供能够以低成本获得足够的防噪声效果的环境友好的电子设备和用于实现该电子设备的壳体。解决方案：用于在其中安装电子电路的壳体设置有部件暴露部分，其中安装在壳体中的导电部件的一部分暴露于外部，由具有规定厚度的导电材料制成的板部分并且从部件曝光部分延伸一定距离，以及桥接部分沿着部件暴露部分延伸，以将板部分和导电部件电连接在一起并提供总厚度大于板部件厚度的总厚度。版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2005276957A Printed circuit board 审中-公开
标题翻译：印刷电路板
公开(公告)号：JP2005276957A
公开(公告)日：2005-10-06
申请号：JP2004085781
申请日：2004-03-23
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HIRATSUKA YOSHIAKI , TANAKA YOSHIRO
IPC分类号： H05K9/00 , H05K1/00 , H05K1/02 , H05K1/18
CPC分类号： H05K1/0218 , H05K1/0298 , H05K1/181 , H05K2201/0715 , H05K2201/0723
摘要： PROBLEM TO BE SOLVED: To provide a printed circuit board that can improve resistance to electrostatic noise, achieve the cost reduction of a device and make the device light in weight.
SOLUTION: A shield pattern layer 2 is stacked and formed on the surface layer side of a wiring pattern layer including a large-width pattern 1 exceeding 1 mm of a wiring width, and a shield pattern 3 is formed in the shield pattern layer 2 in a manner that it may be overlaid on at least the large-width pattern 1 when viewed from the top, and may be grounded without being connected with the other pattern layers through an internal layer.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供可以提高抗静电噪声的印刷电路板，实现装置的成本降低并使装置重量轻。解决方案：屏蔽图案层2层叠并形成在布线图案层的表面层侧，该布线图案层包括布线宽度超过1mm的大图案1，并且屏蔽图案3形成在屏蔽图案中层2以从顶部观察时可以至少覆盖在大尺寸图案1上的方式，并且可以在不通过内层与其它图案层连接的状态下接地。版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP2013250808A Information processing method, apparatus, and program for noise counterplan design inspection 有权
标题翻译：信息处理方法，装置和程序的噪声计数器设计检查
公开(公告)号：JP2013250808A
公开(公告)日：2013-12-12
申请号：JP2012125398
申请日：2012-05-31
申请人： Fujitsu Ltd , 富士通株式会社
发明人： NAKAO TOMOYUKI , HIRATSUKA YOSHIAKI , NAKAMURA KEISUKE , SAWADA YOSHIHIRO , NAGASE KENJI
IPC分类号： G06F17/50 , G01R29/08
CPC分类号： G06F17/5081 , G06F2217/82
摘要： PROBLEM TO BE SOLVED: To shorten an inspection time of an EMC counterplan design.SOLUTION: A plurality of noise counterplan design inspections to a plurality of nets provided on a substrate includes: processing of performing, for each of the nets, a first noise counterplan design inspection in an execution order determined on the basis of another noise counterplan design inspection that can be omitted in a case of passing inspection; and processing of performing a next noise counterplan design inspection if the next noise counterplan design inspection that cannot be omitted exists in an execution order determined on the basis of at least the inspection result of a noise counterplan design inspection that has been performed immediately before.
摘要翻译：要解决的问题：缩短EMC计划设计的检查时间。解决方案：对设置在基板上的多个网络的多个噪声计划设计检查包括：对于每个网络执行第一噪声计划根据另一个噪声计划设计检查确定的执行顺序进行设计检查，在通过检查的情况下可以省略; 以及如果基于至少已经执行的噪声计划设计检查的检查结果确定的执行顺序而存在不能够省略的下一个噪声计划设计检查，则执行下一个噪声计划设计检查的处理。

6. 发明专利

JP2007201026A Electronic device 审中-公开
标题翻译：电子设备
公开(公告)号：JP2007201026A
公开(公告)日：2007-08-09
申请号：JP2006015634
申请日：2006-01-24
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HIRATSUKA YOSHIAKI
IPC分类号： H05K9/00
摘要： PROBLEM TO BE SOLVED: To obtain an electronic device of simple structure in which user-friendliness and shield performance are enhanced.
SOLUTION: In the electronic device, discharge of electromagnetic wave from an opening 3 for work into the element mounting portion 2 in the case 1 of the device is prevented by a lid member 4 for closing the opening 3 for work. A tightening protrusion 6 is provided on any one of the lid member 4 and the periphery of the opening 3 for work such that it can be thrusted into a receiving portion 5 formed on the other, and the lid member 4 is thrusted into the case 1 of the device.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了获得提高用户友好性和屏蔽性能的简单结构的电子设备。解决方案：在电子设备中，通过用于封闭用于工作的开口3的盖构件4来防止电磁波从设备的开口3放电到装置的壳体1中的元件安装部分2。在盖构件4和开口3的周围的任何一个上设置有紧固突起6，用于工作，使得其能够被推入形成在另一个上的接收部分5中，并且盖构件4被推入到壳体1中的设备。版权所有（C）2007，JPO＆INPIT

7. 发明专利

JP2004055988A Information processing apparatus 审中-公开
公开(公告)号：JP2004055988A
公开(公告)日：2004-02-19
申请号：JP2002214069
申请日：2002-07-23
申请人： Fujitsu Ltd , 富士通株式会社
发明人： YOSHINAGA HISASHI , HIRATSUKA YOSHIAKI , YAMAGUCHI MASANORI
IPC分类号： G06F1/16 , H01R13/658 , H05K7/14 , H05K9/00
CPC分类号： H01R13/6582 , H01R12/721
摘要： PROBLEM TO BE SOLVED: To provide an information processing apparatus in which an electromagnetic interference is suppressed. SOLUTION: An SG pattern 11a is provided around an outer-most layer of a printed circuit board 11 to connect the SG pattern 11a and a frame ground of a casing 31 by earth plates 21 so that an interval of connecting points becomes shorter than a prescribed interval determined from a wavelength of a signal. The earth plates are located on three sides except for one side where a connector mounting plate 25 is located, and the printed circuit board 11 is held between leaf spring-like contacts 21a. The mounting plate 25 is connected to the SG pattern 11a and electrically conducted with the earth plates. COPYRIGHT: (C)2004,JPO

8. 发明专利

JP2013191098A Shield inspection device, shield inspection program and shield inspection method 有权
标题翻译：屏蔽检查装置，屏蔽检查程序和屏蔽检查方法
公开(公告)号：JP2013191098A
公开(公告)日：2013-09-26
申请号：JP2012057904
申请日：2012-03-14
申请人： Fujitsu Ltd , 富士通株式会社
发明人： SAWADA YOSHIHIRO , NAGASE KENJI , HIRATSUKA YOSHIAKI , NAKAO TOMOYUKI , NAKAMURA KEISUKE
IPC分类号： G06F17/50
CPC分类号： G01R29/0835
摘要： PROBLEM TO BE SOLVED: To provide a shield inspection device, a shield inspection program and a shield inspection method which can quickly perform inspection of the electro-magnetic compatibility with respect to wires to be protected.SOLUTION: A grouping unit 30 groups closely arranged wires to be protected from among a plurality of wires to be protected by a shield and arranged on a circuit board. A division unit 31 divides, for each of the grouped groups, a region around the group on the circuit board into a plurality of divided regions. A determination unit 32 determines the existence of a shield for each of the divided regions.
摘要翻译：要解决的问题：提供一种屏蔽检查装置，屏蔽检查程序和屏蔽检查方法，其可以快速地对待保护的电线进行电磁兼容性的检查。解决方案：分组单元30将紧密排列的导线被保护以防止被屏蔽并被布置在电路板上的多根电线中。分割单元31对于每个分组组，将电路板上的组周围的区域划分为多个分割区域。确定单元32确定每个分割区域的屏蔽的存在。

9. 发明专利

JP2012073972A Design check program, design check device and design check method 有权
标题翻译：设计检查程序，设计检查设备和设计检查方法
公开(公告)号：JP2012073972A
公开(公告)日：2012-04-12
申请号：JP2010220207
申请日：2010-09-30
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HIRATSUKA YOSHIAKI , SAWADA YOSHIHIRO , NAGASE KENJI , NAKAO TOMOYUKI , NAKAMURA KEISUKE
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/5036 , G06F2217/82 , H05K1/023 , H05K3/0005
摘要： PROBLEM TO BE SOLVED: To provide a design check program, a design check device and a design check method that are capable of easily determining appropriate implementation of a countermeasure component.SOLUTION: A design check program causes a computer to execute processes: to determine countermeasure components 2A and 2B within a prescribed range 5 from a terminal 4 of a reference component 1 based on design data; to determine whether terminals of the determined countermeasure components 2A and 2B are electrically connected to the terminal 4 of the reference component 1 based on the design data; and to determine that the countermeasure components 2A and 2B are appropriately implemented if the terminals of the determined countermeasure components 2A and 2B are electrically connected to the terminal 4 of the reference component 1.
摘要翻译：要解决的问题：提供能够容易地确定对策组件的适当实现的设计检查程序，设计检查装置和设计检查方法。解决方案：设计检查程序使计算机执行处理：基于设计数据从参考组件1的终端4确定在规定范围5内的对策组件2A和2B; 确定所确定的对策组件2A和2B的终端是否基于设计数据电连接到参考组件1的终端4; 并且如果所确定的对策组件2A和2B的终端电连接到参考组件1的终端4，则确定对策组件2A和2B被适当地实现。版权所有：（C）2012，JPO＆INPIT

10. 发明专利

JP2012073817A Design support device, method, and program for printed circuit board 有权
标题翻译：印刷电路板的设计支持设备，方法和程序
公开(公告)号：JP2012073817A
公开(公告)日：2012-04-12
申请号：JP2010218146
申请日：2010-09-29
申请人： Fujitsu Ltd , 富士通株式会社
发明人： NAGASE KENJI , SAWADA YOSHIHIRO , HIRATSUKA YOSHIAKI , NAKAO TOMOYUKI , NAKAMURA KEISUKE
IPC分类号： G06F17/50 , H05K3/00
CPC分类号： G06F17/5081 , G06F2217/82
摘要： PROBLEM TO BE SOLVED: To provide a design support device, capable of extracting a ground pattern to which a designer of a printed circuit board needs to pay attention from a viewpoint of ESD countermeasure.SOLUTION: A design support device for a printed circuit board comprises: a frame ground extraction part which extracts a ground pattern residing on a surface layer of a substrate and connecting to metal components from design data stored in a design data storage part, and stores information to specify the ground pattern in the design data storage part; an electrostatic discharge determination part which determines electrostatic discharge to the ground pattern specified from the information stored in the data storage part, and stores the determination result in a determination result storage part; and an output part which outputs the determination result stored in the determination result storage part.
摘要翻译：要解决的问题：为了提供一种设计支持装置，能够从ESD对策的角度提取印刷电路板的设计者需要注意的接地图案。解决方案：用于印刷电路板的设计支持装置包括：框架接地提取部分，其提取驻留在基板的表面层上的接地图案，并从存储在设计数据存储部分中的设计数据连接到金属部件，并存储用于指定设计数据存储部中的接地图案的信息; 静电放电确定部，其根据从所述数据存储部存储的信息确定对所述接地图案的静电放电，并将所述判定结果存储在判定结果存储部中; 以及输出部，其输出存储在判定结果存储部中的判定结果。版权所有（C）2012，JPO＆INPIT

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