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    • 4. 发明专利
    • Method of managing congestion of communication between processors
    • 管理处理器之间通信的方法
    • JPS6120485A
    • 1986-01-29
    • JP14030184
    • 1984-07-06
    • Fujitsu Ltd
    • KOSUGE TAKAHARUKISHIMOTO KUNIYUKI
    • H04Q3/545G06F15/16G06F15/177H04M3/36
    • H04M3/365
    • PURPOSE:To facilitate priority process management by segmenting transaction for congestion from transaction for general use to use it for communication of higher urgency, and at the same time, reporting to the other processor that own processor is in the state of congestion, and limiting subsequent communication between processors only to communication of high urgency. CONSTITUTION:When a transaction 36 for general use arrives at a state of use excess of predetermined quantity, number of use is counted from a table 37 and compared in a comparator 39 and if the quantity exceeds predetermined quantity, a noticeof abnormality is given. On the other hand, the transaction for priority 34 is caught successively by receiving of priority process request, and when it is filled up, specified quantity of area for transaction for congestion transaction 36 and abnormality notice are segments from transaction for general use and allotted as transaction for congestion, and notice of congestion is sent to other terminal. When the notice of congestion is given, other processor, for instance a main processor MPR2 receives the notice of congestion, and thereafter withholds making communication of general process.
    • 目的:通过将交易中的交易分段交易用于一般用途以将其用于更紧急的通信来促进优先级过程管理,同时向拥有处理器的其他处理器报告处于拥塞状态,并限制后续 处理器之间的通信只能通信高度紧迫。 构成:当一般使用的交易36达到超过预定数量的使用状态时,使用数量从表37计数,并在比较器39中进行比较,如果数量超过预定量,则给出异常通知。 另一方面,通过接收到优先级处理请求,优先级34的交易被连续地捕获,并且当它被填满时,拥堵交易36的交易区域的指定数量和异常通知是用于一般使用的交易的段,并被分配为 拥堵交易和拥堵通知发送给其他终端。 当给出拥塞通知时,其他处理器,例如主处理器MPR2接收到拥塞通知,然后保留进行一般处理的通信。
    • 5. 发明专利
    • IPL SYSTEM IN MULTIPROCESSOR SYSTEM
    • JPH07253960A
    • 1995-10-03
    • JP4542494
    • 1994-03-16
    • FUJITSU LTD
    • KISHIMOTO KUNIYUKI
    • G06F15/16G06F9/445G06F15/177
    • PURPOSE:To eliminate an increase in the load of initial program loading(IPL) processing on one processor in the multiprocessor system and shorten the IPL time by making a processor which requests IPL obtain divided IPL information from other plural processors whose loads are not heavy at that point of time. CONSTITUTION:Once the processor 3 which generates the IPL request reports IPL generation, a processor MPRI which has IPL management information transfers the IPL management information in response. The IPL generating processor 3 receives it and discriminates processors having information to be initially loaded, acquires a system states from those processors and selects processors which have load margins, and divides and allocates the IPL information to the respective processors, so that the IPL information is transferred from the respective processors. The IPL requesting processor 3 receives the IPL information from the processors and stores it in an external storage device 3a.
    • 6. 发明专利
    • SYSTEM SUPERVISORY SYSTEM
    • JPH03208138A
    • 1991-09-11
    • JP297690
    • 1990-01-09
    • FUJITSU LTD
    • KISHIMOTO KUNIYUKI
    • G06F11/30H04M3/26
    • PURPOSE:To flexibly correspond to the function development of an information processing system by resetting a supervisory timer in accordance with a reset order from the information processing system even in the middle of an IPL processing in which a response cannot be made to an external supervisory device. CONSTITUTION:An IPL circuit operates by the depression of an IPL key in a central control equipment CC 40, an IPL program (PG) in a common line signal device 51 is read by a main memory 45 and is started. The input terminal of a channel 55 contained with a signal transmission-only memory 53 is connected with the input terminal of the channel 55 contained with the external supervisory device 60 and a communication signal (b) between an electronic exchange system and a host computer is set. The reset order from IPLPG is inputted to a reception part 61, the counter value of the supervisory timer 65 is reset and a control part 63 updates the timer 65. Thus, IPLPG periodically resets the timer 65 at a timing which does not exceed supervisory time. Thus, the count value of the timer 65 is prevented from exceeding a prescribed value even in the middle of the IPL processing.
    • 7. 发明专利
    • DETECTING SYSTEM FOR ACCESS VIOLATION
    • JPH02166540A
    • 1990-06-27
    • JP32509788
    • 1988-12-20
    • FUJITSU LTD
    • KISHIMOTO KUNIYUKI
    • G06F12/14G06F9/46
    • PURPOSE:To study the factors of access violations in a short time by detecting all access violations and at the same time grasping the internal state of an information process system at each time point when the access violation occurred. CONSTITUTION:An access violation detecting area setting means 300 assings a memory area decided previously in adjacency to a memory block as an access violation detecting area in case a memory block catching function 100 assigns the memory blocks to the tasks respectively. Then the access violation detecting area is set as an area to be monitored by a trap function 200. An information collecting means 400 collects the information showing the internal state of an information process system 1 in case the means 400 detects a fact that the system 1 had an access to the access violation detecting area. An access violation detecting area release means 500 releases the access violation detecting area assigned by the means 300 when the system 1 finishes the execution of a task. Thus it is possible to grasp the internal state of the system 1 at occurrence of an access violation and to perform the study for the violation factor in a short time.
    • 8. 发明专利
    • ERROR GENERATION DATA RECOVERING SYSTEM
    • JPH0291748A
    • 1990-03-30
    • JP24690688
    • 1988-09-28
    • FUJITSU LTD
    • KISHIMOTO KUNIYUKI
    • G06F12/16
    • PURPOSE:To recover error generation data by the memory contents of an external memory device without stopping a service executed by an information processing system when the error generation data is extracted from a main memory device by providing a data transfer means for storing the data in an error generation address of the main memory device. CONSTITUTION:An address converting means 200 converts an error generation address ae on a main memory device 2 in which error data (de) obtained by detecting the generation of an error by a detecting function 100 is stored, to an address alphac in which normal data dc corresponding to error generation data de is stored in an external memory device 4. Subsequently, a data transfer means 300 extracts the normal data dc from the address alphac converted by the address converting means 200 of the external memory device 4 and stores it in the error generation address ae of the main memory device 2. In such a manner, the error generation data stored in the main memory device can be recovered immediately by the corresponding normal data of the external memory device.
    • 10. 发明专利
    • Increasing method in multi-control type exchanging system
    • 多控制式交换系统中的增加方法
    • JPS61139183A
    • 1986-06-26
    • JP26064184
    • 1984-12-12
    • Fujitsu Ltd
    • AKIBA YOSHITAKAKISHIMOTO KUNIYUKINAKAYAMA HIDEOSAITO SHUJINODA MICHITAKA
    • H04M3/24H04Q3/545
    • H04Q3/545H04M3/241
    • PURPOSE:To use an existintg I/O device as it is without preparing an increasing test I/O device by recognizing an increasing call processing processor by referring an increasing flag through a basic control program in a main processor. CONSTITUTION:A central control device 24 in a main processor (MPR)11 commands a channel device 23 so as to connect a relevant channel connecting adapter (CCA)16-k (and 15-k) to an I/O bus 17 of an MPR. Further, from a key board KB, a command isagain inputted and a performing of a diagnosis of CCA(16-k, 15-k) for a call processing processor CPRk is indicated to an MPR11. In this manner, an increasing system CCA is subject to a diagnosis. A diagnosis result is displayed on a video display unit VDU of a console 19 and presence or absence of abnormality according to the diagonosis is recog nized. If there is an abnormality, an analysis of the abnormality is done, and a repair is done (retry). If there is no abnormality, or the repair is completed, a next step is to be done.
    • 目的:通过在主处理器中通过基本控制程序引用增加的标志来识别增加的呼叫处理处理器来使用现有的I / O设备,而不需要准备增加的测试I / O设备。 构成:主处理器(MPR)11中的中央控制装置24命令通道装置23,以将相关通道连接适配器(CCA)16-k(和15-k)连接到I / O总线17 MPR。 此外,从键盘KB,输入命令,并且向MPR11指示对呼叫处理处理器CPRk的CCA(16-k,15-k)的诊断的执行。 以这种方式,增加系统CCA进行诊断。 诊断结果显示在控制台19的视频显示单元VDU上,并且识别出根据对角线是否存在异常。 如果发生异常,则进行异常分析,进行修理(重试)。 如果没有异常,或修理完成,下一步要做。