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1. 发明专利

JPH09191309A MULTI-CAST COMMUNICATION SYSTEM 失效
公开(公告)号：JPH09191309A
公开(公告)日：1997-07-22
申请号：JP130496
申请日：1996-01-09
申请人： FUJITSU LTD
发明人： OGURA TAKAO , AMAMIYA SHIGEO , FUJII TAIKI , NAKAJO TAKAFUMI
IPC分类号： H04L12/28
摘要： PROBLEM TO BE SOLVED: To provide a multi-cast communication system that allows each terminal equipment to make communication with a source in communication with other terminal without caring about multi-cast communication with respect to the multi-cast communication system. SOLUTION: Plural terminal equipments 2 and a host 1 are connected in the multi-cast communication system. The host 1 is provided with a respectively means 1 receiving a communication request from each terminal equipment 2 and a communication state management table 20 storing a type of a source 3, a group ID corresponding to it, and a terminal equipment number making communication with information from the source 3. The host 1 makes multi-cast communication according to the content of the communication state management table 20.

2. 发明专利

JPH0964873A BRANCH SYSTEM IN THE UNIT OF TRANSFER INFORMATION 失效
公开(公告)号：JPH0964873A
公开(公告)日：1997-03-07
申请号：JP21462395
申请日：1995-08-23
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： MATSUDA YUICHI , AMAMIYA SHIGEO , SHINOMIYA TOMOHIRO , KOMINE HIROAKI , WATANABE YUTAKA
IPC分类号： H04L12/70 , H04L12/28 , H04L12/931
摘要： PROBLEM TO BE SOLVED: To add a branch function to an existing device without remarkable revision by registering in advance prescribed information such as branch start setting. SOLUTION: The branch system in the unit of transfer information has a path setting conversion means 2, a path conversion table 4 referenced by the path setting conversion means 2, and a path distribution means 6. A reflected output 6A and a branch output 6B are provided to the path distribution means 6 and a reflected input 2A and a branch input 2b are provided to a path setting conversion means 2, respectively. Furthermore, a copy means 8 is provided among the reflected output 6A, the reflected input 2A and the branch input 2B, branch start setting information is registered in advance to the path conversion table 4 and number of reflected setting information and branch setting information by a branch number is registered in advance.

3. 发明专利

JPH07312609A ALARM MASK PROCESSING SYSTEM 失效
公开(公告)号：JPH07312609A
公开(公告)日：1995-11-28
申请号：JP10526194
申请日：1994-05-19
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： AMAMIYA SHIGEO , MATSUDA YUICHI , OGURA TAKAO , FUJII TAIKI , TEZUKA KOJI , UEDA HIROMI , UEMATSU HITOSHI
IPC分类号： H04Q3/00 , H04J3/14 , H04L12/28 , H04L12/24 , H04L12/26
摘要： PURPOSE:To provide an alarm mask system for realizing alarm priority processing or alarm inhibit processing at an ATM transmitter with respect to the system for performing the mask processing of an alarm. CONSTITUTION:At the ATM transmitter, a virtual path/virtual channel received through an interface part 2 on the transmission side is switched by a switch part 1 and transmitted through an interface part 3 on the transmission side. In this case, when any alarm with high priority is detected or received at the interface part 2 on the reception side, an alarm cell is transmitted after an in-device tag is added. Thus, by detecting this in-device tag, the detection of an alarm with low priority to be generated based on the alarm with high priority is inhibited at the interface part 3 on the transmission side.

4. 发明专利

JPH05244187A 失效
公开(公告)号：JPH05244187A
公开(公告)日：1993-09-21
申请号：JP2837292
申请日：1992-02-14
申请人： NIPPON TELEGRAPH & TELEPHONE , NEC CORP , HITACHI LTD , FUJITSU LTD
发明人： UEDA HIROMI , AKUTSU KENJI , IKEMATSU RYUICHI , KURANO TAKANORI , ASHI MASAHIRO , NAKANO YUKIO , NAKAJO TAKAFUMI , AMAMIYA SHIGEO
IPC分类号： H04L12/70 , H04Q11/04 , H04L12/48
摘要： PURPOSE:To make a cyclic monitoring without deteriorating the throughput by monitoring cyclic cells generated with the use of the unrequired SDH overhead area from the SDH terminal. CONSTITUTION:A signal terminated in a SDH terminal section 31 is converted from an intra-device frame 11 into an intra-device frame 12 in a cyclic cell generation section 32. In short, removing the SOH and POH of the intra-device frame 11, and the cyclic cell generated in the constant cycle is inserted into the section. The cycle of generating the cyclic cell is an intra-device frame phase, and in this case, it represents the insertion in the STM-N two-frame cycle. Further, a monitoring pattern insertion section 33 detects the cyclic cell from the intra-device frame phase and the monitoring pattern written in the cyclic cell is collated by a monitoring pattern collation section 34 to make an intra-device monitoring. Then a STM constitution section 35 establishes the STM-N frame after abolishing the cyclic cell.

5. 发明专利

JPH04263198A MEMORY DEVICE 失效
公开(公告)号：JPH04263198A
公开(公告)日：1992-09-18
申请号：JP4577791
申请日：1991-02-18
申请人： FUJITSU LTD
发明人： HOSHINO TSUTOMU , SATO KAZUMI , AMAMIYA SHIGEO , AZUMA MITSUHIRO , TEZUKA KOJI
IPC分类号： G06F12/16 , G11C16/02 , G11C16/06 , G11C17/00 , G11C29/00 , G11C29/04
摘要： PURPOSE:To realize a memory device which is constituted of a nonvolatile memory and a volatile memory, which can examine whether a data has been written accurately or not in the nonvolatile memory by reading out the data and which can leave the data in the nonvolatile memory as soon as the data is generated while the data is being examined regarding the memory device which stores a hysteresis data. CONSTITUTION:A master CPU 1 and a slave CPU 2 are used. The master CPU 1 stores data generated instantaneously in large quantities and at high speed in a volatile memory 3 once and, after that, is used only for a write operation 'so as to be copied at each chip in a nonvolatile memory 4. The slave CPU 2 reads out the data at each chip of the nonvolatile memory 4, confirms the write life of each memory chip and rewrites them in another region in the memory chip when the life has expired. Hysteresis data which are generated instantaneously in large quantities and at high speed can be stored immediately without omission and, even when a power supply is dropped, the hysteresis at the point of time can be left.

6. 发明专利

JPH0313027A BURST SIGNAL RECEIVING METHOD 失效
公开(公告)号：JPH0313027A
公开(公告)日：1991-01-22
申请号：JP14744889
申请日：1989-06-09
申请人： FUJITSU LTD
发明人： IGUCHI KAZUO , AMAMIYA SHIGEO , TEZUKA KOJI
IPC分类号： H04L25/06 , H04L12/40 , H04L25/38
摘要： PURPOSE:To improve the code error rate characteristic by using a burst signal start position detection means of a reception section to obtain a start position or an end position of an identified and regenerated burst signal and eliminating the DC component of an AC coupling capacitor of an AC coupling amplifier at the positions. CONSTITUTION:The leading position of a signal of each channel is found with a slot channel start point identification circuit 22. Then a switch SW whose contact is placed across the AC coupling capacitor C of an AC coupling amplifier 13 at the obtained leading position is turned ON to discharge the DC component, thereby making the DC component due to an adjacent channel zero. Thus, the effect of the DC component of the adjacent channel is eliminated. Thus, the code error rate characteristic is improved and a preamble length is decreased to effectively utilize a transmission medium.

7. 发明专利

JPH02111134A DECENTRALIZED TYPE CUEING COMMUNICATION SYSTEM 失效
公开(公告)号：JPH02111134A
公开(公告)日：1990-04-24
申请号：JP26462188
申请日：1988-10-20
申请人： FUJITSU LTD
发明人： AMAMIYA SHIGEO , TEZUKA KOJI , SHINOMIYA TOMOHIRO , IGUCHI KAZUO , SOEJIMA TETSUO
IPC分类号： H04L12/28
摘要： PURPOSE:To eliminate the need for an insertion means to an outgoing transmission line by providing an operation request signal area (r) to a packet sent from a master station to an outgoing transmission line and reflecting a data of the operating request signal area R sent from an incoming transmission line at a demultiplex section and a multiplex section and writing the data to the said area (r). CONSTITUTION:With a communication request arisen, slave stations 1, 2, 3 write an operating request signal to the operation request signal area R of a 2nd packet from branch insertion means 1-1, 2-1, 3-1 of an incoming transmission line 10. Then the passing of idle data channels by the number of operating request signals at the downstream of the incoming transmission line 10 from its own station is calculated and the data is written in the succeeding idle data channel. Then in order to make an operation state signal area B busy, a data and a signal representing the data channel busy state are sent via the branch insertion means 1-1, 2-1 and 3-1. Thus, it is possible to eliminate the insertion means to the outgoing transmission line and when the system is applied especially for the optical transmission line, number of photocouplers is decreased to attain the inexpensive system.

8. 发明专利

JPH01235433A OPTICAL BUS COMMUNICATION SYSTEM 失效
公开(公告)号：JPH01235433A
公开(公告)日：1989-09-20
申请号：JP6021288
申请日：1988-03-16
申请人： FUJITSU LTD
发明人： SOEJIMA TETSUO , IGUCHI KAZUO , AMAMIYA SHIGEO , KOMINE HIROAKI , SHINOMIYA TOMOHIRO
IPC分类号： H04B10/27 , H04B10/07 , H04B10/278 , H04L12/40
摘要： PURPOSE:To prevent out of synchronism from occurring in a high-order equipment when a terminal equipment is connected or non-connected to an optical bus communication system by adjusting phases between the path of an optical switch. CONSTITUTION:For connecting the terminal equipment 6 to a T line 2, levels are divided into a phase adjusting level and a connection level which is to completely connect the terminal equipment 6 to the T line 2 after the phase is adjusted so as to drive the optical switch 41. First, a phase adjusting circuit 62 adjusts the phases until the sum of a signal from a first input terminal A, which has been synthesized in an output terminal (d) and an inverted phase adjusting signal becomes zero. When the adjustment of the phases completes, the phase adjusting circuit 62 outputs control voltages X and Y so that only a first path generated in an input terminal (c) and an output terminal (b), and a second path generated in the input terminal A and the output terminal (b) are generated. Even if the terminal equipment 6 is branched for the T2 line or disconnected (or connected or non-connected), instantaneous cut with respect to a high-order terminal equipment or a network terminal equipment is prevented from occurring.

9. 发明专利

JPH01233939A COMMUNICATION TERMINAL NUMBER PROVISION TYPE COMMUNICATION SYSTEM 失效
公开(公告)号：JPH01233939A
公开(公告)日：1989-09-19
申请号：JP6148088
申请日：1988-03-15
申请人： FUJITSU LTD
发明人： KOMINE HIROAKI , AMAMIYA SHIGEO , SHINOMIYA TOMOHIRO , IGUCHI KAZUO , SOEJIMA TETSUO
IPC分类号： H04L12/40
摘要： PURPOSE:To assign a channel efficiently to a communication terminal equipment and to make the succeeding communication smooth by devising the system such that an identification number if provided to each communication terminal equipment based on a specific number set to a receptacle in a passive bus communication system. CONSTITUTION:In case of accessing a master set 1 from a communication terminal equipment 2-1, the communication terminal equipment 2-1 reads its specific number from a receptacle 4-1 connected thereto and issues a request to the master set 1 by using the read specific number as its own identification number. The master set 1 decides the propriety of the use of a channel with respect to the access from the communication terminal equipment 2-1 and outputs a reply to the communication terminal equipment 2-1. On the other hand, if the communication terminal equipment 2-1 is disconnected from the receptacle 4-1 and connected to a different receptacle, the communication terminal equipment 2-1 reads a receptacle designation signal from the master set 1 and the communication terminal equipment 2-1 outputs a replay to the master set 1 for the access when the number designated from the master set 1 and the connected receptacle number just now are coincident.

10. 发明专利

JPS63256025A PHASE SYNCHRONIZING CIRCUIT 失效
公开(公告)号：JPS63256025A
公开(公告)日：1988-10-24
申请号：JP9041087
申请日：1987-04-13
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： AMAMIYA SHIGEO , OKUMURA YASUYUKI
IPC分类号： H04J3/06 , H04L7/00 , H04L7/08 , H04L12/40
摘要： PURPOSE:To avoid frame synchronizing step-out by judging it as the presence of missing of clocks when a frame phase is moved in a timing generated by a timing signal generating circuit so as to insert the clock to a pulse generating circuit. CONSTITUTION:A reception data RD is outputted from a receiver and inputted to a frame phase detection circuit FDET. The frame phase detection circuit detects the phase of frame and outputs a pulse RF at each frame phase. The pulse FR and an output clock CLK are given to a timing signal generating circuit TM-GEN and outputs a timing T1 representing the moving range of the pulse RF making the extraction of clock possible and a timing T2 representing the moving range of the pulse RF making the insertion of clock possible. Since a mask generating circuit MSK-GEN outputs the mask normally, the output MSK keeps '1'. Thus, no inserted/extracted clock exists and the outputted clock CLK is the clock itself generated by the clock generator CK- GEN.

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