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1. 发明专利

JPH1098473A METHOD AND DEVICE FOR CONTROLLING TRAFFIC 失效
公开(公告)号：JPH1098473A
公开(公告)日：1998-04-14
申请号：JP25025196
申请日：1996-09-20
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： IDE SHOTARO , NISHIKAWA KOJI , OTA SHINJI , KOYANAGI TOSHINORI , YAMASHITA TAKASHI
IPC分类号： H04Q3/00 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To reduce required memory capacity by expressing a minimum cell interval among traffic monitor parameters and a minimum cell interval among parameters to be used for finding the output time of cells through a traffic shaper in one common parameter. SOLUTION: A minimum cell interval T and a minimum cell interval T to be used for the shaper are expressed in the common parameter and after a violation is discriminated, CDV are immediately reduced. When real arrival time Ta of a cell is later than time based on theoretical rules, this cell is judged as a suitable cell and after TAT is changed to current time, the TAT is updated. When this arrival time is ealier, the difference between the theoretical cell arrival time TAT and the cell arrival time ta is compared with the level relation of a CDV allowable value 7τu and it is discriminated whether this cell is suitable or not. When the TAT-ta is larger than the τu, this cell is abandoned as a non-suitable cell but when the TAT-ta is smaller than the τu, shaping is performed as the suitable cell within an allowable range. Thus, the number of parameters to be stored can be reduced by two.

2. 发明专利

JPH10164062A FAULT MONITORING METHOD FOR ARITHMETIC CIRCUIT 失效
公开(公告)号：JPH10164062A
公开(公告)日：1998-06-19
申请号：JP31916496
申请日：1996-11-29
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： IDE SHOTARO , KOYANAGI TOSHINORI , NISHIKAWA KOJI , IWASE RYOICHI
IPC分类号： G06F11/00 , H04L12/24 , H04L12/26 , H04L12/70 , H04L12/813 , H04L12/815 , H04L12/863 , H04M3/28 , H04M3/36 , H04Q3/00
摘要： PROBLEM TO BE SOLVED: To easily use a method in common to polishing and shaping without depending on algorithm with a small hardware scale by using an OH generation cell which is periodically generated at the time of converting an ATM cell format into a format in a device from the format of a transmission line. SOLUTION: Parameters for monitoring OH(overhead) generation cell are previously set for respective memories 42-45 and 401. A header detection part 40 identifies the cells. In the case of the OH generation cell, an OH generation cell period monitoring part 400 monitors an arriving period. When it is a regulated period, the parameters for OH generation cell are sequentially read from the respective memories 42-45 and 401 and the fault is monitored. When a polishing operation is executed and the cell is judged to be illegal in a conformity test and when a cell interval after shaping is not similar to that of the cell, it is judged that abnormality occurs in the arithmetic circuit. Thus, the increase of a circuit scale is small and miniaturization can be executed.

3. 发明专利

JP2008059266A Image processing apparatus 有权
标题翻译：图像处理设备
公开(公告)号：JP2008059266A
公开(公告)日：2008-03-13
申请号：JP2006235272
申请日：2006-08-31
申请人： Fujitsu Ltd , 富士通株式会社
发明人： NAKAMURA MASAYUKI , ADACHI MAKOTO , YONEMOTO TAKANE , NISHIKAWA KOJI
IPC分类号： G06T15/04
摘要： PROBLEM TO BE SOLVED: To provide an image processing apparatus capable of improving the drawing speed by averting the caching of texture data from an external memory to a cache memory which can interrupt the high-speed operation of texture mapping.
SOLUTION: The image processing apparatus is provided with a control part 31 for determining whether a texture data utilization rate is a boundary value or larger in each triangle to which a texture is to be pasted, validating the cache memory 15 when the using rate is the boundary value or larger, and invalidating the cache memory 15 when the using rate is smaller than the boundary value, so that the caching of the texture data from the external memory 5 to the cache memory 15 will be executed, only when the texture data using rate of the triangle to which the texture is pasted is the boundary value or larger, and the caching will not be executed, when the utilization rate is smaller than the boundary value.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够通过避免将纹理数据从外部存储器缓存到可以中断纹理映射的高速操作的高速缓存存储器来提高绘制速度的图像处理装置。解决方案：图像处理装置设置有控制部分31，用于确定纹理数据利用率是否是要粘贴纹理的每个三角形中的边界值或更大，当使用时，对高速缓存存储器15进行验证速率是边界值或更大，并且当使用率小于边界值时使高速缓冲存储器15无效，使得将仅执行从外部存储器5到高速缓冲存储器15的纹理数据的缓存使用纹理粘贴的三角形的纹理数据使用边界值以上，当利用率小于边界值时，不执行缓存。版权所有（C）2008，JPO＆INPIT

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