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1. 发明专利

JP2000059466A METHOD AND APPARATUS FOR POWER SUPPLY INTERRUPT DETECTION 失效
公开(公告)号：JP2000059466A
公开(公告)日：2000-02-25
申请号：JP22792498
申请日：1998-08-12
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NEC CORP , HITACHI LTD , FUJITSU LTD
发明人： KOMATSU KAZUTOSHI , SASAKI HIDEHIRO , YAMANO SEIICHI , KAWAKAMI HIROTO , KUDO TOSHIYUKI , ICHIKAWA HIDEKAZU , TENTOU TAKEYUKI , SHIMIZU MOTOAKI , OMORI SHOICHI , KIKUCHI AKIRA
IPC分类号： H04L29/00 , H04L29/14
摘要： PROBLEM TO BE SOLVED: To prevent misjudge of power interrupt. SOLUTION: A subscriber line terminator 70 transmits a data frame including power state information to an intra-station line terminator 60. The intra-station line terminator 60 detects out of synchronism of data frames to be sent based on power supply state information of m-sets of the data frames among the transmitted data frames. Interrupt of power supply is discriminated, when number of data frames whose power supply state information indicates power interrupt information among the m-sets of data frames when they satisfy a majority decision, based on respective power supply state information of the m-sets of preceding data frames to n-sets of data frames monitored in the past by forward protection processing that is made, when of synchronization is detected.

2. 发明专利

JPH07212280A SELF-DIAGNOSTIC SYSTEM FOR COMMUNICATION EQUIPMENT 失效
公开(公告)号：JPH07212280A
公开(公告)日：1995-08-11
申请号：JP242794
申请日：1994-01-14
申请人： FUJITSU LTD
发明人： OMORI SHOICHI
IPC分类号： H04B3/46 , H04B3/493
摘要： PURPOSE:To detect a fault inside a communication equipment and to diagnose an entire communication interface unit as well without disturbing service even during a normal operation. CONSTITUTION:This system is provided with a collating means 25 for comparing and collating a transmitting signal to be transmitted from the side of a transmitter 21 of a communication line interface unit 2 to a counter equipment 5 and the reflected wave of a transmitted signal sneaked through a hybrid device 23, which connects the communication line interface unit 2 and a communication line 4, to the side of a receiver 22 of the communication line interface unit 2 and a judging means 26 for judging the normal/abnormal states of the transmitter 21, receiver 22 and hybrid device 23 at least based on the compared and collated result from the collating means 25 regardless of whether it is under communication service or not.

3. 发明专利

JPH0583852A INTERFACE CIRCUIT PROVIDED WITH OVERVOLTAGE PROTECTIVE CIRCUIT 失效
公开(公告)号：JPH0583852A
公开(公告)日：1993-04-02
申请号：JP26890391
申请日：1991-09-20
申请人： FUJITSU LTD
发明人： OMORI SHOICHI
IPC分类号： H02H9/04 , H04B3/00 , H04L12/40
摘要： PURPOSE:To prevent the impedance characteristics in high frequency region from deteriorating due to an overvoltage protective element while protecting the device against an overvoltage to be applied inadvertently from the outside. CONSTITUTION:An overvoltage protective circuit 4 is provided witch a micro voltage limiting circuit 4-2, having a micro clamp voltage and a small equivalent stray capacity as compared with an overvoltage protective element 4-1, connected in series with the overvoltage protective element 4-1.

4. 发明专利

JPH0522352A UNDERSHOOT ELIMINATION CIRCUIT FOR PULSE WAVEFORM 失效
公开(公告)号：JPH0522352A
公开(公告)日：1993-01-29
申请号：JP19712291
申请日：1991-07-11
申请人： FUJITSU LTD
发明人： OMORI SHOICHI , FURUKAWA YUKIO , OI MASAKAZU , TAKADA AKIHIKO
IPC分类号： H03K5/01 , H03K5/08 , H03K17/30 , H04L25/02 , H04L25/03
摘要： PURPOSE:To provide a high impedance to the circuit regardless of the presence of an undershoot elimination means at the measurement of an impedance at non-signal transmission. CONSTITUTION:A pulse transmission circuit 1 is provided with a pulse transformer driving circuit 11 showing a high impedance at non-signal transmission and a pulse transformer 12. The circuit 12 is provided with an undershoot elimination means 131 and a voltage controlled switching means 132 connecting to the undershoot elimination means 131 and the pulse transformer is used to eliminate an undershoot of a pulse waveform caused in a load 2.

5. 发明专利

JPH0512143A FAULT DETECTION SYSTEM FOR DOUBLE-CURRENT BUS 失效
公开(公告)号：JPH0512143A
公开(公告)日：1993-01-22
申请号：JP16536591
申请日：1991-07-05
申请人： FUJITSU LTD
发明人： ISHIBASHI RYOICHI , TACHIBANA TETSUO , OMORI SHOICHI
IPC分类号： G06F11/00 , G06F11/30 , G06F13/00 , H04Q11/04
摘要： PURPOSE:To quickly detect the occurrence of a fault in a DQDB system control. CONSTITUTION:Plural terminal devices 13 are connected to a double-current bus 2 consisting of a down-bus 2a and an up-bus 2b from a network termination device 1, and a data transmission processing part 8, a down-bus processing part 10a and a fault detection part 12 are provided within the terminal devices 13. When a data transmission request is made by the data transmission processing part 8, the fault detection part 12 actuates a timer 11 to count the lapse of a certain time period. When the request has not been transmitted after a lapse of a certain time period, that is, when the request is not written in the request bit 3 of a cell 7 and not transmitted in the down-bus processing part 10a, the fault of the bus is detected.

6. 发明专利

JPH04363946A METHOD AND DEVICE FOR DETECTING PN PATTERN FOR REMOTE LOOPBACK TEST 失效
公开(公告)号：JPH04363946A
公开(公告)日：1992-12-16
申请号：JP17281691
申请日：1991-07-12
申请人： FUJITSU LTD
发明人： OMORI SHOICHI
IPC分类号： H04L29/14
摘要： PURPOSE:To provide the method and device capable of immediately detecting a PN pattern independently of the state of detection start or of the detecting state. CONSTITUTION:This device is provided with a reception data holding means 10 receiving a length of a bit (n-bit) being part of a PN pattern sent from an opposite data line terminator and generated according to a specific generation polynomial, an arithmetic means 11 generating a pattern of a succeeding n-bit from the received n-bit pattern and a comparison means 12 comparing the succeeding n-bit pattern with the received n-bit pattern to generate a prescribed signal in response to the result of comparison.

7. 发明专利

JPH04280147A LOOPBACK TEST SYSTEM FOR SUBSCRIBER'S EQUIPMENT 失效
公开(公告)号：JPH04280147A
公开(公告)日：1992-10-06
申请号：JP4212891
申请日：1991-03-08
申请人： FUJITSU LTD
发明人： OMORI SHOICHI
IPC分类号： H04L29/14 , H04L12/26
摘要： PURPOSE:To replace a loopback test instruction sent from a maintenance center and out of scope by a function of a tested subscriber's equipment with other test instruction while an in-station equipment does not grasp the kind of a loopback test function provided with the subscriber's equipment. CONSTITUTION:An in-station equipment 1 is provided with a test instruction detection means 2 monitoring a test instruction sent from a maintenance center 6 to a subscriber's equipment 7 and detecting a 1st loopback test instruction, a reply information detection means 3 detecting regular reply information to the 1st loopback test instruction from reply information of the subscriber's equipment 7 with respect to the test instruction, a discrimination means 4 monitoring the output of the test instruction detection means 2 and the reply information detection means 3 and outputting an instruction replacement control signal when regular reply information is not detected in a lapse of a prescribed time after the 1st loopback test instruction is detected, and a replacement instruction transmission means 5 outputting a 2nd loopback test instruction to the subscriber's equipment 7 when the instruction replacement control signal is received.

8. 发明专利

JPH01314045A ERROR CORRECTING CIRCUIT 失效
公开(公告)号：JPH01314045A
公开(公告)日：1989-12-19
申请号：JP14527188
申请日：1988-06-13
申请人： FUJITSU LTD
发明人： ISHII YOSHINORI , OMORI SHOICHI
IPC分类号： H04L1/08
摘要： PURPOSE:To detect a period of one and same byte data required for majority decision processing without being affected by a bit error by invalidating a dissidence detection signal if the detection of dissidence of a consecutive byte data is consecutive for at least two bytes. CONSTITUTION:A repetitive period detection means 110 is provided with a dissidence state detection means 111. If the detection of dissidence of consecutive byte data is consecutive at least for 2 bytes, the dissidence discrimination signal is invalidated while being taken as the bit error in the dissidence state detection means 111. Thus, the repetitive period of the same byte data required for the majority decision processing is detected without being affected due to its bit error in the period decision processing of the means 110 in such a way.

9. 发明专利

JPH08125643A PHASE COMPARISON TYPE BIT SYNCHRONIZATION ESTABLISHING CIRCUIT 失效
公开(公告)号：JPH08125643A
公开(公告)日：1996-05-17
申请号：JP25560994
申请日：1994-10-20
申请人： FUJITSU LTD
发明人： OMORI SHOICHI , ISHII YOSHINORI
IPC分类号： H04J14/08 , H04J3/06 , H04L7/02 , H04L7/033 , H04L7/10
摘要： PURPOSE: To recover data normally even in the presence of disturbance in the phase comparison type bit synchronization establishing circuit establishing bit phase synchronization of a transmission signal sent by the TDMA system. CONSTITUTION: Plural phase shift means 11 shift a phase of a prescribed burst signal in a received frame respectively and a bit phase synchronization means 12 takes synchronization of bit phase, a decision means 13 decides an optimum phase shift means and a 1st selection output means 14 selects and outputs a prescribed burst signal whose phase is shifted by the optimum phase shift means. On the other hand, a storage means 15 stores an identification code of the phase shift means decided by the decision means 13 and a burst signal in succeeding reception frames or over corresponding to a prescribed burst signal is shifted by the phase shift means whose identification code is stored in the storage means 15 and a 2nd selection output means 16 selects data subject to bit phase synchronization by the bit phase synchronization means 12 and outputs the data as bit recovery data.

10. 发明专利

JPH07212506A TERMINAL FEEDING SYSTEM 失效
公开(公告)号：JPH07212506A
公开(公告)日：1995-08-11
申请号：JP242694
申请日：1994-01-14
申请人： FUJITSU LTD
发明人： OMORI SHOICHI
IPC分类号： H04M19/08
摘要： PURPOSE:To provide a terminal feeding system which can detect a shorting fault on a user's wiring in a subscriber's terminal equipment by providing a circuit detecting the state of overcurrent based on the output of an overcurrent restriction circuit. CONSTITUTION:When overcurrent occurs in feeding from an external feeding part 113, the overcurrent detection circuit 1 provided in the subscriber's terminal equipment 111 detects the overcurrent state through the overcurrent restriction circuit 136 stopping feeding in the equipment ill and detects the shorting of a feeding route. Thus, it becomes possible that the shorting fault on the user's line, which occurs in an S/T interface 120 can not be detected in the circuit 1. When the circuit l detects overcurrent based on the output of the circuit 136, it is desirable to output a detection signal to a display part 2, for example, and work removing the shorting fault can be executed.

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