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1. 发明专利

JPH08213981A SIMPLE 1:N CONGESTION CONTROL METHOD 失效
公开(公告)号：JPH08213981A
公开(公告)日：1996-08-20
申请号：JP1587795
申请日：1995-02-02
申请人： FUJITSU LTD
发明人： HATANO TAKASHI
IPC分类号： G06F13/00 , H04L12/00 , H04L12/18 , H04L29/08
摘要： PURPOSE: To not only simultaneously transmit a congestion report to terminals but also avoid recongestion after congestion release by providing logical independent lines between a host and plural terminals in the logical 1:n communication between the host and plural terminals. CONSTITUTION: For the purpose of simplifying the congestion report, logical independent lines 4 are provided between a host equipment 1 and plural terminal equipments 21 to 2n besides signal lines 3, and a mechanism to make the congestion report in the general broadcasting system is provided to report the congestion. The congestion report is not transmitted to signal lines 3 together with data but is transmitted by logical independent lines 4 independently of data. In the recongestion avoiding method, the independent line 4 of the host equipment 1 is provided with a congestion counter 7 which counts the number of data and transmits it to the terminal side, and the independent line 4 on the terminal equipment side is provided with a congestion register 8 which receives the number of data transmitted from the congestion counter on the host equipment side. The count or the congestion counter 7 is reduced after congestion release and is gradually increased, and thereby, the terminal equipment side receives the count by the congestion counter a to control the data to the host side.

2. 发明专利

JPH0549079A ZERO DATA CONVERSION SYSTEM 失效
公开(公告)号：JPH0549079A
公开(公告)日：1993-02-26
申请号：JP20103991
申请日：1991-08-12
申请人： FUJITSU LTD
发明人： TAKANO RYOJI , MISE KIYOBUMI , MORITA SUMIE , HATANO TAKASHI
IPC分类号： H04L7/00 , H04L25/49 , H04Q3/545 , H04Q11/04
摘要： PURPOSE:To relieve a load of an exchange to the utmost by validating a zero data conversion means to a digital communication line. CONSTITUTION:In an exchange 200 provided with a zero data conversion means 301 converting a zero datum in which logic 0 bits are consecutive by a prescribed number or over into a conversion datum in which logic 0 bits are not consecutive by a prescribed number or over and sending the data to a digital communication line 100 and inversely converting the conversion data arrived from the digital communication line into the zero datum, a line terminator 300 accommodating the digital communication line to the exchange is provided with the zero data conversion means 301.

3. 发明专利

JPH04319843A SUBSCRIBER CIRCUIT TEST SYSTEM 失效
公开(公告)号：JPH04319843A
公开(公告)日：1992-11-10
申请号：JP8797091
申请日：1991-04-19
申请人： FUJITSU LTD
发明人： TAKANO RYOJI , HATANO TAKASHI , KATO MIHARU , MISE KIYOBUMI , MORITA SUMIE
IPC分类号： H04M1/30 , H04M3/24 , H04M3/26
摘要： PURPOSE:To clearly identify the factor of the abnormality that is detected with confirmation of the normality of a subscriber telephone set, a subscriber line, a subscriber circuit, a connection line, and a subscriber controller, etc. CONSTITUTION:A test connection means 200 is provided to a subscriber controller 5 to connect an incoming call to a prescribed subscriber telephone set 11 if a call is transmitted from a subscriber telephone set 1 connectef via a subscriber circuit 3 in a state where the controller 5 has no function for connection to a message channel device 100. Then the means 200 displays the identification information on the telephone set 1 whose incoming call is connected to the telephone set 11 or can connect the incoming calls to the telephone set 11 when the subscriber telephone set except the telephone set 11 transmit the calls in a prescribed sequence.

4. 发明专利

JPH04222140A MAINTENANCE COMMUNICATION CONTROL SYSTEM FOR ISDN SERVICE 失效
公开(公告)号：JPH04222140A
公开(公告)日：1992-08-12
申请号：JP40524490
申请日：1990-12-21
申请人： FUJITSU LTD , FUJITSU COMMUNICATION SYST
发明人： MORITA SUMIE , HATANO TAKASHI , TAKANO RYOJI , KOGA TAKASHI , SHIOMITSU TSUTOMU
IPC分类号： H04M3/24 , H04Q11/04
摘要： PURPOSE:To efficiently control a communication control state so as not to increase a processing load between a main system and a packet sub system concerning the maintenance communication control system for terminating call control information and packet information distributedly at respective terminal equipments and establishing the consistency of the communication control state between the respective terminal equipments. CONSTITUTION:Between first and second terminal equipments 101 and 102, based on a LAPD, a maintenance link 10 is spreaded on the same path as the path of transmitting packet information 108 of a subscriber between the first and second terminal equipments 101 and 102, for example. In the respective first and second terminal equipments, first and second communication state control means 104 and 105 are provided to execute control for holding the consistency of the communication state between the both terminal equipments by exchanging communication state control information 106 while using the maintenance link.

5. 发明专利

JPH04153853A INPUT/OUTPUT CONTROLLER 失效
公开(公告)号：JPH04153853A
公开(公告)日：1992-05-27
申请号：JP27984990
申请日：1990-10-18
申请人： FUJITSU LTD
发明人： MISE KIYOBUMI , KOU KAKIYOU , TAKANO RYOJI , HATANO TAKASHI , MORITA SUMIE
IPC分类号： G06F13/12
摘要： PURPOSE:To extract control information stored in a corresponding control register immediately and to shorten the time of extraction of the control information greatly by connecting an external device to the input/output controller and inputting an information transfer request which specifies the control register from the external device. CONSTITUTION:The external device 400 inputs the information transfer request requesting the input/output controller 4 to transfer the control information 300. An information transfer means 500 receives the information transfer request inputted from the external device 400 to the input/output controller 4, and extracts and transfers the control information 300, stored in the control register 200 specified by the information transfer request, to the external device 400. Thus, the external device is connected to the input/output controller and the information transfer request wherein the control register is specified is inputted from the external device to extract the control information stored in the corresponding control register immediately, thereby shortening the time of the extraction of the control information greatly.

6. 发明专利

JPH04125732A INSTRUCTION CONVERSION SYSTEM 失效
公开(公告)号：JPH04125732A
公开(公告)日：1992-04-27
申请号：JP24651890
申请日：1990-09-17
申请人： FUJITSU LTD
发明人： HATANO TAKASHI , MISE KIYOBUMI , MORITA SUMIE , KOU KAKIYOU , MASUKO HIROYO , NIIMURA MASAKO
IPC分类号： G06F12/08 , G06F9/318
摘要： PURPOSE:To eliminate a need to rewrite a program even at the time of replacing a processor with another processor different in instruction system by converting instructions of the old system to those of the new system at the time of transferring instructions of the old system stored in a main storage device to a cache memory to store them in this memory. CONSTITUTION:Cache memory controllers (CMC) 4 and instruction conversion processing devices (ITL) 4 check whether both main storage devices (MM) 2 are active or not when extracting instruction groups stored in main storage devices (MM) 2 to transfer and store them to and in cache memories (CM) 3. These CMC 4 and ITL 5 extract a part of instruction groups from main storage devices (MM) 2 judged to be active and convert extracted instructions to instructions of the new system, which a CPU 10 can execute, and store them in the cache memory (CM) 3. Thus, the CPU 10 executes the operation without artificial rewrite of the program.

7. 发明专利

JPH04100465A SYSTEM FOR TESTING SUBSCRIBER LINE TERMINATING DEVICE 失效
公开(公告)号：JPH04100465A
公开(公告)日：1992-04-02
申请号：JP21864290
申请日：1990-08-20
申请人： FUJITSU LTD
发明人： TAKANO RYOJI , HATANO TAKASHI , MISE KIYOBUMI , MORITA SUMIE
IPC分类号： H04M3/26 , H04M3/30
摘要： PURPOSE:To quickly and precisely perform work for a possibility of fault even when an abnormal state is detected in a stage where a subscriber line terminating device is designated as mounted from a higher-rank device by confirming the normalness of the terminating device by means of a common subscriber line controlling section before the terminating device is designated as mounted immediately after the terminating device is newly mounted. CONSTITUTION:When a subscriber line terminating device 111-i for housing a subscriber line 3-1 is mounted on a subscriber line controller 11 in order to newly house the line 3-i in the controller 11, a common subscriber line controlling section 112 actuates a local testing section 1122 and connects the section 1122 to the control channel D-i, information channel B-i, and display line L-i of the device 111-i. The actuated local testing section 112 confirms the normalness of the control signal transmitting and receiving functions of the subscriber line terminating device 111-i and, after connecting the channel B-i in a folded state in the device 111-i, confirms the normalness of the information transmitting and receiving functions of the device 111-i.

8. 发明专利

JPH03267775A LOOP TEST SYSTEM IN INTEGRATED CIRCUIT 失效
公开(公告)号：JPH03267775A
公开(公告)日：1991-11-28
申请号：JP6683690
申请日：1990-03-19
申请人： FUJITSU LTD
发明人： MASUKO HIROYO , TAKANO RYOJI , HATANO TAKASHI , MISE KIYOBUMI , KOU KAKIYOU
IPC分类号： G01R31/28 , G06F11/22 , H04J3/14 , H04L29/14
摘要： PURPOSE:To enable a loop test by an LSI itself even if sent and received data have a phase difference and are different in format by looping test sent data from a transmitting means back to a receiving means according to a sent data test indication. CONSTITUTION:A sent data test of the integrated circuit 101 does not require a circuit for phase difference absorption outside the circuit 101 by extracting the test sent data 111 before a phase difference adding means 104 and sending it back to the side of the receiving means 102 by a loop-back means 105. Further, the means 102 can receives the loop-back data 111 in the data format of sent data 109 through a format converting means 106. Namely, even if the data 109 and received data 108 differ in data format, the means 102 can accurately fetch the data 111 at the time of a received data test. Thus, the normal transmitting/receiving operation of the circuit 101 is used to easily conduct the sent data test alone. Further, the received data test is conducted only by setting reception timing 113 and corresponding test received data 114.

9. 发明专利

JPH0260260A DATA CLASSIFICATION INFORMING SYSTEM 失效
公开(公告)号：JPH0260260A
公开(公告)日：1990-02-28
申请号：JP21137088
申请日：1988-08-25
申请人： FUJITSU LTD
发明人： TAKANO RYOJI , HATANO TAKASHI , MISE KIYOBUMI , MORITA SUMIE
IPC分类号： H04L12/54 , H04L12/58
摘要： PURPOSE:To make format conversion at a main body side unnecessary by providing a line control device with a format converting means to perform the format conversion corresponding to the input of the classification of a protocol. CONSTITUTION:At the start-up of system, protocol classification information is set for the protocol informing means 142, 152 of respective LC1 14 to LC2 15 from the CC 11 of the main body side through a CHC 12. The protocol informing means 142, 152 hold a conversion rule corresponding to informed contents from the protocol informing means, and execute the converting function of the format converting means according to information. In the case where data from a line is received, when the data of prescribed quantity is stored in buffer memories 143, 153, the data is converted by the conversion rule, and the converted data is stored in the prescribed memory 101 of an MM 10 through the CHC.

10. 发明专利

JPH0246060A FILL-IN SIGNAL TRANSMITTING SYSTEM IN NO. 7 SIGNAL DEVICE WITH TUNING FUNCTION 失效
公开(公告)号：JPH0246060A
公开(公告)日：1990-02-15
申请号：JP19761788
申请日：1988-08-08
申请人： FUJITSU LTD
发明人： MASUKO HIROYO , TAKANO RYOJI , HATANO TAKASHI , MORITA SUMIE
IPC分类号： H04M7/06 , H04Q1/30
摘要： PURPOSE:To eliminate interruption to fill-in-transmitting by giving a suspending signal (interrupting instructing) to a memory control part when fill-in signal(FISU) transmitting instruction is set to a hard register and interrupting transmitting at the break of a message in transmitting. CONSTITUTION:When fill-in(FISU) transmitting instruction is received from a host device in executing the control of signal transmitting/receiving by a No. 7 signal control program 212 in a processor 21, an FISU transmitting instruction program 211 is started up and a suspending signal is generated and is supplied to an HDLC transmitting circuit 25. Thus, the HDLC transmitting circuit 25 executes the control to interrupt the action of tuning at the part of the break of a frame, detects the address of an untransmitted message when it is interrupted and reserves (secures) it to an address register 23-2. On the other hand, a fill-in signal generated in an FISU generating circuit 251 is transmitted. Thus, processing speed can be made high speed.

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