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1. 发明专利

JP2017118125A ショットキー・ダイオード审中-公开
公开(公告)号：JP2017118125A
公开(公告)日：2017-06-29
申请号：JP2017017499
申请日：2017-02-02
申请人：クリーインコーポレイテッドCree Inc. , Cree Inc , クリーインコーポレイテッドCree Inc.
发明人： JASON PATRICK HENNING , ZHANG QINGCHUN , RYU SEI-HYUNG , ANANT KUMAR AGARWAL , JOHN WILLIAMS PALMOUR , SCOTT ALLEN
IPC分类号： H01L29/872 , H01L21/265 , H01L21/329 , H01L29/06 , H01L29/47 , H01L29/861 , H01L29/868
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/0661 , H01L29/1608 , H01L29/8611 , H01L2224/04042 , H01L2224/05554 , H01L2224/05567 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2924/00014 , H01L2924/12032 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/00 , H01L2224/05552
摘要：【課題】ショットキー接合の障壁高さを小さくすることができる、性能を改善したショットキーダイオードを提供する。【解決手段】基板12と、基板12の上に設けられるドリフト層22と、ドリフト層22のアクティブ領域14の上に設けられるショットキー層24とを有するショットキー・ダイオード10であって、ショットキー層24のための金属と、ドリフト層22のための半導体材料とは、ドリフト層22とショットキー層24との間に低い障壁高さのショットキー接合を提供するように、選択される。【選択図】図1

2. 发明专利

JP2014078747A High power insulated gate bipolar transistors 有权
标题翻译：高功率绝缘栅双极晶体管
公开(公告)号：JP2014078747A
公开(公告)日：2014-05-01
申请号：JP2013265926
申请日：2013-12-24
申请人： Cree Inc , クリーインコーポレイテッドCree Inc.
发明人： ZHANG QINGCHUN , RYU SEI-HYUNG , CHARLOTTE JONAS , ANANT K AGARWAL
IPC分类号： H01L29/78 , H01L21/336 , H01L29/12 , H01L29/739
CPC分类号： H01L29/66068 , H01L21/02378 , H01L21/02529 , H01L21/046 , H01L21/049 , H01L21/2254 , H01L21/26513 , H01L21/324 , H01L29/1095 , H01L29/1608 , H01L29/66333 , H01L29/7395
摘要： PROBLEM TO BE SOLVED: To provide high power insulated gate bipolar transistors.SOLUTION: An insulated gate bipolar transistor (IGBT) comprises a substrate having a first conductivity type, a drift layer having a second conductivity type opposite to the first conductivity type, and a well region in the drift layer and having the first conductivity type. On the drift layer, there is an epitaxial channel adjustment layer, and the epitaxial channel adjustment layer has the second conductivity type. An emitter region extends from a surface of the epitaxial channel adjustment layer through the epitaxial channel adjustment layer into the well region. The emitter region has the second conductivity type and at least partially defines a channel region within the well region adjacent to the emitter region. On the channel region, there is a gate oxide layer and on the gate oxide layer, there is a gate. An associated method is also disclosed.
摘要翻译：要解决的问题：提供高功率绝缘栅双极晶体管。解决方案：绝缘栅双极晶体管（IGBT）包括具有第一导电类型的衬底，具有与第一导电类型相反的第二导电类型的漂移层，以及并且具有第一导电类型。在漂移层上，存在外延沟道调整层，外延沟道调整层具有第二导电类型。发射极区从外延沟道调整层的表面延伸穿过外延沟道调节层进入阱区。发射极区域具有第二导电类型，并且至少部分地限定与发射极区域相邻的阱区域内的沟道区域。在沟道区上有一个栅极氧化层，在栅极氧化层上有一个栅极。还公开了一种相关联的方法。

3. 发明专利

JP2011193020A Silicon carbide power device with self-aligned source and well region and method of fabricating same 有权
标题翻译：具有自对准源和良好区域的碳化硅电力装置及其制造方法
公开(公告)号：JP2011193020A
公开(公告)日：2011-09-29
申请号：JP2011120724
申请日：2011-05-30
申请人： Cree Inc , クリーインコーポレイテッドCree Inc.
发明人： RYU SEI-HYUNG
IPC分类号： H01L21/336 , H01L21/04 , H01L29/12 , H01L29/24 , H01L29/78
CPC分类号： H01L29/66068 , H01L21/049 , H01L29/1608 , H01L29/7802 , H01L29/7828 , H01L29/7838 , Y10S438/931
摘要： PROBLEM TO BE SOLVED: To solve a problem that a power device including a power MOSFET is made of silicon carbide despite the potential advantages of the silicon carbide. SOLUTION: Silicon carbide semiconductor devices and methods of fabricating silicon carbide semiconductor devices are provided by successively etching a mask layer to provide windows for formation of a source region of a first conductivity type, a buried silicon carbide region of a second conductivity type opposite to the first conductivity type and a second conductivity type well region in a first conductivity type silicon carbide layer. The source region and the buried silicon carbide region are formed utilizing a first window of the mask layer. Then, the well region is formed utilizing a second window of the mask layer, the second window being provided by a subsequent etch of the mask layer having the first window. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：解决的问题：为了解决尽管碳化硅具有潜在的优点，包括功率MOSFET的功率器件由碳化硅制成的问题。解决方案：通过连续地蚀刻掩模层来提供碳化硅半导体器件和制造碳化硅半导体器件的方法，以提供用于形成第一导电类型的源极区域的第二导电类型的掩埋碳化硅区域与第一导电型碳化硅层中的第一导电类型和第二导电类型阱区相反。利用掩模层的第一窗口形成源区和掩埋碳化硅区。然后，利用掩模层的第二窗口形成阱区，第二窗口通过随后蚀刻具有第一窗口的掩模层来提供。版权所有（C）2011，JPO＆INPIT

4. 发明专利

JP2008042198A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008042198A
公开(公告)日：2008-02-21
申请号：JP2007199468
申请日：2007-07-31
申请人： Cree Inc , クリーインコーポレイテッドCree Inc.
发明人： ZHANG QINGCHUN , RYU SEI-HYUNG , AGARWAL ANANT K
IPC分类号： H01L29/47 , H01L29/861 , H01L29/872
CPC分类号： H01L29/0619 , H01L21/046 , H01L29/0615 , H01L29/1608 , H01L29/6606 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a junction barrier Schottky diode and its manufacturing method.
SOLUTION: The junction barrier Schottky diode includes a semiconductor layer having first conductivity type; a metal contact point which is located on the semiconductor layer and forms a Schottky junction part with the semiconductor layer; and a semiconductor region in the semiconductor layer. The semiconductor region and the semiconductor layer form a first p-n junction part in parallel with the Schottky junction part. The first p-n junction part is configured so as to generate a depletion region in the semiconductor layer adjacent to the Schottky junction part when a reverse bias is applied to the Schottky junction part. Therefore, the reverse leakage current which passes the Schottky junction part is limited. The first p-n junction part is configured so that a punch through of the first p-n junction part may occur at a voltage lower than a breakdown voltage of the Schottky junction part when the reverse bias is applied to Schottky junction part.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供接合势垒肖特基二极管及其制造方法。解决方案：结势垒肖特基二极管包括具有第一导电类型的半导体层; 金属接触点，其位于半导体层上并形成与半导体层的肖特基接合部分; 以及半导体层中的半导体区域。半导体区域和半导体层与肖特基结部分平行地形成第一p-n结部分。第一p-n结部分被配置为当向肖特基结部分施加反向偏压时，在与肖特基结部分相邻的半导体层中产生耗尽区。因此，通过肖特基接合部的反向漏电流受到限制。第一p-n接合部被配置为使得当将反向偏压施加到肖特基接合部分时，第一p-n结部分的穿通可能以低于肖特基接合部分的击穿电压的电压发生。版权所有（C）2008，JPO＆INPIT

5. 发明专利

JP2007173841A Silicon carbide bipolar junction transistor having silicon carbide passivation layer on base region and method of fabricating thereof 有权
标题翻译：具有基底区域的碳化硅钝化层的碳化硅双极晶体管及其制造方法
公开(公告)号：JP2007173841A
公开(公告)日：2007-07-05
申请号：JP2006346041
申请日：2006-12-22
申请人： Cree Inc , クリーインコーポレイテッドCree Inc.
发明人： AGARWAL ANANT K , KRISHNASWAMI SUMITHRA , RYU SEI-HYUNG , CAPELL D CRAIG
IPC分类号： H01L21/331 , H01L29/73
CPC分类号： H01L29/1608 , H01L29/1004 , H01L29/7325
摘要： PROBLEM TO BE SOLVED: To provide a bipolar junction transistor (BJT) comprising a silicon carbide (SiC) collector layer of first conductivity type an epitaxial silicon carbide base layer of second conductivity type on the silicon carbide collector layer, and an epitaxial silicon carbide emitter mesa of the first conductivity type on the epitaxial silicon carbide base layer. SOLUTION: In this bipolar junction transistor, an epitaxial silicon carbide passivation layer 350 of the first conductivity type is provided on at least a portion of the epitaxial silicon carbide base layer 320 outside the silicon carbide emitter mesa. In addition, the epitaxial silicon carbide passivation layer can be configured to deplete fully at zero device bias. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种双极结型晶体管（BJT），其包括第一导电类型的碳化硅（SiC）集电极层，在碳化硅集电极层上具有第二导电类型的外延碳化硅基底层，以及外延第一导电类型的碳化硅发射极台面在外延碳化硅基底层上。解决方案：在该双极结型晶体管中，第一导电类型的外延碳化硅钝化层350设置在碳化硅发射极台面外部的外延碳化硅基底层320的至少一部分上。此外，外延碳化硅钝化层可以被配置为在零器件偏置下完全耗尽。版权所有（C）2007，JPO＆INPIT

6. 发明专利

JP2014150286A Junction type barrier schottky diode with current surge capability 有权
标题翻译：具有电流能力的接线型阻挡肖特基二极管
公开(公告)号：JP2014150286A
公开(公告)日：2014-08-21
申请号：JP2014091318
申请日：2014-04-25
申请人： Cree Inc , クリーインコーポレイテッドCree Inc.
发明人： ZHANG QINGCHUN , RYU SEI-HYUNG
IPC分类号： H01L29/868 , H01L21/329 , H01L29/47 , H01L29/861 , H01L29/872
CPC分类号： H01L29/872 , H01L29/0615 , H01L29/1608 , H01L29/47 , H01L29/861
摘要： PROBLEM TO BE SOLVED: To achieve both an improvement in ability to handle current surges and a decrease in on-state resistance of a device at lower currents, in a JBS Schottky diode.SOLUTION: An electronic device includes: a silicon carbide drift region having a first conductivity type; a Schottky contact provided on the drift region; and a plurality of junction type barrier Schottky (JBS) regions provided at a surface of the drift region adjacent to the Schottky contact. The JBS regions have a second conductivity type opposite the first conductivity type and have a first spacing between adjacent regions of the JBS regions. The device further includes a plurality of surge protection subregions having the second conductivity type. Each of the surge protection subregions has a second spacing between adjacent subregions of the surge protection subregions, the second spacing being less than the first spacing.
摘要翻译：要解决的问题：在JBS肖特基二极管中，实现在较低电流下处理电流浪涌的能力提高和器件的导通电阻降低。解决方案：电子器件包括：碳化硅漂移区，其具有第一导电类型; 在漂移区域提供肖特基接触; 以及设置在与肖特基接触相邻的漂移区域的表面处的多个结型势垒肖特基（JBS）区域。 JBS区域具有与第一导电类型相反的第二导电类型，并且在JBS区域的相邻区域之间具有第一间隔。该装置还包括具有第二导电类型的多个浪涌保护子区域。每个浪涌保护子区域在浪涌保护子区域的相邻子区域之间具有第二间隔，第二间隔小于第一间隔。

7. 发明专利

JP2013062518A Edge termination structure for silicon carbide device and manufacturing method of silicon carbide device including edge termination structure 审中-公开
标题翻译：碳化硅器件的边缘终止结构和包括边缘终止结构的碳化硅器件的制造方法
公开(公告)号：JP2013062518A
公开(公告)日：2013-04-04
申请号：JP2012232939
申请日：2012-10-22
申请人： Cree Inc , クリーインコーポレイテッドCree Inc.
发明人： RYU SEI-HYUNG , ANANT K AGARWAL , WARD ALAN
IPC分类号： H01L29/06 , H01L29/47 , H01L29/872
CPC分类号： H01L29/0619 , H01L21/0445 , H01L23/3192 , H01L29/0615 , H01L29/063 , H01L29/1608 , H01L29/6606 , H01L29/66068 , H01L29/872 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide an improved edge termination structure of a silicon carbide device.SOLUTION: The edge termination structure of a silicon carbide device has a plurality of floating guard rings 34 of concentric circle arranged at predetermined intervals, in a silicon carbide layer, so as to surround at least the silicon carbide base junction, an insulation layer provided on the floating guard rings, and a silicon carbide surface charge compensation region 38 provided between the floating guard rings closely to the surface of the silicon carbide layer. A silicon nitride layer 56 is provided on the silicon carbide layer, and an organic protective layer 66 is provided on the silicon nitride layer. An oxide film layer may exist between the silicon nitride layer and the surface of the silicon carbide layer. Formation of the edge termination structure and a manufacturing method are also disclosed.
摘要翻译：要解决的问题：提供改进的碳化硅器件的边缘端接结构。解决方案：碳化硅器件的边缘端接结构具有在碳化硅层中以预定间隔布置的多个同心圆的浮动保护环34，以至少包围碳化硅基底结，绝缘层提供在浮动保护环上的层，以及设置在浮动保护环之间的碳化硅表面电荷补偿区38，其紧邻碳化硅层的表面。在碳化硅层上设置氮化硅层56，在氮化硅层上设置有机保护层66。在氮化硅层和碳化硅层的表面之间可以存在氧化膜层。还公开了边缘终端结构的形成和制造方法。版权所有（C）2013，JPO＆INPIT

8. 发明专利

JP2013030814A Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2013030814A
公开(公告)日：2013-02-07
申请号：JP2012244847
申请日：2012-11-06
申请人： Cree Inc , クリーインコーポレイテッドCree Inc.
发明人： ZHANG QINGCHUN , RYU SEI-HYUNG , AGARWAL ANANT K
IPC分类号： H01L29/47 , H01L29/872
CPC分类号： H01L29/0619 , H01L21/046 , H01L29/0615 , H01L29/1608 , H01L29/6606 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a junction barrier Schottky diode and a method of manufacturing the same.SOLUTION: The semiconductor device includes a semiconductor layer of first conductive type, a metal contact point which is on the semiconductor layer to form a Schottky junction part together with the semiconductor layer, and a semiconductor region in the semiconductor layer. The semiconductor region and the semiconductor layer form a first p-n junction part parallel to the Schottky junction part. The first p-n junction part is so configured as to generate a depletion region in the semiconductor layer that adjoins the Schottky junction part when the Schottky junction part is applied with a reverse vias, thereby a reverse leakage current is limited to run the Schottky junction part. The first p-n junction part is so configured that, when the Schottky junction part is applied with a reverse vias, a punch through at the first p-n junction part occurs at a voltage lower than a breakdown voltage of the Schottky junction part.
摘要翻译：要解决的问题：提供一种接合势垒肖特基二极管及其制造方法。解决方案：半导体器件包括第一导电类型的半导体层，与半导体层一起形成肖特基结部分的半导体层上的金属接触点以及半导体层中的半导体区域。半导体区域和半导体层形成平行于肖特基结部分的第一p-n结部分。第一p-n结部分被配置为当肖特基结部分施加反向通孔时在半导体层中产生与肖特基结部分相邻的耗尽区，从而限制反向漏电流运行肖特基结部分。第一p-n结部分被配置成使得当肖特基接合部分被施加反向通孔时，在第一p-n结部分处穿过的冲头的电压低于肖特基接合部分的击穿电压。版权所有（C）2013，JPO＆INPIT

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