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    • 8. 发明专利
    • METHOD OF REDUCING EFFECT DUE TO QUANTIZATION ERROR OF DIGITAL PROCESSING LOCATOR
    • JPS5714755A
    • 1982-01-26
    • JP9010680
    • 1980-06-30
    • MITSUBISHI ELECTRIC CORP
    • MAEDA KOUJI
    • G01R19/04G01R31/08H02H3/02
    • PURPOSE:To reduce the effect due to the quantization error in a low input area, etc., by obtaining a resistance component and inductance component through using three consecutive data near the peak values of voltage and electric current. CONSTITUTION:It is assumed that when an input terminal 10 receives data in corresponding to the n-th sampling No., the output of a storage circuit 1 contains in-1. In the subtraction circuit 2, subtraction of (in-in-1) is calculated, and its output is judged as positive, negative or zero by a comparator circuit 4. In a comparator circuit 5, calculation is performed on the data advanced by one sampling from the output of the comparator circuit 4, by using the output of a multiplication circuit 3 and that of the storage circuit 1, and the results of positive, negative and zero are outputted. Next, when a decision circuit 6 receives output having the identical sign from the comparator circuits 4 and 5, it is possible to determine the presence of the peak point between said two outputs and the point of time for the presence of the peak point. Therefore, said method can reduce the effects due to the quantization error in the low input area, etc.