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1. 发明专利

JPH07135507A ATM TRANSMISSION SIGNAL CONTROL METHOD 失效
公开(公告)号：JPH07135507A
公开(公告)日：1995-05-23
申请号：JP30597093
申请日：1993-11-11
申请人： ANRITSU CORP , NIPPON TELEGRAPH & TELEPHONE
发明人： ISHII SEISHIRO , MOGI MASAHIDE , AOYANAGI SHINICHI
IPC分类号： H04L7/08 , H04L12/26 , H04L12/28 , H04L12/44 , H04Q3/00
摘要： PURPOSE:To use a timing generating circuit for an SLT in common by deciding an in-system maximum round trip time in a passive double start cell base ATM transmission system to be the same as an incoming reception processing timing or an outgoing transmission processing timing of the SLT. CONSTITUTION:The border of an SLT between a sender side TS and a receiver side TS is made coincident with each other. That is, a transmission timing of the measurement P cell from each NT is set to be Ta=1 TS time. Furthermore, a maximum round trip time (Tntmax) taken in the system is decided so that an installed range of an NT is set within a distance equivalent to Tntmax = 1TS time -1 one cell time by taking it consideration that the length of a measurement P cell is one cell time.

2. 发明专利

JPH07135508A ATMHEC SYNCHRONIZATION CIRCUIT 失效
公开(公告)号：JPH07135508A
公开(公告)日：1995-05-23
申请号：JP30597193
申请日：1993-11-11
申请人： ANRITSU CORP , NIPPON TELEGRAPH & TELEPHONE
发明人： ISHII SEISHIRO , MOGI MASAHIDE , AOYANAGI SHINICHI
IPC分类号： H04L29/02 , H04L7/00 , H04L7/08 , H04L12/28 , H04Q3/00
摘要： PURPOSE:To realize the cell synchronization system with distributed sample scrambler used for a cell base ATM interface and to conduct an error correction operation for a full 8-bit syndrome normally required in the same timing. CONSTITUTION:A high-order 2-bit of a HEC code is extracted from the midway of a syndrome generation matrix circuit 1e by providing a bit extract circuit 1f. That is, an extract timing is extracted from a timing in 4-bits before a synchronization pattern detection timing and used for the synchronization operation of a cyclic local PRBS generating circuit 7. A syndrome high-order two-bits descrambled from a transfer bit collation circuit 5 are outputted in a timing coincident with low-order 6-bits of the syndrome from an HEC arithmetic circuit 1. A syndrome combining circuit 11 combines syndromes of full 8-bits and the result is given to an error correction circuit 9.

3. 发明专利

JPH07135506A ATM TRANSMITTER 失效
公开(公告)号：JPH07135506A
公开(公告)日：1995-05-23
申请号：JP30596993
申请日：1993-11-11
申请人： ANRITSU CORP , NIPPON TELEGRAPH & TELEPHONE
发明人： ISHII SEISHIRO , MOGI MASAHIDE , AOYANAGI SHINICHI
IPC分类号： H04L7/08 , H04L12/26 , H04L12/28 , H04L12/44 , H04Q3/00
摘要： PURPOSE:To verify transmission delay quantity control state by FPAC through the use of a measurement P cell by adjusting a transmission delay quantity setting value for the measurement P cell with the FPAC even when the transmission delay is measured by the measurement P cell. CONSTITUTION:A FPAC/TSI extract circuit 7 extracts an FPAC and a TSI from a P cell of a TS addressed to its concerned station. A TSI busy state detection circuit 8 detects a TS busy state display from the extracted TSI. A P cell transmission circuit 15 and a user cell transmission circuit 14 send the burst signal of a measurement P cell (P cell only) as a transmission delay time measurement cell for a TS when the TS is not in use. When the TS is in use, (P cell + user information) is sent in an incoming TS whose number is the same as the TS. An FPAC validity detection circuit 9 detects whether or not an FPAC valid display set by an SLT is valid to control a transmission delay.

4. 发明专利

JPH0378337A CODE ERROR COUNTING CIRCUIT 失效
公开(公告)号：JPH0378337A
公开(公告)日：1991-04-03
申请号：JP21419989
申请日：1989-08-22
申请人： ANRITSU CORP
发明人： ISHII SEISHIRO , MOGI MASAHIDE
IPC分类号： G06F7/00 , G06F7/76 , H04L1/00
摘要： PURPOSE:To always detect the number of code errors in short time by connecting respective outputs of an exclusive OR circuit comparing data to a storage circuit and reading the output values of the storage circuit as the number of the code errors. CONSTITUTION:An S/P conversion circuit 1 converts serial input signals into parallel signal, outputs them to a register 2. The comparison pattern of a comparison pattern generation circuit 3 is inputted to a register 4. The exclusive OR circuit 5 takes the exclusive OR of data of the registers 2 and 4 and the discordant code errors are detected. The outputs of the exclusive OR circuit 5 are inputted to the address input terminals A0-An of the storage circuit 6 such as RAM, ROM. Then, the data output terminal D of the storage circuit 6 is inputted to a processing circuit, urges the processing of retransmission to a transmission-side when the number of the code errors is larger than a prescribed number, and it is connected to an error number detection circuit 7. The error number addition circuit 7 adds data outputted from the storage circuit 6 and counts the number of the errors is prescribed time. Thus, the number of the code errors can be obtained at high speed.

5. 发明专利

JP2008167180A Packet repeating method, and packet repeating installation 有权
标题翻译：分组重复方法和分组重新安装
公开(公告)号：JP2008167180A
公开(公告)日：2008-07-17
申请号：JP2006354677
申请日：2006-12-28
申请人： Anritsu Corp , アンリツ株式会社
发明人： MOGI MASAHIDE , ANZAI KENJI , SEKIMIZU MUNEKI , AKEDO MASATO
IPC分类号： H04L12/801 , H04L12/911 , H04L12/917
摘要： PROBLEM TO BE SOLVED: To provide a packet repeating method and a packet repeating installation that utilize the restriction band of a transmission side effectively, and enables a manager to lighten the setting and change work of band control conditions. SOLUTION: There are provided: a bandwidth calculation means (5) for calculating the minimum guaranteed bandwidth corresponding to each first group of flows by distributing the second maximum allowable band based on the ratio of each first maximum allowable band each time when the number of first groups of flows belonging to a second group of flows or the setting value of the first or second maximum allowable band is changed when the sum total of each first maximum allowable band corresponding to each first group of flows belonging to the second group of flows exceeds the second maximum allowable band corresponding to the second group of flows; and band control means (6a-6f and 7a, 7b) for controlling bands by determining whether a packet is aborted, based on the minimum certification band and the first and second maximum allowable bands. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了提供有效利用发送侧的限制带的分组重复方法和分组重复安装，并且使得管理者能够减轻频带控制条件的设置和改变工作。提供了一种带宽计算装置（5），用于通过基于每个第一最大允许频带的比率来分配第二最大允许频带，用于计算与每个第一组流量相对应的最小保证带宽，当属于第二组流的每个第一组流量的每个第一最大允许频带的总和与第二组流量的第一组流量或第一或第二最大允许频带的设置值的总和相应地改变，流量超过对应于第二组流量的第二最大允许频带; 以及频带控制装置（6a-6f和7a，7b），用于通过基于最小认证带和第一和第二最大允许频带来确定分组是否中止来控制频带。版权所有（C）2008，JPO＆INPIT

6. 发明专利

JP2008167179A Packet repeating installation 有权
标题翻译：分组重新安装
公开(公告)号：JP2008167179A
公开(公告)日：2008-07-17
申请号：JP2006354676
申请日：2006-12-28
申请人： Anritsu Corp , アンリツ株式会社
发明人： MOGI MASAHIDE , ANZAI KENJI , SEKIMIZU MUNEKI , AKEDO MASATO
IPC分类号： H04L12/813 , H04L12/877
摘要： PROBLEM TO BE SOLVED: To provide a packet repeating installation capable of utilizing a transmission band effectively as compared with a conventional packet repeating installation. SOLUTION: The packet repeating installation has: label imparting means 6a-6f for imparting first and second labels to a packet received at a transfer rate exceeding the maximum assignment bandwidth specified for each flow and that received at a transfer rate exceeding the minimum assignment bandwidth specified for each flow, respectively; first policers 7a, 7b aborting one of packets to which the first label is imparted so that the transfer rate of the first group of flows does not exceed the first maximum allowable bandwidth, when the transfer rate of the first group of flows exceeds the first maximum allowable bandwidth specified for each first group of flows; and a second policer 8 for aborting one of packets to which a second label is imparted so that the transfer rate of a second group of flows does not exceed the second maximum allowable bandwidth when the transfer rate of a second group of flows exceeds the second maximum allowable bandwidth specified by the second group of flows. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：与常规分组重复安装相比，提供能够有效利用传输频带的分组重复安装。解决方案：分组重复安装具有：标签赋予装置6a-6f，用于将传送速率超过最大分配带宽所指定的传输速率接收到的分组传送给第一和第二标签，传输速率超过最小传输速率分配给每个流量分配带宽; 当第一组流的传输速率超过第一最大值时，第一策略器7a，7b中止赋予第一标签的分组之一，使得第一组流的传输速率不超过第一最大允许带宽为每个第一组流量指定的允许带宽; 以及第二监管器8，用于中止第二标签被赋予的分组中的一个，使得当第二组流量的传输速率超过第二最大值时，第二组流的传输速率不超过第二最大允许带宽由第二组流量指定的容许带宽。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2005151025A Extended relay system and relaying apparatus 有权
标题翻译：扩展继电器系统和继电器
公开(公告)号：JP2005151025A
公开(公告)日：2005-06-09
申请号：JP2003383798
申请日：2003-11-13
申请人： Anritsu Corp , アンリツ株式会社
发明人： MOGI MASAHIDE , ANZAI KENJI , ISHII MASAHARU
IPC分类号： H04L12/46 , H04L12/70 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To provide a technology capable of allowing a major relaying apparatus to apply central management to subordinate relaying apparatuses by using a VLAN, when extending the ports of the major relaying apparatus, using the subordinate relaying apparatuses. SOLUTION: When the VLAN is desirably configured between terminals 7, 8, respective physical ports AE, AF are related by tags 4080, 4081 of a switch LAN table 3b; and furthermore, L port identifiers 0x31, 0x34 of a port table 1b, and a VLAN identifier VID of a VLAN table 1c and configured to be managed as the VLAN wherein a VLAN identifier VID is 3. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种能够允许主要中继设备使用下行中继设备在扩展主中继设备的端口时通过使用VLAN对下属中继设备进行中央管理的技术。解决方案：当端口7,8之间希望配置VLAN时，相应的物理端口AE，AF与交换机LAN表3b的标签4080,4081相关; 此外，端口表1b的L端口标识符0x31，0x34和VLAN表1c的VLAN标识符VID，并配置为作为VLAN进行管理，其中VLAN标识符VID为3。版权所有（C）2005 ，JPO＆NCIPI

8. 发明专利

JP2005101690A Repeating device and repeating method 审中-公开
标题翻译：重复设备和重复方法
公开(公告)号：JP2005101690A
公开(公告)日：2005-04-14
申请号：JP2003329433
申请日：2003-09-22
申请人： Anritsu Corp , アンリツ株式会社
发明人： MOGI MASAHIDE , ANZAI KENJI , ISHII MASAHARU
IPC分类号： H04L12/801 , H04L12/851 , H04L12/865 , H04L12/911 , H04L12/951 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To accelerate transfer rate of packets, by receiving divided packets and performing transfer processings which include QoS, in the form of divided packets. SOLUTION: A packet-identifying means 4 identifies a head packet arranged with information of layers 3 and 4 among divided packets, a flow-retrieving means 5 retrieves handling information including transfer processing of QoS from a flow table 1 and retrieval results are stored in a storage means 2. Subsequently, remaining divided packets, holding only the information of layer 3, derive the same information as retrieved by the head packet from the storage means 2 so that a packet processing means 6 can process the packets individually and similarly, while remaining divided. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：通过分割分组的形式，通过接收划分的分组并且执行包括QoS的传送处理来加速分组的传送速率。解决方案：分组识别装置4识别在划分的分组中以层3和4的信息排列的头部分组，流检索装置5从流表1中检索包括QoS的传送处理的处理信息，检索结果为存储在存储装置2中。随后，仅保存层3的信息的剩余划分的分组从存储装置2导出与由头分组检索的相同的信息，使得分组处理装置6可以单独地和类似地处理分组，而仍然分开。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2005045379A Relaying system and method 有权
标题翻译：继电系统与方法
公开(公告)号：JP2005045379A
公开(公告)日：2005-02-17
申请号：JP2003200859
申请日：2003-07-24
申请人： Anritsu Corp , アンリツ株式会社
发明人： NISHI MASAHIRO , YOTSUYANAGI YASUHIKO , MOGI MASAHIDE
IPC分类号： H04B10/03 , H04B1/74 , H04B10/032 , H04B10/07 , H04B10/077 , H04B10/29 , H04L29/14 , H04B10/02 , H04B10/16 , H04B10/17
摘要： PROBLEM TO BE SOLVED: To provide a relaying system which secures the reliability of relaying and is inexpensive and redundant.
SOLUTION: An optical transmission line and a route between an active relaying device and a standby relaying device are formed by optical branching means 200a and 200b and always connected; when detecting means 6a and 5aa detect abnormality of a signal path or control path in themselves, their light emission parts 4a and 4aa are stopped from emitting light and a communication means 7a gives notice to the standby relaying device by a communication means 7a, thereby the standby relaying device starts relaying.
COPYRIGHT: (C)2005,JPO&NCIPI

10. 发明专利

JP2001111569A MULTIPLEXER 失效
公开(公告)号：JP2001111569A
公开(公告)日：2001-04-20
申请号：JP28820299
申请日：1999-10-08
申请人： ANRITSU CORP
发明人： MOGI MASAHIDE , TAKAHASHI HIROYUKI
IPC分类号： H04J3/00 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To simplify the internal configuration of a multiplexer integrating communication services and further the expanded operation of the multiplexer and to improve economical efficiency. SOLUTION: This multiplexer 13 is provided with at least one cell bus 18, and a plurality of interface means 16 and 17 put received data in a prescribed format a cell, transmit and receive the cell by using either of at least one or more cell buses 18 and make the cell received from at least one cell bus 18 data in the prescribed format. A control means 19 performs control operation, including cell transmission and reception control between the plurality of interface means 16 and 17, and means for a control signal cell making 20 makes a control signal from the means 19 a cell and transmits and receives the cell, by using either of at least one or more cell buses 18.

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