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1. 发明专利

JP2010114776A Acoustic transducer 审中-公开
标题翻译：声学传感器
公开(公告)号：JP2010114776A
公开(公告)日：2010-05-20
申请号：JP2008287043
申请日：2008-11-07
申请人： Toshiba Corp , 株式会社東芝
发明人： YASUMOTO YASUAKI , YANASE NAOKO , OHARA RYOICHI , MASUKO SHINGO , SANO KENYA
IPC分类号： H04R17/02 , H04R19/04
摘要： PROBLEM TO BE SOLVED: To provide an acoustic transducer having a membrane, which controls sound pressure on the back face of the membrane while improving sensitivity of the acoustic transducer.
SOLUTION: The acoustic transducer includes: a substrate 111 including a back cavity 201 formed on the back surface of the substrate and functioning as acoustic capacitance, ventilation holes 202
1 , 202
2 opened on the front side of the substrate, located on the side of the back cavity and functioning as acoustic resistance, and communication paths 203
1 , 203
2 located on the side of the back cavity for allowing the back cavity to communicate with the ventilation holes; and an acoustic element 112 formed on the front surface of the substrate, located above the back cavity, and located on the side of the ventilation holes.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有膜的声换能器，其在改善声换能器的灵敏度的同时控制膜的背面上的声压。声学换能器包括：基板111，其包括形成在基板的背面上并用作声电容的后腔201，通风孔202，SB2， / SB>在基体的正面侧开放，位于背腔的一侧并且起声音的作用，并且位于其上的通信路径203 1 203 2 后腔的一侧用于允许后腔与通气孔连通; 以及形成在所述基板的前表面上并位于所述后腔上方并位于所述通气孔侧的声学元件112。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2003283295A Surface acoustic wave device and its manufacturing method 审中-公开
标题翻译：表面声波装置及其制造方法
公开(公告)号：JP2003283295A
公开(公告)日：2003-10-03
申请号：JP2002083712
申请日：2002-03-25
申请人： Toshiba Corp , 株式会社東芝
发明人： MASUKO SHINGO , SAKINADA KAORU
IPC分类号： H01L41/09 , H01L41/18 , H01L41/22 , H01L41/23 , H01L41/313 , H01L41/338 , H03H3/08 , H03H9/25
CPC分类号： H01L24/97 , H01L2224/97 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01056 , H01L2924/01067 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2224/81
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a surface acoustic wave device which has resin sealed structure and has high reliability. SOLUTION: Piezoelectric substrates surface acoustic wave elements having comb type tooth electrodes on the piezoelectric substrates are formed, the plurality of the surface acoustic wave elements are mounted on a multi-pieces base substrate between which bump electrodes are placed, resin is pushed on the surface acoustic wave elements using a die forming a projection part corresponding to a gap of the adjacent surface acoustic wave elements, the surface acoustic wave elements are sealed by the resin, and the resin and the base substrate is individualized for each surface acoustic wave element. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种具有树脂密封结构并具有高可靠性的表面声波装置的制造方法。解决方案：在压电基片上形成具有梳齿型齿电极的压电衬底表面声波元件，多个表面声波元件安装在放置有凸起电极的多片基底板上，树脂被推入在使用形成与相邻声表面波元件的间隙相对应的突出部的模具的表面声波元件上，表面声波元件被树脂密封，并且树脂和基底基板针对每个表面声波元件。版权所有（C）2004，JPO

3. 发明专利

JP2003051677A Method of mounting electronic component on multilayer board and electronic component device with electronic component mounted on multilayer board 审中-公开
标题翻译：在多层板上安装电子元件的方法和电子元器件与多层板上安装的电子元件
公开(公告)号：JP2003051677A
公开(公告)日：2003-02-21
申请号：JP2001239199
申请日：2001-08-07
申请人： Toshiba Corp , 株式会社東芝
发明人： MASUKO SHINGO
IPC分类号： H05K3/32 , H01L21/60 , H03H9/25 , H05K3/46
CPC分类号： H01L2224/16 , H01L2924/01046 , H01L2924/01078
摘要： PROBLEM TO BE SOLVED: To restrain stress strain from occurring in an electronic component when the electronic part is mounted on a multilayer board. SOLUTION: Metal bumps 31 and 32 fixed to the electrode pads PD1 and PD2 of an electronic part such as a surface acoustic wave device are each arranged on the same axes as electrodes (a part of a wiring layer 102, the uppermost layer a gold-plated layer 110) above electrode conductors 104a and 104c, which connect the upper wiring layer 102 and lower wiring layer 108 of a multilayer board 100 together and pressed, while given ultrasonic vibrations. By this setup, a thrust will not be applied to a part between the metal bumps 31 and 32 attached to the electrodes PD1 and PD2 of the surface acoustic wave device (thrust is applied only on the metal bumps 31 and 32).
摘要翻译：要解决的问题：当将电子部件安装在多层板上时，抑制在电子部件中发生的应力应变。解决方案：固定到诸如表面声波装置的电子部件的电极焊盘PD1和PD2的金属凸块31和32分别布置在与电极相同的轴上（布线层102的一部分，在电极导体104a，104c的上方连接多层基板100的上布线层102和下布线层108的同时进行挤压，同时给予超声波振动。通过这种设置，不会将安装在表面声波装置的电极PD1和PD2的金属凸块31和32之间的部分（推力仅施加在金属凸块31和32上）上的部分施加推力。

4. 发明专利

JP2003032070A Surface acoustic wave element and surface acoustic wave device 审中-公开
标题翻译：表面声波元件和表面声波设备
公开(公告)号：JP2003032070A
公开(公告)日：2003-01-31
申请号：JP2001210481
申请日：2001-07-11
申请人： Toshiba Corp , 株式会社東芝
发明人： MASUKO SHINGO , SAKINADA KAORU
IPC分类号： H03H9/145 , H03H9/25
摘要： PROBLEM TO BE SOLVED: To standardize a bump pad position of a surface acoustic wave chip and to enhance joining performance with a package substrate.
SOLUTION: The surface acoustic wave device includes a package substrate whose front side has connection terminals and a surface acoustic wave chip mounted on the package substrate, having comb-line electrodes opposed to each other and a metallic bump joined with the connection terminals. The connection terminals of the package substrate are placed in a substrate region where a bent of the package substrate is 15% of the height of the metallic bump or below and the metallic bump is placed at the inside of the opposed comb-line electrodes.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：标准化表面声波芯片的凸块焊盘位置并提高与封装基板的接合性能。解决方案：声表面波装置包括前侧具有连接端子的封装基板和安装在封装基板上的表面声波芯片，具有彼此相对的梳状电极和与连接端子连接的金属凸块。封装基板的连接端子被放置在基板区域中，其中封装基板的弯曲为金属凸块的高度的15％或更小，并且金属凸块被放置在相对的梳状线电极的内部。

5. 发明专利

JP2014183248A Semiconductor device and strain monitoring device 有权
标题翻译：半导体器件和应变监测器件
公开(公告)号：JP2014183248A
公开(公告)日：2014-09-29
申请号：JP2013057711
申请日：2013-03-21
申请人： Toshiba Corp , 株式会社東芝
发明人： YASUMOTO YASUAKI , YANASE NAOKO , OHARA RYOICHI , MASUKO SHINGO , SANO KENYA , KAKIUCHI YORITO , NODA TAKAO , IIDA ATSUKO
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8234 , H01L25/07 , H01L25/18 , H01L27/06
CPC分类号： G01L1/2293 , H01L24/05 , H01L27/0738 , H01L28/24 , H01L29/1608 , H01L29/7803 , H01L2924/13055 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which is highly reliable.SOLUTION: In a semiconductor device 10, a semiconductor substrate 12 has first and second regions 12a and 12b. An insulated gate field effect transistor 13 is provided in the first region 12a. There is provided a strain gage portion 14 having: a long metal resistor 37 provided more inside than an upper surface of the semiconductor substrate 12, in the second region 12b; a first insulating film 51 which is provided between the semiconductor substrate 12 and the metal resistor 37 and extends to an upper surface of the semiconductor substrate 12; and a second insulating film 53 provided over the first insulating film 51 across the metal resistor 37. The semiconductor substrate 12 is mounted on a substrate 15.
摘要翻译：要解决的问题：提供高可靠性的半导体器件。解决方案：在半导体器件10中，半导体衬底12具有第一和第二区域12a和12b。绝缘栅场效应晶体管13设置在第一区域12a中。提供了一种应变计部分14，其具有：比第二区域12b中的半导体衬底12的上表面更内侧设置的长金属电阻器37; 第一绝缘膜51，设置在半导体基板12和金属电阻器37之间并延伸到半导体基板12的上表面; 以及跨越金属电阻器37设置在第一绝缘膜51上的第二绝缘膜53.半导体基板12安装在基板15上。

6. 发明专利

JP2010219874A Acoustic electronic component and method of manufacturing the same 审中-公开
标题翻译：声学电子元件及其制造方法
公开(公告)号：JP2010219874A
公开(公告)日：2010-09-30
申请号：JP2009064192
申请日：2009-03-17
申请人： Toshiba Corp , 株式会社東芝
发明人： MASUKO SHINGO , OHARA RYOICHI , SANO KENYA , YASUMOTO YASUAKI , YANASE NAOKO
IPC分类号： H04R17/02 , H04R31/00
摘要： PROBLEM TO BE SOLVED: To provide an acoustic electronic component comprising a wire pad having high bonding reliability, and to provide a method of manufacturing the same.
SOLUTION: An acoustic electronic component comprises: a mount substrate 101; a wafer chip 102 disposed on the mount substrate; a wire pad 104 formed on the wafer chip; and a wire 105 connected to the wire pad. The wire pad comprises: a piezoelectric film 131 formed on the wafer chip; and a conductive film 132 formed on the piezoelectric film to form the top layer of the wire pad. The wire is connected to the conductive film at the upper part of the piezoelectric film. The piezoelectric film contains at least either oxygen or nitrogen and the Young's modulus of the piezoelectric film is 200×10
9 [N/m
2 ] or more.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种包括具有高粘合可靠性的焊盘的声学电子部件，并提供其制造方法。解决方案：声学电子部件包括：安装基板101; 设置在安装基板上的晶片芯片102; 形成在晶片芯片上的线焊盘104; 以及与导线焊盘连接的电线105。线焊盘包括：形成在晶片芯片上的压电膜131; 以及形成在压电膜上的导电膜132，以形成线焊盘的顶层。导线连接到压电薄膜上部的导电薄膜。压电膜至少含有氧或氮，压电膜的杨氏模量为200×10 [N / m×SP> 2 ]以上。版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2009077159A Thin-film piezoelectric resonator and method of manufacturing the same 审中-公开
标题翻译：薄膜压电谐振器及其制造方法
公开(公告)号：JP2009077159A
公开(公告)日：2009-04-09
申请号：JP2007244259
申请日：2007-09-20
申请人： Toshiba Corp , 株式会社東芝
发明人： YASUMOTO YASUAKI , YANASE NAOKO , OHARA RYOICHI , MASUKO SHINGO , SANO KENYA , ONO TETSUYA
IPC分类号： H03H9/17 , H01L41/09 , H01L41/18 , H01L41/22 , H01L41/332 , H01L41/39 , H03H3/02
摘要： PROBLEM TO BE SOLVED: To improve a manufacture yield upon forming cavity through etching of a sacrifice layer, in the production of a thin-film piezoelectric resonator. SOLUTION: The thin-film piezoelectric resonator includes a substrate 1, an annular structural supporting body 3 formed on the substrate 1, a protective layer 4 formed on the support 3 so as to cover a cavity part 10 enclosed by the substrate 1 and the annular structural support 3, a lower electrode 5 formed on the protective layer 4 so as to have an aperture above the cavity part 10 and cover the cavity part 10 while covering the whole area of inside rim 21 on the upper surface of the annular structural support 3, a piezoelectric film 6, formed on the lower electrode 5 and the protective layer 4, and an upper electrode 7 arranged above the cavity part 10 and formed on the piezoelectric film 6 while the aperture is formed so as to directly connect the protective layer 4 to the piezoelectric film 6 and is provided with an etching via 9, penetrating through the protective layer 4 from the piezoelectric film 6 and arriving at the cavity part 10. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了在制造薄膜压电谐振器时，通过蚀刻牺牲层来改善在形成腔体时的制造成品率。解决方案：薄膜压电谐振器包括基板1，形成在基板1上的环形结构支撑体3，形成在支撑件3上的保护层4，以覆盖由基板1包围的空腔部分10 和环状结构支撑体3，形成在保护层4上的下部电极5，以在空腔部分10上方具有孔，并覆盖空腔部分10，同时覆盖环形部分10的上表面上的内侧边缘21的整个区域结构支撑体3，形成在下电极5和保护层4上的压电膜6，以及设置在空腔部分10上方并形成在压电膜6上的上电极7，同时形成孔，以便直接连接保护层4到压电膜6并且设置有蚀刻通孔9，从压电膜6穿过保护层4并到达空腔部分10.版权所有（C）2009，JPO和INPIT

8. 发明专利

JP2006237405A Electronic component 审中-公开
标题翻译：电子元件
公开(公告)号：JP2006237405A
公开(公告)日：2006-09-07
申请号：JP2005052099
申请日：2005-02-25
申请人： Toshiba Corp , 株式会社東芝
发明人： MASUKO SHINGO , KOBAYASHI MOTOOMI , SUGIYAMA TORU , KOMATSU AKIRA , SAITO KAZUYUKI
IPC分类号： H01L23/08 , H01L23/02
CPC分类号： H01L2224/16225 , H01L2224/48091 , H01L2224/73265 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide an electronic component in which the package size is reduced while applying such a sealing structure as a predetermined space is formed to surround an element function section. SOLUTION: The electronic component comprises: an element substrate 3 having an element function section 1; a dam 8 formed to surround the element function section 1; a cap 9 bonded to the dam 8 and forming an air gap 10 on the inside; a circuit board 5 mounted on the element substrate 3 and connected electrically therewith; and a resin 11 sealing the element substrate 3. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种其中包围尺寸减小的电子部件，同时施加如预定空间的密封结构以包围元件功能部分。电子部件包括：具有元件功能部1的元件基板3; 形成为围绕元件功能部1的水坝8; 盖9，其结合到坝8并在内侧形成气隙10; 安装在元件基板3上并与其电连接的电路板5; 和密封元件基板3的树脂11.版权所有（C）2006，JPO＆NCIPI

9. 发明专利

JP2012204487A Semiconductor device and method of manufacturing semiconductor device 审中-公开
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：JP2012204487A
公开(公告)日：2012-10-22
申请号：JP2011066078
申请日：2011-03-24
申请人： Toshiba Corp , 株式会社東芝
发明人： NODA TAKAO , MORITSUKA KOHEI , OHARA RYOICHI , SANO KENYA , MASUKO SHINGO
IPC分类号： H01L25/04 , H01L25/18
CPC分类号： H01L2224/49111 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/30107 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device in which an increase in cost, a reduction in a manufacturing yield, and an increase in the area of the device are suppressed, and to provide a method of manufacturing the semiconductor device.SOLUTION: In a semiconductor device 1, a plurality of semiconductor chips 20 and 21 each including a plurality of semiconductor elements 10 are arranged in parallel on a wiring substrate 50. Any of the semiconductor chips arranged in parallel on the wiring substrate 50 are semiconductor chips 20 that do not include a defective element 10B, and the other semiconductor chips are semiconductor chips 21 that include the defective element 10B. Each of the semiconductor chips 20 and 21 is arranged in a matrix shape on the wiring substrate 50 when viewed from the direction perpendicular to a primary surface of the wiring substrate 50. The defective elements 10B are arranged so as to be located at predetermined positions in the region in which the semiconductor chips 20 and 21 are arranged in a matrix shape.
摘要翻译：解决的问题：提供抑制成本增加，制造成品率降低和面积增加的半导体器件，并提供制造半导体器件的方法。解决方案：在半导体器件1中，包括多个半导体元件10的多个半导体芯片20和21平行布置在布线基板50上。平行布置在布线基板50上的任何半导体芯片是不包括缺陷元件10B的半导体芯片20，其他半导体芯片是包括缺陷元件10B的半导体芯片21。当从与布线基板50的主表面垂直的方向观察时，半导体芯片20和21中的每个半导体芯片20和21以矩阵形式布置在布线基板50上。缺陷元件10B布置成位于布线基板50的预定位置其中半导体芯片20和21被布置成矩阵形状的区域。版权所有（C）2013，JPO＆INPIT

10. 发明专利

JP2010118730A Piezoelectric device and method for manufacturing same 审中-公开
标题翻译：压电元件及其制造方法
公开(公告)号：JP2010118730A
公开(公告)日：2010-05-27
申请号：JP2008288608
申请日：2008-11-11
申请人： Toshiba Corp , 株式会社東芝
发明人： OHARA RYOICHI , YANASE NAOKO , YASUMOTO YASUAKI , MASUKO SHINGO , SANO KENYA
IPC分类号： H03H9/17 , H01L41/09 , H01L41/18 , H01L41/22 , H01L41/39 , H03H3/02 , H04R17/02
摘要： PROBLEM TO BE SOLVED: To provide a piezoelectric device capable of improving sensitivity without reducing yield. SOLUTION: The piezoelectric device is provided with a membrane 21 which includes: a base film 13A supported by a leg part 22 constituted so as to surround an aperture 19; a lower electrode 16 formed on the surface of the base film 13A; a piezoelectric film 17 formed on the lower electrode 16 and having no step; and an upper electrode 18 formed on the piezoelectric film 17. A support film for supporting the piezoelectric film 17 and the upper electrode 18 is configured by the base film 13A and the lower electrode 16, and trenches 14, in which one ends are communicatively connected to the aperture 19 and the other ends make the surface of the piezoelectric film 17 exposed, are formed on the support film. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：提供能够提高灵敏度而不降低产量的压电元件。解决方案：压电装置设置有膜21，其包括：基部膜13A，其由围绕孔19构成的腿部22支撑; 形成在基膜13A的表面上的下电极16; 形成在下电极16上并且不具有台阶的压电薄膜17; 以及形成在压电膜17上的上电极18.用于支撑压电膜17和上电极18的支撑膜由基膜13A和下电极16构成，沟槽14的一端连通在支撑膜上形成孔19并使另一端露出压电膜17的表面。版权所有（C）2010，JPO＆INPIT

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