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    • 6. 发明专利
    • Radio relay equipment
    • JP5312865B2
    • 2013-10-09
    • JP2008192771
    • 2008-07-25
    • パナソニック株式会社
    • 隆之 新居昌典 栗田英夫 田中晃 大矢
    • H04J3/08H04B7/212
    • PROBLEM TO BE SOLVED: To provide a wireless relay apparatus which performs normal relay by using one PLL (Phase Locked Loop) circuit even when a different wireless channel is selected for each slot and has a suppressed manufacturing cost. SOLUTION: The wireless relay apparatus includes a BBLSI (Base Band LSI) for outputting control data or the like and a variable frequency oscillation block having one PLL circuit. The PLL circuit includes a fractional divider for dividing frequencies of a VCO and an oscillation signal by fractions. The fractional divider can set a comparison frequency to a high level. The VCO outputs an oscillation signal controlled by oscillation signal frequency deviation processing. In a case shown in (c), the PLL circuit starts the oscillation frequency deviation processing from the fourth-bit after a CRC bit of a present slot. Since time of eleven bits is secured from the fourth-bit after the CRC bit of the present slot to the end of an SS bit of a succeeding slot, the PLL circuit can end the oscillation frequency deviation processing within the time and the wireless relay apparatus normally receives the succeeding slot. COPYRIGHT: (C)2010,JPO&INPIT