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1. 发明专利

JPH07264158A HIGH SPEED BYPASS SYSTEM FOR TIME DIVISION MULTIPLEXER 失效
公开(公告)号：JPH07264158A
公开(公告)日：1995-10-13
申请号：JP4875394
申请日：1994-03-18
申请人： FUJITSU LTD , FUJITSU HOKURIKU TSUSHIN SYST
发明人： SUZUKI TOMOHIRO , MATSUO SEIJI , AIDA JUNICHI
IPC分类号： H04J3/14 , H04J3/00 , H04L29/08 , H04L29/14 , H04Q11/04
摘要： PURPOSE:To obtain the high speed bypass system by using a batch control program to implement batch connection or batch disconnection control of a call and using a communication protocol program to implement connection or disconnection control for each channel in parallel. CONSTITUTION:Upon the receipt of a batch connection notice by a monitor control section 4A, a batch control program 20A makes a batch disconnection request between line set sections to a line interface 1. Thus, a high speed digital line 11 and a line set section 3A are disconnected. Then the control section 4A gives an inter-line set section batch connection request to a line interface section 2. Thus, the set section 3A and a backup line 12 are connected altogether. Simultaneously the line 11 and a line set section 3B are disconnected in an opposite party system and the set section and the line 12 are connected altogether. Thus, time division multiplexers 10A, 10B are connected altogether via the line 12 and then the time required for the connection is considerably reduced.

2. 发明专利

JPH07123070A MULTIPLEXER WITH AUTOMATIC DIAGNOSTIC FUNCTION 失效
公开(公告)号：JPH07123070A
公开(公告)日：1995-05-12
申请号：JP26396293
申请日：1993-10-22
申请人： FUJITSU LTD , FUJITSU HOKURIKU TSUSHIN SYST
发明人： KOIZUMI HIDEYUKI , SAKAI MIYUKI , FUKAGAWA YASUSHI
IPC分类号： H04J3/14 , H04L29/14
摘要： PURPOSE:To easily extend a package automatically even during the operation of the multiplexer by implementing line setting and diagnosis of an extension package automatically when a new package is mounted to the multiplexer. CONSTITUTION:A different kind of internal device 11 is connected between a line 1 and a transmission line 2 in the multiplexer 10 and equipment model information is stored in a storage means 6 in the equipment 11. When the equipment 11 is mounted, a line setting means 15 confirms model information in the means 16 based on the mount location information and obtains line setting information from a storage means 14 and sends the information to a test path setting means 17. The means 17 sets a test path 16 between the new equipment 11 and a test part 4 and controls a loopback circuit 5 to loop back a path 16. Then a diagnosis control means 18 commands execution of a test to the test part 14. Thus, the test part 14 confirms the normality of the equipment 11 and sends the result to the means 18.

3. 发明专利

JPH06334685A MAIL COMMUNICATION EQUIPMENT 失效
公开(公告)号：JPH06334685A
公开(公告)日：1994-12-02
申请号：JP12179093
申请日：1993-05-25
申请人： FUJITSU LTD , FUJITSU HOKURIKU TSUSHIN SYST
发明人： ANDO TORU , OBARA TOSHIO
IPC分类号： G06F13/00 , H04L12/54 , H04L12/58
摘要： PURPOSE:To efficiently inform service completion by optionally selecting a specific user for informing the completion of services in advance beforehand and storing the destination information, terminal kind information and informing information corresponding to a terminal kind beforehand. CONSTITUTION:At the time of ending a mail communication service, a maintenance person inputs a service completion instruction serving both as the instructions of service completion informing processing execution and service completion processing execution to this mail communication equipment 10. When the service completion instruction is inputted, a service completion informing processing means 13 reads the destination information of the specific user and the terminal kind from a destination information storage means 11, then reads the informing information corresponding to the read terminal kind from an informing information storage means 12, lets both correspond to each other and stores them in a transmission information storage part 14. A transmission processing part 15 successively transmits the informing information stored in the transmission information storage part 14 to the specific user specified by the destination information. On the other hand, a service completion processing means 16 starts monitoring the transmission information storage part 14 when the service completion instruction is inputted, controls the transmission processing part 15 and lets the operation of the mail communication equipment 10 end when it is confirmed that the stored informing information is transmitted to all the destinations.

4. 发明专利

JPH06332753A CLASSIFICATION CHANGE DETECTION SYSTEM FOR MOUNTED PACKAGE 失效
公开(公告)号：JPH06332753A
公开(公告)日：1994-12-02
申请号：JP12454293
申请日：1993-05-27
申请人： FUJITSU LTD , FUJITSU HOKURIKU TSUSHIN SYST
发明人： TANAHASHI TOSHIYA
IPC分类号： G06F1/18 , G06F3/00 , G06F11/00 , G06F11/30
摘要： PURPOSE:To save the load of the processing of a control part at the time of detecting the change of the classification of a package, in a method in which the change of the classification of the package mounted at a prescribed place can be detected. CONSTITUTION:This system managing plural packages 1 which transmit package classification information when they are mounted at the prescribed place and a classification information of the package 1 in a package classification information storage part 3 is provided with an old classification information storage means 4a which stores old classification information stored in the package classification information storage part when a control part 2 requests the transmission of the classification information to each package, a new classification information storage means 4b which stores new classification information transmitted from the package, a classification information change detecting circuit 5 which compares the new and old classification information stored in the new classification information storage means 4b and the old classification information storage means 4a, and a classification information update processing means 6 which updates the classification information of the pertinent package of the package classification information storage part 3 when the classification information change detecting circuit 5 detects the difference of the new and old classification information.

5. 发明专利

JPH06105006A VOICE/FACSIMILE CONVERSION DELIVERY SYSTEM 失效
公开(公告)号：JPH06105006A
公开(公告)日：1994-04-15
申请号：JP24808592
申请日：1992-09-17
申请人： FUJITSU LTD , FUJITSU HOKURIKU TSUSHIN SYST
发明人： DEGUCHI TOSHIMI , HANDA TOSHIMITSU
IPC分类号： H04M11/00 , H04N1/00
摘要： PURPOSE:To surely deliver data by one time of delivery and to deliver facsimile data even when a facsimile terminal is busy in a voice/facsimile conversion delivery system for a mailing device which provides mailing service for the voice data and the facsimile data. CONSTITUTION:This system is comprised by providing a voice/facsimile conversion means 100 which converts by recognizing the voice data (DV) transmitted from a telephone terminal 3 to the facsimile data (DF) and delivers it to a prescribed facsimile terminal 4, and a facsimile/voice conversion means 200 which converts by recognizing a character included in the facsimile data (DF) transmitted from the facsmile terminal 4 to the voice data (DV) and delivers it to a prescribed telephone terminal 3.

6. 发明专利

JPH05181810A COMMON DATA MANAGING SYSTEM BETWEEN CPUS 失效
公开(公告)号：JPH05181810A
公开(公告)日：1993-07-23
申请号：JP30994591
申请日：1991-10-29
申请人： FUJITSU LTD , FUJITSU HOKURIKU TSUSHIN SYST
发明人： ODA ATSUKO
IPC分类号： G06F13/38 , G06F15/16 , G06F15/167
摘要： PURPOSE:To efficiently manage common data used by plural CPUs with high reliability and maintainability without using an inter-CPU data communication and a recovery processing in a common data managing system between the CPUs for managing the common data used in common in order to operate plural CPUs in a device provided with plural CPUs for realizing a prescribed function respectively in the device. CONSTITUTION:The system is provided with plural central processing units 4, 5,... and a common memory 6 which can make access from any of these plural central processing units 4, 5... and accumulates management information necessary for each other as common data in order that those plural central processing units 4, 5... are operated. Also, by a fact that each central processing unit 4, 5... updates, refers to and processes the common data of the common memory 6, the common data is centralized between respective central processing units.

7. 发明专利

JPH0573459A INFORMATION COLLECTION PROCESSING CONTROL SYSTEM 失效
公开(公告)号：JPH0573459A
公开(公告)日：1993-03-26
申请号：JP14473291
申请日：1991-06-17
申请人： FUJITSU LTD , FUJITSU HOKURIKU TSUSHIN SYST
发明人： OGURO HIROYUKI
IPC分类号： G06F13/00 , H04Q3/54 , H04Q11/04
摘要： PURPOSE:To attain the improvement of the processing efficiency without delaying the processing with respect to a processing request whose priority is higher. CONSTITUTION:In a data processing system for collecting processing requests received from plural parts 1 to be processed by a polling processing period, and executing its processing by one processing unit each in accordance with priority allocated to plural parts 1 to be processed, this system is provided with a store part 5 for storing temporarily the received processing request by discriminating the part 1 to be processed of the received processing request concerned, a processing table 4 for registering the processing request stored in the store part in accordance with the priority, and a rearranging means 5 for registering again each of the processing requests stored in the store part 5 in the processing table 4 in accordance with their priority at every polling processing, and the polling processing is executed by the processing end to the processing request of the highest priority registered in the processing table 4.

8. 发明专利

JPH0555953A REDUNDANCY TRANSMISSION LINE CHANGEOVER SYSTEM 失效
公开(公告)号：JPH0555953A
公开(公告)日：1993-03-05
申请号：JP21121591
申请日：1991-08-23
申请人： FUJITSU LTD , FUJITSU HOKURIKU TSUSHIN SYST
发明人： YAMAGUCHI TATSUO
IPC分类号： H04B1/74
摘要： PURPOSE:To allow the system to transit to a state after changeover quickly and surely without an invalid operation at changeover and without causing a dead clock state with respect to the redundancy system transmission line changeover system in the digital transmission system provided with active transmission lines of one and plural numbers and a standby transmission line. CONSTITUTION:A changeover control means 102 (202) is provided with an optimizing means 103 (203) deciding an optimum changeover procedure to be transited based on a matrix table or the like by analyzing the operating state of active transmission lines 31-3N and a standby transmission line 3p and the type of a switching signal sent already in the preceding state when no switching signal to be expected based on the changeover procedure is returned from an opposite changeover control means 202 (102) in the control process of the changeover operation of a changeover means 101 (201).

9. 发明专利

JPH0554698A EEPROM CHECK SUM COMPUTATION METHOD 失效
公开(公告)号：JPH0554698A
公开(公告)日：1993-03-05
申请号：JP21328491
申请日：1991-08-26
申请人： FUJITSU LTD , FUJITSU HOKURIKU TSUSHIN SYST
发明人： OGATA AKIATSU
IPC分类号： G06F11/10 , G06F12/16 , G11C16/02 , G11C16/06 , G11C17/00 , G11C29/00 , G11C29/42
摘要： PURPOSE:To provide an EEPROM check sum computation method which reduces the time between the writing of transformation data and computation of a check sum, otherwise the system has to wait a fixed time after writing one block of data. CONSTITUTION:After writing one block worth of transformation data as shown in 1, the binary sum value of one block data prior to a transformation and the binary sum value of the one block data after the transformation are computed while waiting for a fixed time as shown in 2. This computation is done for all blocks which transform the data as shown in 3, the difference between the binary sum value of the data prior to the transformation and the binary sum value of the data after the transformation is obtained for all blocks which transform data as shown in 4 and the check sum is done by adding the difference to the check sum which is computed prior to the data transformation.

10. 发明专利

JPH0553919A METHOD FOR PREVENTING ABNORMAL MEMORY ACCESS 失效
公开(公告)号：JPH0553919A
公开(公告)日：1993-03-05
申请号：JP21328391
申请日：1991-08-26
申请人： FUJITSU LTD , FUJITSU HOKURIKU TSUSHIN SYST
发明人： YAMASHITA HIDEKI
IPC分类号： G06F11/00 , G06F12/14 , G06F21/02
摘要： PURPOSE:To prevent write to a RAM at read timing a processor equipped with the RAM which executes write only at fixed timing and executes read at the other timing. CONSTITUTION:This method is equipped with a write preventing circuit 3 and a control means 4 to turn the write preventing circuit 3 to an inactive state in the case of starting write to a memory 2 by a processor 1 and to turn the write preventing circuit 3 to an active state in the case of completing the write. When the write preventing circuit 3 is turned to the active state in the control of the control means 4, the write preventing circuit 3 monitors a write signal on a data bus 6 and an address signal on an address bus 5 and in the case of detecting the write signal when the address signal is the address of the memory 2, a stop signal is outputted to the processor 1.

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