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81. 发明专利

JPH05273958A 失效
公开(公告)号：JPH05273958A
公开(公告)日：1993-10-22
申请号：JP13200091
申请日：1991-05-08
IPC分类号： B41J2/485 , G06F3/153 , G06K15/02 , G06T5/30 , G06T11/20 , G09G5/20 , G09G5/24 , G06F15/66 , G06F15/72
摘要： PURPOSE:To provide an outline data processor which economizes storage regions and does not require any excess storage means in the case of processing and generating characters having the plural kinds of line width. CONSTITUTION:A character ROM 3 of the outline data processor is divided into a coordinate value data area 21 and an attribute flag area 22, and the coordinate value data area 21 is further divided into a regular area 211 storing the coordinate value data of characters having the standard line width and a bold area 212 storing the coordinate values of characters which line width is thicker than the standard line width. The attribute flag area 22 stores an attribute flag common for the regular characters and the bold characters. Based on this character ROM 3, outline data are developed.

82. 发明专利

JPH05266206A 失效
公开(公告)号：JPH05266206A
公开(公告)日：1993-10-15
申请号：JP6361092
申请日：1992-03-19
IPC分类号： G09G5/20 , G06T11/20 , G06F15/72
摘要： PURPOSE:To faithfully plot a straight line by moving a straight line in parallel in horizontal and vertical directions to convert it to a new straight line and expanding picture element strings on first and last lattice lines and lattice lines between them of the straight line in a memory by the number of lattice lines. CONSTITUTION:A plotting processor 1 moves a straight line in parallel in horizontal and vertical directions in the range of a lattice interval to convert it to a new described straight line. The number of horizontal or vertical lattice lines where the described straight line will be plotted is obtained. The picture element string start dot and the number of picture elements on the lattice line to be plotted in the lowermost or leftmost position of the drawn straight line are obtained to plot picture elements in a picture element memory 2, and picture element string start points and numbers of picture elements on intermediate lattice lines are obtained to describe picture elements in the memory 2, and the picture element string start dot and the number of picture elements on the lattice line to be plotted in the uppermost or rightmost position of the plotted straight line are obtained to plot picture elements in the memory 2, thus terminating plotting of the straight line in the picture element memory 2.

83. 发明专利

JPH05265428A 失效
公开(公告)号：JPH05265428A
公开(公告)日：1993-10-15
申请号：JP6484692
申请日：1992-03-23
IPC分类号： G09G5/20 , G06T11/20 , G06T11/40 , G09G5/22 , G09G5/24 , G06F15/72
摘要： PURPOSE:To shorten the time required for conversion by providing a converting means with >=2 kind of converting methods and performing the data conversion by using a method specified by a converting method indicating means. CONSTITUTION:This device is equipped with a storage means 0 which include an outline data storage means 1 for storing outline data of characters and a converting method indication data storage means 2 for storing converting method indication data, a converting method indicating means 3 which indicates the converting method, and a data converting means 4 which has 42 kind of methods for converting outline data according to the indication. When the outline data on the characters are converted into dot data, the outline data on the characters and converting method indication data are read out of the storage means 0 and the converting method indicating means 3 indicates a converting means to the data converting means 4 according to the converting method indication data. The data converting means 4 converts the outline data into the dot data by using the indicated converting means.

84. 发明专利

JPH0569230B2 失效
公开(公告)号：JPH0569230B2
公开(公告)日：1993-09-30
申请号：JP50149984
申请日：1984-03-27
申请人： ERICSSON TELEFON AB L M
发明人： REDEIN DAN BAATEIRU
IPC分类号： G06F3/153 , G09G5/02 , G09G5/20 , G09G5/36 , G09G5/42

85. 发明专利

JPH05233821A 失效
公开(公告)号：JPH05233821A
公开(公告)日：1993-09-10
申请号：JP3589392
申请日：1992-02-24
申请人： JAPAN RADIO CO LTD
发明人： YAMATO SACHIO , YAMANE DAISAKU , MIURA HIROSHI , ISHIKAWA MASAJI , SUDOU YUUKI
IPC分类号： G06F3/153 , G06T11/20 , G09G5/20 , G06F15/72
摘要： PURPOSE:To realize much higher speed in bold line plotting performance with less generated vectors. CONSTITUTION:When it is discriminated by a bold/thin line discriminator 16 that a line is bold, the inclinating angle of this bold line is calculated by an inclining angle calculator 20. Corresponding to the inclining angle calculated by the inclining angle calculator 20, a starting point coordinate output pattern at a bold line pattern generator 18 is selected. This pattern is set so as to fix the apparent thickness of the bold line regardless of the inclination, to reduce the number of vectors generated in the case of plotting the bold line and to prevent the head or the like of the bold line from being round. Thus, the high-speed plotting of the bold line, the fixing of thickness and the prevention of roundness can be realized.

86. 发明专利

JPH0560597B2 失效
公开(公告)号：JPH0560597B2
公开(公告)日：1993-09-02
申请号：JP4752685
申请日：1985-03-12
申请人： NIPPON AVIONICS CO LTD
发明人： KOJIMA HIDEKAZU , SUGANO TOSHIO
IPC分类号： G09G5/20 , G09G1/16

87. 发明专利

JPH05216422A ELLIPTIC PATTERN GENERATING CIRCUIT 失效
公开(公告)号：JPH05216422A
公开(公告)日：1993-08-27
申请号：JP4187092
申请日：1992-01-31
申请人： VICTOR COMPANY OF JAPAN
发明人： ASUKE TSUTOMU
IPC分类号： G09G1/16 , G09G1/00 , G09G5/20 , H04N5/262
摘要： PURPOSE:To provide the elliptic pattern generating circuit which can easily set an elliptic pattern center and change the size thereof with simplified constitution. CONSTITUTION:Counting is executed linearly in the positive direction from the central horizontal coordinates of a negative value in a counter 22 of a horizontal parabola wave generating section 20. This count value is integrated by an integrator consisting of an adder 24 and a data latch circuit 26, thereby the parabola waveform in a horizontal direction is obtd. The parabola waveform in the perpendicular direction is similarly obtd. in a perpendicular parabola wave generating section 30. The elliptic pattern 50 is obtd. if these waveforms are added by an adder 42 of a comparison section 40 and the result thereof is compared with the threshold value in a comparator 44.

88. 发明专利

JPH0551919B2 失效
公开(公告)号：JPH0551919B2
公开(公告)日：1993-08-03
申请号：JP12531480
申请日：1980-09-11
申请人： CANON KK
发明人： KITAMURA TAKASHI
IPC分类号： B41B19/00 , B41J2/44 , B41J2/485 , B43L13/00 , G03G15/22 , G06F3/12 , G06F3/153 , G06K15/00 , G06K15/02 , G06K15/12 , G09G5/20 , G09G5/40 , H04N1/00

89. 发明专利

JPH05188906A GRAPHIC DISPLAY DEVICE 失效
公开(公告)号：JPH05188906A
公开(公告)日：1993-07-30
申请号：JP368492
申请日：1992-01-13
申请人： JAPAN RADIO CO LTD
发明人： YAMATO SACHIO , MIURA HIROSHI , YAMANE DAISAKU , ISHIKAWA MASAJI , SUDOU YUUKI
IPC分类号： G06F3/153 , G06T11/40 , G09G5/20 , G09G5/36
摘要： PURPOSE:To improve the drawing performance by generating the write enable pattern of an image memory according to the pattern of data read out of a memory dedicated to a painting-out frame and using the page mode/read modify write cycle of the image memory. CONSTITUTION:A panting-out controller 18 and the memory 16 dedicated to the panting-cut frame, and the painting-out controller 18 and the image memory 12 are connected directly and respectively. The painting-out controller 18 supplies common RAS, CAS, and ADDRESS to the memory 16 dedicated to the painting-out frame and image memory 12 and reads data WDATA out of the memory 16 dedicated to the painting-out frame. The painting-out controller 18 after reading the WDATA out of the memory 16 supplies write enable WWE- to the memory 16 and write enable UWE- to the image memory 12 respectively and utilizes the page mode/read modify write cycle of the image memory 12 to write data obtained by interpolating the inside of an external frame. A converting circuit which is composed of EOR gates as a parallel type converts the WDATA pattern into the UWE pattern. Consequently, the drawing performance of the graphic display device is greatly improved.

90. 发明专利

JPH05134843A FRAME BUFFER ACCESS DEVICE 失效
公开(公告)号：JPH05134843A
公开(公告)日：1993-06-01
申请号：JP29749891
申请日：1991-11-13
申请人： DAIKIN IND LTD
发明人： IKEDA SHIGETSUGU
IPC分类号： G09G5/20 , G06F3/153 , G06T11/00 , G09G5/36
摘要： PURPOSE:To accelerate drawing processing speed when parallelly executing the drawing of a two-dimensional graphic and the drawing of a three- dimensional graphic. CONSTITUTION:When the drawing of the two-dimensional graphic is executed to a frame buffer 5 by a drawing processing part 4 based on commands and data outputted from a processor 1, the commands and data from a GA 2 are selected through a FIFO memory 2b for output by a command selection part 3 corresponding to the halt time of the drawing processing part 4, and the drawing of the three-dimensional graphic is executed to the frame buffer 5 by the drawing processing part 4.

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