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71. 发明专利

JPH02132981A METHOD AND DEVICE FOR PROCESSING SIGNAL 失效
公开(公告)号：JPH02132981A
公开(公告)日：1990-05-22
申请号：JP15938789
申请日：1989-06-21
申请人： MARCONI GEC LTD
发明人： SAIMON HAWAADO SUPENSAA
IPC分类号： H04N5/21 , H03D1/00 , H04N5/217
摘要： PURPOSE: To remove a noise, and to extract a valid signal by operating a filter processing for holding a signal including upper and lower side wavebands including valid information and a sampling frequency, and demodulating it by a balanced demodulator. CONSTITUTION: A signal sampling-processed and scanned from a CCD array is transmitted to a high-pass filter 1. A low frequency is interrupted in the filter 1, and this low frequency part includes a large part of noises and raw signal information. A signal passing through the filter 1 is transmitted through a low-pass filter 2, amplified by an amplifier 3, and transmitted to a balanced demodulator 4. The demodulator 4 operates as a detector similar to an RF detector, and a modulated wave is detected from a carrier wave signal. In this stage, a certain amount of residual noises are included. The signal is amplified by an amplifier 5, and transmitted through a low-pass filter 6 so that the most of the noises can be eliminated.

72. 实用新型

JPH021636Y2 失效
公开(公告)号：JPH021636Y2
公开(公告)日：1990-01-16
申请号：JP3260683
申请日：1983-03-07
IPC分类号： H03D3/00 , G06G7/18 , G06G7/184 , H03D1/00

73. 发明专利

JPH027603A PEAK HOLD CIRCUIT 失效
公开(公告)号：JPH027603A
公开(公告)日：1990-01-11
申请号：JP15773088
申请日：1988-06-24
申请人： SONY CORP
发明人： SEKINE MASATO , SHOJI NORIO
IPC分类号： G01R19/04 , G11B21/10 , H03D1/00
摘要： PURPOSE:To reduce the time required for the circuit rising and trailing with simple constitution as a whole by applying on/off control to transistors(TRs) being components of a peak detection circuit through the use of an unsaturated TR circuit. CONSTITUTION:The title circuit consists of the peak detection circuit Q3 of emitter follower circuit configuration whose emitter is connected to a charge/ discharge capacitor 13 and of the unsaturated TR circuits 15-17, Q5-Q7. Then a base voltage VB1 of a TR Q3 driving the charge/discharge capacitor 13 is switched into a prescribed voltage VBE by using unsaturated TR circuits 15-17, Q5-Q7. Thus, the time required for the circuit rising and trailing is reduced with simple constitution as a whole.

74. 发明专利

JPH0160965B2 失效
公开(公告)号：JPH0160965B2
公开(公告)日：1989-12-26
申请号：JP8430183
申请日：1983-05-12
申请人： MITSUBISHI ELECTRIC CORP
发明人： ISHIKAWA HITOSHI , KANO KENJI
IPC分类号： H02M7/21 , H02M7/217 , H03D1/00 , H03D1/18

75. 发明专利

JPH01284003A HALF WAVE RECTIFIER CIRCUIT AND PEAK HOLD CIRCUIT 失效
公开(公告)号：JPH01284003A
公开(公告)日：1989-11-15
申请号：JP11324588
申请日：1988-05-10
申请人： TOSHIBA CORP
发明人： HAYASHIBARA MIKIO , TANIMOTO HIROSHI
IPC分类号： G11C27/00 , H02M7/21 , H03D1/00 , H03D1/10
摘要： PURPOSE:To eliminate the need for a voltage comparator so as to reduce the current consumption and to obtain a circuit suitable for a device such as a handy radio equipment employing a battery as its power supply by adopting the constitution such that a MOS transistor(TR) of a diode constitution is used to attain rectification and peak hold. CONSTITUTION:The circuit is provided with an operational amplifier 10 receiving an input signal vin while connecting a resistor R1 in series between an inverting input terminal (-) and a noninverting input terminal (+), and a P- channel and an N-channel MOS TR 11, 12 whose gate and drain are respectively short-circuited. The MOS TRs 11, 12 act like diodes causing a current to flow from a point (b) to an output terminal OUT or from a point (a) to the point (b) only. Thus, a ground voltage (0v) is outputted at the output terminal OUT when the input signal vin is over a ground voltage and a voltage of -(R2/R1)vin is outputted at the output terminal OUT when the input signal vin is a negative voltage respectively, thereby acting the circuit like a half wave rectifier circuit.

76. 发明专利

JPH01204511A DEMODULATION CIRCUIT 失效
公开(公告)号：JPH01204511A
公开(公告)日：1989-08-17
申请号：JP2912588
申请日：1988-02-10
申请人： SONY CORP
发明人： ARAKI AKISHI
IPC分类号： H03D1/00 , H03D3/00 , H04N5/445
摘要： PURPOSE:To obtain a proper demodulation output with low cost by obtaining an A/D conversion value respectively as to plural points in one cycle of an AM signal in a demodulation circuit demodulating an AM signal, integrating the result and comparing the integrated value with a maximum value obtained in this way so as to obtain a demodulation output. CONSTITUTION:A signal Sd is extracted by a reception means 1, an undesired signal component is eliminated from the signal Sd by a band pass filter 2 and the result is fed to an A/D comparator 4 through a gain control circuit 3. A level of plural points is subject to A/D conversion with respect to one cycle of the AM signal Sa, the integration value of the A/D conversion value is obtained and the maximum value of the integration value obtained similarly is divided by the integration value to obtain an original picture data. Thus, even when one cycle of take AM signal Sa represents the gradation of one picture element, the picture data is obtained correctly for each cycle and the gradation of the adjacent picture element is not affected. Thus, the demodulation with low cost and excellent noise performance is obtained.

77. 发明专利

JPH01202904A LEVEL DETECTION CIRCUIT 失效
公开(公告)号：JPH01202904A
公开(公告)日：1989-08-15
申请号：JP2838888
申请日：1988-02-08
申请人： NIPPON ELECTRIC IC MICROCOMPUT
发明人： MORI YUKI
IPC分类号： G01R19/22 , H03D1/00
摘要： PURPOSE:To prevent the reduction of detection sensitivity due to an undesired output and deterioration in the temperature characteristic by providing a means to avoid the production of an undesired output caused by an idling current. CONSTITUTION:The circuit consists of a circuit generating a compensation idling current comprising an NPN transistor 23, an NPN transistor 22 of diode connection and a resistor 24. Then the compensation idling current is generated to cancel and compensate the effect of the idling current generated even at no input of an AC signal as a collector current of the NPN transistor. When an AC signal is applied to an input terminal 1, the current rectified in half-wave flows to the collector of the NPN transistor 2, the current is outputted via PNP transistors 9, 11 and a smooth output is obtained at an output terminal 14. Thus, level detection is applied, where only a DC voltage proportional to the AC signal is obtained.

78. 发明专利

JPH01116454A FULL-WAVE RECTIFYING CIRCUIT 失效
公开(公告)号：JPH01116454A
公开(公告)日：1989-05-09
申请号：JP27492187
申请日：1987-10-30
申请人： NEC CORP
发明人： IKEUCHI TAKAO
IPC分类号： G01R19/22 , H02M7/21 , H03D1/00
摘要： PURPOSE:To reduce a time constant of a peak holding circuit at the rear stage of a full-wave rectifying circuit to a half than ever by arranging first and second transistors to convert an input signal into current values through detection of its peak and bottom values CONSTITUTION:When a sine wave signal is inputted into an input terminal, current flowing through a transistor 1(2) increases or decreases according to the size of an input signal from the time when a potential at a point A reaches a value enough to make the transistor 1(2) conduct if at a positive (negative) level. The peak value of the current corresponds to a peak value (bottom value) of an input signal. A transistor 2(1) is turned OFF as a potential difference between the base and emitter thereof falls below a value enough to make it conduct. By repeating this operation at the positive or negative level, a current waveform develops at a point of B as illustrated. A change in the current is extracted as change in a voltage with a resistance 5 to detect a peak value and a bottom value of the input signal, thereby achieving full-wave rectification.

79. 实用新型

JPH0167830U 失效
公开(公告)号：JPH0167830U
公开(公告)日：1989-05-01
申请号：JP16384787
申请日：1987-10-27
IPC分类号： G06F7/00 , H03D1/00 , H03G11/08 , H03M1/10

80. 实用新型

JPS642555Y2 失效
公开(公告)号：JPS642555Y2
公开(公告)日：1989-01-20
申请号：JP9101781
申请日：1981-06-19
IPC分类号： H02M7/21 , H02M7/217 , H03D1/00

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