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    • 74. 发明专利
    • HIGH RESISTANCE RESISTOR
    • JPS6224661A
    • 1987-02-02
    • JP16314785
    • 1985-07-24
    • SONY CORP
    • NISHIHARA TOSHIYUKI
    • H01L27/04H01C7/00H01L21/822H01L29/8605
    • PURPOSE:To obtain a high resistance resistor suitable for SRAM and the like by hydrogenation of a polycrystalline silicon resistor. CONSTITUTION:A polycrystalline Si resistor is subjected to a hydrogenizing treatment to increase its resistance value. For instance, on an insulation layer 1 obtained by oxidation of Si, a polycrystalline Si layer 2 is formed out of SiH4 by a depressurized CVD method and an SiO2 film 3 is formed on the polycrystalline Si layer 2 by a CVD method. The SiO2 film 3 is subjected to photoetching and As ions are implanted into the contact parts of the polycrystalline Si layer 2 and then Al electrodes 4 are formed. Then an SiN film 5 is formed over the electrodes 4 and the SiO2 film 3 by a plasma CVD method. The plasma CVD is carried out with SiH4 gas and NH3 gas at 250 deg.C and H ions from SiH4 are implanted into the polycrystalline resistor 2 through the SiO2 film 3. After the SiN film 5 is formed, this resistor is annealed.
    • 75. 发明专利
    • SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    • JPS61292951A
    • 1986-12-23
    • JP13401885
    • 1985-06-21
    • HITACHI LTD
    • KOIKE ATSUYOSHIIKEDA SHUJINAGASAWA KOICHI
    • H01L27/04H01L21/822H01L21/8244H01L23/532H01L27/10H01L27/11H01L29/49H01L29/8605
    • PURPOSE:To inhibit the dispersion of the resistance value of a high resistance element by interposing a stopper layer suppressing a diffusion to the outside of an impurity reducing the resistance value to the upper section of a first conductive layer, in which the impurity is diffused, and forming a second conductive layer. CONSTITUTION:A P type well region 2 is shaped onto an N type semiconductor substrate 1, and field insulating films 3 are formed to the upper sections of the main surfaces of the well region 2 and P-type channel stopper regions 4 to the main surface sections. Gate insulating films 5 are shaped to the upper sections of the main surfaces of the well region 2, and the insulating films 5 in direct contact-forming regions are removed to form connecting holes 5A. A polycrystalline silicon film 6a, in which an impurity such as phosphorus or arsenic is diffused, and a molybdenum silicide film 6b are laminated in succession. N type semiconductor regions are shaped to the main surface sections of the well region 2 connected to the polycrystalline silicon film 6a through the connecting holes 5A. A stopper layer 7 is formed to the upper section of the molybdenum silicide film 6b. Accordingly, an out-diffusion to the outside by the suction effect of the molybdenum silicide film 6b of the impurity in the polycrystalline silicon film 6a can be inhibited, thus reducing the resistance value of the polycrystalline silicon film 6a.
    • 79. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPS60231352A
    • 1985-11-16
    • JP8664284
    • 1984-04-28
    • FUJITSU LTD
    • SHIRATO TAKEHIDE
    • H01L27/04H01L21/822H01L29/8605
    • PURPOSE:To implement high performance, long life and high degree of integration in high-voltage semiconductor integrated circuit device having a high voltage driving circuit in which a high-withstand-voltage high-resistance element is built in, by connecting an electrode, which is arranged on the upper part of a high-withstand-voltage high-resistance layer through an insulating film, to a fixed potential. CONSTITUTION:A high-resistance element comprises a high-resistance layer 16 and p type regions 15a and 15b. The element is isolated from a channel stopper 13 by a low concentration region 17 and an isolating part 22 for an active region 21 and the channel stopper 13. Thus high withstand voltage is readily insured. To a bias electrode 23, a potential on the side where carrier is stored, i.e., the negative potential with respect to a substrate 11, is applied. Thus a back bias effect to the high-resistance layer 16 is alleviated. The cutoff phenomenon of the high resistance layer, the large increase in resistance value and the like are prevented. The ions of contaminated material, which have entered in an insulating film 18, are attracted and fixed by the bias electrode 23. The change with time in resistance value due to the storage of ion charges is prevented.
    • 80. 发明专利
    • Bipolar integrated circuit device
    • 双极集成电路设备
    • JPS60214553A
    • 1985-10-26
    • JP7203284
    • 1984-04-11
    • Nec Ic Microcomput Syst Ltd
    • KONNO YASUMI
    • H01L27/04H01L21/822H01L27/08H01L29/78H01L29/8605
    • H01L29/8605H01L27/0802H01L29/78
    • PURPOSE:To enable to change the resistivity of the resistive element into a variable one without increasing the area of the chip by a method wherein an MOS transistor is constituted of an interlayer insulating film formed on the resistive element region and a wiring forming layer formed on the interlayer inslating film and the gate voltage of this MOS transistor is made to change. CONSTITUTION:An MOS transistor can be constituted in a structure, wherein one side of a sensitive element layer, such as 3, is used as a source and the other side, such as 3', is used as a drain, a wiring forming layer 6 is used as a gate and an interlayer insulating film 4 is used as a gate insulating film. According to such a way, a resistor of a variable sensitivity results in being placed in parallel with a conventional semiconductor resistive element by making the gate voltage of the MOS transistor change, thereby enabling to change the resistance.
    • 目的:为了使电阻元件的电阻率变为可变电阻元件,不增加芯片的面积,其中MOS晶体管由形成在电阻元件区域上的层间绝缘膜和形成在电阻元件区域上的布线形成层 使层间绝缘膜和该MOS晶体管的栅极电压发生变化。 构成:MOS晶体管可以构成为其中使用诸如3的敏感元件层的一侧作为源极,并且将诸如3'的另一侧用作漏极的结构,布线形成层 6用作栅极,层间绝缘膜4用作栅极绝缘膜。 根据这种方式,通过使MOS晶体管的栅极电压发生变化,可变灵敏度的电阻器与常规半导体电阻元件并联放置,从而能够改变电阻。