会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 71. 发明专利
    • Semiconductor optical element and method for manufacturing the same
    • 半导体光学元件及其制造方法
    • JP2011124390A
    • 2011-06-23
    • JP2009280938
    • 2009-12-10
    • Opnext Japan Inc日本オプネクスト株式会社
    • HAYAKAWA SHIGENORIOKAMOTO KAORUSAKUMA YASUSHIWASHINO TAKASHI
    • H01S5/227H01S5/026
    • PROBLEM TO BE SOLVED: To provide a semiconductor optical element including a buried layer formed stably and having high resistance while suppressing interdiffusion with Zn contained in a mesa stripe structure; and to provide a method for manufacturing the semiconductor optical element.
      SOLUTION: A buried layer arranged adjacent to both sides of a mesa stripe structure and containing a semiconductor to which one or more impurities containing ruthenium are added includes a first buried layer and a second buried layer. The first buried layer comprises a semiconductor layer formed in contact with the mesa stripe structure and added with ruthenium; and the second buried layer comprises a semiconductor layer added with other metal imparting an impurity level to a deep level of a forbidden band of ruthenium and the semiconductor.
      COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:提供一种半导体光学元件,包括稳定形成并具有高电阻的掩埋层,同时抑制与台面条纹结构中包含的Zn的相互扩散; 并提供一种半导体光学元件的制造方法。 解决方案:邻近台面条状结构的两侧布置且包含添加有一种或多种含有钌的杂质的半导体的掩埋层包括第一掩埋层和第二掩埋层。 第一掩埋层包括形成为与台面条状结构接触并加入钌的半导体层; 并且第二埋层包括添加有其他金属的杂质水平的半导体层,以使得钌和半导体的禁带的深度水平。 版权所有(C)2011,JPO&INPIT
    • 72. 发明专利
    • Optical receptacle
    • 光学接收器
    • JP2011118274A
    • 2011-06-16
    • JP2009277464
    • 2009-12-07
    • Opnext Japan Inc日本オプネクスト株式会社
    • NOGAWA KENTA
    • G02B6/42H01S5/022
    • PROBLEM TO BE SOLVED: To provide an optical receptacle which can reduce the size of an optical isolator. SOLUTION: The optical receptacle includes a holder 10, that holds a sleeve 16 to which an optical fiber 18 is inserted, an optical element 26 that is arranged so as to be optically connected to the optical fiber 18 and that converts between an optical signal and an electrical signal;, and the optical isolator 30 that is fixed, at a position closer to the optical element 26 than to the region where the optical fiber 18 inside a sleeve 16 is fixed. COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:提供可以减小光隔离器尺寸的光学插座。 解决方案:光学插座包括保持器10,保持器10保持插入有光纤18的套筒16,光学元件26被布置成光学连接到光纤18,并且在光纤18之间转换 光学信号和电信号;以及光学隔离器30,其被固定在比在套筒16内的光纤18固定的位置更靠近光学元件26的位置处。 版权所有(C)2011,JPO&INPIT
    • 74. 发明专利
    • Modulator integrated laser
    • 调制器集成激光
    • JP2011044753A
    • 2011-03-03
    • JP2010270040
    • 2010-12-03
    • Opnext Japan Inc日本オプネクスト株式会社
    • WASHIMI SEIJINAOE KAZUHIKOKAGAYA OSAMU
    • H01S5/026
    • PROBLEM TO BE SOLVED: To provide a modulator integrated laser having a positive or negative single power source.
      SOLUTION: The EA (Electro-Absorption) modulator-integrated laser operated by injecting a positive current into a semiconductor laser part and applying a positive voltage to an EA modulator can be provided by forming a structure in which a semiconductor laser part with an MQW (Multi Quantum Well) 102 and a p-type clad layer 104 laminated on an n-type semiconductor substrate 100, and an EA modulator part with a p-type clad layer 104, an MQW 202 and an n-type clad layer 105 laminated on the semiconductor substrate 100 are integrated with each other.
      COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:提供具有正或负单电源的调制器集成激光器。 解决方案:通过向半导体激光器部分注入正电流并向EA调制器施加正电压来操作的EA(电吸收)调制器集成的激光器可以通过形成其中半导体激光器部分与 层叠在n型半导体衬底100上的MQW(多量子阱)102和p型覆盖层104以及具有p型覆盖层104,MQW 202和n型覆盖层的EA调制器部 层叠在半导体衬底100上的衬底105彼此一体化。 版权所有(C)2011,JPO&INPIT
    • 75. 发明专利
    • Optical reception module, optical receiver, and electronic circuit
    • 光接收模块,光接收器和电子电路
    • JP2011004269A
    • 2011-01-06
    • JP2009146824
    • 2009-06-19
    • Opnext Japan Inc日本オプネクスト株式会社
    • MATSUE DAIYUENDO MASARUTOKITA SHIGERU
    • H04B10/40H04B10/07H04B10/079H04B10/50H04B10/60H04B10/69
    • PROBLEM TO BE SOLVED: To provide an optical reception module, an optical receiver, and an electronic circuit by which a function of detecting the interruption of a received optical signal can be mounted into the optical reception module while reducing its size.SOLUTION: The optical reception module 2 includes a photodiode 20 for converting a received optical signal to an electric signal, an LOS detection circuit 23 for detecting the interruption of the optical signal based on the electric signal, and a pair of differential output terminals 26-4 (that is, a differential output terminal 26-4-1 and a differential output terminal 26-4-2) for synthesizing a first signal corresponding to the electric signal and a second signal corresponding to the result of the detection of the signal interruption by the LOS detection circuit 23 and outputting the synthesized signals.
    • 要解决的问题:提供一种光接收模块,光接收器和电子电路,通过该光接收模块,光接收器和电子电路,可以在减少其尺寸的同时将接收的光信号的中断检测功能安装到光接收模块中。解决方案:光 接收模块2包括用于将接收的光信号转换为电信号的光电二极管20,用于基于电信号检测光信号中断的LOS检测电路23和一对差分输出端子26-4 ,差分输出端子26-4-1和差分输出端子26-4-2),用于合成对应于电信号的第一信号和对应于通过LOS检测的信号中断检测结果的第二信号 电路23并输出合成信号。
    • 76. 发明专利
    • Semiconductor device
    • 半导体器件
    • JP2010267647A
    • 2010-11-25
    • JP2009115364
    • 2009-05-12
    • Opnext Japan Inc日本オプネクスト株式会社
    • KOMATSU KAZUHIROTOYONAKA TAKASHIWASHINO TAKASHISAKUMA YASUSHIHAMADA HIROSHI
    • H01L31/10
    • PROBLEM TO BE SOLVED: To achieve high-speed response characteristic by reducing the parasitic capacitance of a wiring to the top of mesa in a semiconductor device such as an element for optical communication having a mesa-type photodiode. SOLUTION: In the semiconductor device, a laminate of an n-type cladding layer 12b, an absorbing layer 12c, a p-type cladding layer 12d and a p-type high concentration layer 12e is formed in a mesa type on an n-type high concentration layer 12a formed on the surface of a substrate 11 and used as a cathode of the photodiode. Side surfaces of the laminate and side surfaces of the n-type high concentration layer 12a each have a portion forming wall surfaces continuing to each other and reaching from the surface of the substrate 11 to the p-type high concentration layer 12e without causing a step difference. A wiring 19d for connecting layers between a horizontal wiring 19a disposed on the substrate 11 to the layer of the p-type high concentration layer 12e as an anode of the photodiode is disposed along the wall surfaces. COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:通过在诸如具有台面型光电二极管的光通信元件等半导体器件中降低到台面顶部的布线的寄生电容来实现高速响应特性。 解决方案:在半导体器件中,n型包覆层12b,吸收层12c,p型包覆层12d和p型高浓度层12e的层叠体以台面形式形成在 n型高浓度层12a形成在基板11的表面上并用作光电二极管的阴极。 层叠体的侧面和n型高浓度层12a的侧面各自具有形成壁面的部分,从而从基板11的表面延伸到p型高浓度层12e,而不会产生台阶 区别。 布置在布置在基板11上的水平布线19a与作为光电二极管的阳极的p型高浓度层12e的层之间的布线19d布置在壁表面上。 版权所有(C)2011,JPO&INPIT
    • 79. 发明专利
    • Method of manufacturing optical semiconductor module and optical semiconductor module
    • 制造光学半导体模块和光学半导体模块的方法
    • JP2010186800A
    • 2010-08-26
    • JP2009028481
    • 2009-02-10
    • Opnext Japan Inc日本オプネクスト株式会社
    • NAKAMURA ATSUSHIINOUE HIROTAKATANMACHI SUSUMUTAKIZAWA YASUSHIYAMASHITA SHIGEO
    • H01S5/022
    • PROBLEM TO BE SOLVED: To provide a technology for nondestructively inspecting an amount of displacement of an optical semiconductor chip relative to a sub-mount after mounting in an optical semiconductor module of which an optical semiconductor chip is mounted in a support substrate (sub-mount) by using a junction down method.
      SOLUTION: In mounting an optical semiconductor chip 1 in a sub-mount 20, an Au plated layer 11 formed on ridge portions 8a, 8b of the optical semiconductor chip 1 and a plated layer 22 formed on sub-mount electrodes 21a, 21b of the sub-mount 20 are overlapped. If a first electrode 13 for confirming a mounting position formed on the optical semiconductor chip 1, and a second electrode 23 and a third electrode 24 for confirming a mounting position formed on the sub-mount 20 are brought into contact with one another, and the second electrode 23 and the third electrode 24 are connected electrically, an amount of displacement between the optical semiconductor chip 1 and the sub-mount 20 is determined to be within a tolerance.
      COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:提供一种技术,用于在将光学半导体芯片安装在支撑基板上的光学半导体模块中安装之后,非光学半导体芯片相对于副安装座的位移量的非破坏性检查( 子安装)通过使用结合法。 解决方案:在将光学半导体芯片1安装在副底座20中时,形成在光学半导体芯片1的脊部8a,8b上的Au镀层11和形成在副安装电极21a上的镀层22, 21b的重叠。 如果用于确认形成在光学半导体芯片1上的安装位置的第一电极13和用于确认形成在副底座20上的安装位置的第二电极23和第三电极24彼此接触, 第二电极23和第三电极24电连接,光半导体芯片1和副底座20之间的位移量被确定在公差以内。 版权所有(C)2010,JPO&INPIT
    • 80. 发明专利
    • Semiconductor laser element
    • 半导体激光元件
    • JP2010165869A
    • 2010-07-29
    • JP2009007019
    • 2009-01-15
    • Opnext Japan Inc日本オプネクスト株式会社
    • YASUHARA NOZOMINAKAMURA ATSUSHI
    • H01S5/343H01S5/12H01S5/227
    • PROBLEM TO BE SOLVED: To provide a high performance semiconductor laser by improving differential gain also while making increase of number (N
      w ) of quantum well layers compatible with that of strain amount (ε
      w ) and layer thickness (L
      w ) within limit of critical film thickness in a strain multiple quantum well semiconductor laser.
      SOLUTION: The strain amount as an entire of the multiple quantum well layers is reduced by allowing part of a group of the quantum well layers and barrier layers to be formed by average strain which is a small value or whose code is inverse even if the group of the quantum well layers and barrier layers having the average large strain value is formed in the other part. In the quantum well layer with the small strain amount, the difference of energy between an electron and hole is made smaller than that of the energy in the quantum well layer with the large strain amount.
      COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:为了提高与应变量相适应的量子阱层的数量(N W )同时提高微分增益,提供高性能半导体激光器(ε w )和层厚度(L w )在应变多量子阱半导体激光器中的临界膜厚度限度内。 解决方案:作为整个多量子阱层的应变量通过允许一组量子阱层和阻挡层的一部分由平均应变形成,该平均应变是小值或代码是反平均的 如果在另一部分中形成具有平均大应变值的量子阱层和势垒层的组。 在应变量小的量子阱层中,使电子与空穴之间的能量差小于应变量大的量子阱层中的能量差。 版权所有(C)2010,JPO&INPIT