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    • 61. 发明专利
    • DISPLAY DEVICE
    • JPH07240854A
    • 1995-09-12
    • JP3110694
    • 1994-03-01
    • HITACHI LTD
    • SANO TAKESHINISHIMORI KOJI
    • H04N3/28
    • PURPOSE:To obtain a video image with high image quality without flicker at all times by selecting a high frequency for the scanning frequency when a frequency of an input signal is low and outputting and displaying video information in matching with a high scanning frequency. CONSTITUTION:A synchronizing signal is sampled in a sampling circuit 1 and stored in a memory A2 as synchronizing signal data. The frequency of the synchronizing signal is counted by counters A6-C8 and a comparator 9 compares the frequency with a frequency A. When the frequency is lower than the frequency A, a signal to select a circuit scanning an image at horizontal and vertical frequencies at a multiple of N is outputted to each changeover switch. Furthermore, on the reception of an interlace scanning signal of 1-frame 2-field, an arithmetic circuit 11 generating an address to call a video image of the 2nd filed in succession to that of a 1st field is selected by an interlace scanning signal identification circuit 10. Furthermore, in this case, the frequency A is set to a frequency at which no flicker is generated.
    • 62. 发明专利
    • DOUBLE SCAN CIRCUIT
    • JPH07181909A
    • 1995-07-21
    • JP25669694
    • 1994-10-21
    • SAMSUNG ELECTRONIC
    • SOU KOUSHIYOU
    • H04N7/01G09G1/14H04N3/28
    • PURPOSE: To provide a double scan circuit which can be easily turned into a VLSI. CONSTITUTION: This double scan circuit includes first and second data converters 202 and 203 which convert (n)-bit actual line data and n-bit interpolating line data into 2n-bit data, first and second RAM 204 and 205 which store the actual line data and the interpolating line data, memory control circuit 201 which generates the write/read control signals of the first and second RAM 204 and 205, and a write address and a read address at the read speed which is 2n times as high as the write speed, and provides it to the first and second RAM 204 and 205, and generates a mixing control signal for mixing the original line data and the interpolating line data stored in the first and second RAM 204 and 205 for double scanning, and multiplexer 206 which selects the 2n-bit actual or interpolating line data read from the first and second RAM 204 and 205 in response to the mixing control signal and an actual/interpolating line control signal, and outputs the data as the n-bit double scan data.
    • 66. 发明专利
    • ADJUSTING DEVICE FOR PICTURE DISPLAY DEVICE
    • JPH02137577A
    • 1990-05-25
    • JP29267988
    • 1988-11-18
    • MATSUSHITA ELECTRIC IND CO LTD
    • KURATA TAKATSUGUSEKIGUCHI TOMOHIRO
    • H04N5/68H04N3/16H04N3/28
    • PURPOSE:To adjust vertical deflection voltage automatically and correctly by measuring automatically relation between a beam spot position and the vertical deflection voltage to respective picture element units, and further, calculating an inverse function. CONSTITUTION:A controller 54 is fixed at the vertical deflection voltage V0 of a picture display device 50. Luminance to respective picture display units is stored in a memory 53. Next, the vertical deflection voltage is fixed at V1, and the luminance to respective picture element display units is stored in the emory 53. These operations are repeated until the vertical deflection voltage becomes V255. Next, when the output of a photodetector is expressed by graph by considering the vertical deflection voltage to be a variable to respective picture display units, it shows a maximum value when the beam spot position coincides with the position of a slit by a mask 56 with a slit adhered to a screen picture. When the inverse function of the function of the vertical deflection voltage V and the vertical position of the beam spot is determined, the vertical deflection voltage to put the beam spot at an optional position is obtained.
    • 70. 发明专利
    • Television receiver
    • 电视接收机
    • JPS59148483A
    • 1984-08-25
    • JP2316883
    • 1983-02-15
    • Sony Corp
    • OKADA TAKAFUMIMATSUZAKI ATSUSHI
    • H04N3/28H04N9/18H04N9/20
    • H04N3/28
    • PURPOSE:To reduce picture flicker by emitting light with the scanning of the 2nd electron beam also for the scanning line of the next field. CONSTITUTION:The 1st and 2nd cathodes K1, K2 relating to the 1st and 2nd electron beams Bm1 and Bm2 are provided side by side to constitute the 2-beam system. Then, the 1st and 2nd electron beams Bm1 and Bm2 scan respectively scanning lines le and lo of even and odd number fields in an even number field as shown in a round mark in solid lines and the 1st and 2nd electron beams Bm1 and Bm2 scan respectively the scanning lines lo and le in an odd number field as shown in a round in broken lines. In such scanning control, the display period of each scanning line is, e.g., 1/60sec and no flicker is observed.
    • 目的:通过第二电子束的扫描也可以通过发射下一个场的扫描线来减少图像闪烁。 构成:与第一和第二电子束Bm1和Bm2有关的第一和第二阴极K1,K2并排设置以构成双梁系统。 那么,第一和第二电子束Bm1和Bm2分别扫描偶数场中偶数和场数的扫描线le和lo,如实线所示圆形标记,第一和第二电子束Bm1和Bm2分别扫描 扫描线lo和le在奇数场中,如虚线所示。 在这样的扫描控制中,每个扫描线的显示周期例如为1/60秒,并且没有观察到闪烁。